test: add debounce structural invariant test for DIG_6 AGC sync

Lock in the four structural invariants of the 2-frame confirmation debounce: local variable captures DIG_6 read, static prev initialized to false (matches FPGA boot), outerAgc.enabled gated by now==prev guard, and prev advances each frame. Prevents a naive refactor from silently removing the glitch protection. Credit: joyshmitz review on PR #93.
fix: propagate FPGA AGC enable to MCU outer loop via DIG_6 GPIO
2026-04-19 11:36:01 +00:00 · 2026-04-17 00:28:40 +05:45 · 2026-04-17 00:04:37 +05:45 · 2026-04-16 13:55:12 +03:00 · 2026-04-16 13:54:40 +03:00 · 2026-04-16 11:49:44 +03:00
166 changed files with 1460756 additions and 44098 deletions
@@ -0,0 +1,116 @@
+name: AERIS-10 CI
+
+on:
+  pull_request:
+    branches: [main, develop]
+  push:
+    branches: [main, develop]
+
+jobs:
+  # ===========================================================================
+  # Python: lint (ruff), syntax check (py_compile), unit tests (pytest)
+  # CI structure proposed by hcm444 — uses uv for dependency management
+  # ===========================================================================
+  python-tests:
+    name: Python Lint + Tests
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v4
+
+      - uses: actions/setup-python@v5
+        with:
+          python-version: "3.12"
+
+      - uses: astral-sh/setup-uv@v5
+
+      - name: Install dependencies
+        run: uv sync --group dev
+
+      - name: Ruff lint (whole repo)
+        run: uv run ruff check .
+
+      - name: Syntax check (py_compile)
+        run: |
+          uv run python - <<'PY'
+          import py_compile
+          from pathlib import Path
+
+          skip = {".git", "__pycache__", ".venv", "venv", "docs"}
+          for p in Path(".").rglob("*.py"):
+              if skip & set(p.parts):
+                  continue
+              py_compile.compile(str(p), doraise=True)
+          PY
+
+      - name: Unit tests
+        run: >
+          uv run pytest
+          9_Firmware/9_3_GUI/test_GUI_V65_Tk.py
+          9_Firmware/9_3_GUI/test_v7.py
+          -v --tb=short
+
+  # ===========================================================================
+  # MCU Firmware Unit Tests (20 tests)
+  # Bug regression (15) + Gap-3 safety tests (5)
+  # ===========================================================================
+  mcu-tests:
+    name: MCU Firmware Tests
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v4
+
+      - name: Install build tools
+        run: sudo apt-get update && sudo apt-get install -y build-essential
+
+      - name: Build and run MCU tests
+        run: make test
+        working-directory: 9_Firmware/9_1_Microcontroller/tests
+
+  # ===========================================================================
+  # FPGA RTL Regression (25 testbenches + lint)
+  # ===========================================================================
+  fpga-regression:
+    name: FPGA Regression
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v4
+
+      - name: Install Icarus Verilog
+        run: sudo apt-get update && sudo apt-get install -y iverilog
+
+      - name: Run full FPGA regression
+        run: bash run_regression.sh
+        working-directory: 9_Firmware/9_2_FPGA
+
+  # ===========================================================================
+  # Cross-Layer Contract Tests (Python ↔ Verilog ↔ C)
+  # Validates opcode maps, bit widths, packet layouts, and round-trip
+  # correctness across FPGA RTL, Python GUI, and STM32 firmware.
+  # ===========================================================================
+  cross-layer-tests:
+    name: Cross-Layer Contract Tests
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v4
+
+      - uses: actions/setup-python@v5
+        with:
+          python-version: "3.12"
+
+      - uses: astral-sh/setup-uv@v5
+
+      - name: Install dependencies
+        run: uv sync --group dev
+
+      - name: Install Icarus Verilog
+        run: sudo apt-get update && sudo apt-get install -y iverilog
+
+      - name: Run cross-layer contract tests
+        run: >
+          uv run pytest
+          9_Firmware/tests/cross_layer/test_cross_layer_contract.py
+          -v --tb=short
@@ -0,0 +1,10 @@
+G75*
+%MOIN*%
+%OFA0B0*%
+%FSLAX25Y25*%
+%IPPOS*%
+%LPD*%
+%AMOC8*
+5,1,8,0,0,1.08239X$1,22.5*
+%
+M02*
@@ -0,0 +1,194 @@
+G75*
+%MOIN*%
+%OFA0B0*%
+%FSLAX25Y25*%
+%IPPOS*%
+%LPD*%
+%AMOC8*
+5,1,8,0,0,1.08239X$1,22.5*
+%
+%ADD10C,0.00300*%
+D10*
+X0576543Y0546405D02*
+X0576543Y0551109D01*
+X0579679Y0551109D02*
+X0576543Y0546405D01*
+X0579679Y0546405D02*
+X0579679Y0551109D01*
+X0579679Y0570005D02*
+X0579679Y0573141D01*
+X0578111Y0574709D01*
+X0576543Y0573141D01*
+X0576543Y0570005D01*
+X0576543Y0572357D02*
+X0579679Y0572357D01*
+X0582179Y0577205D02*
+X0582179Y0580341D01*
+X0582179Y0578773D02*
+X0586883Y0578773D01*
+X0585315Y0577205D01*
+X0605779Y0577205D02*
+X0605779Y0580341D01*
+X0605779Y0578773D02*
+X0610483Y0578773D01*
+X0608915Y0577205D01*
+X0609699Y0581809D02*
+X0610483Y0582593D01*
+X0610483Y0584161D01*
+X0609699Y0584945D01*
+X0608915Y0584945D01*
+X0608131Y0584161D01*
+X0607347Y0584945D01*
+X0606563Y0584945D01*
+X0605779Y0584161D01*
+X0605779Y0582593D01*
+X0606563Y0581809D01*
+X0608131Y0583377D02*
+X0608131Y0584161D01*
+X0586095Y0835378D02*
+X0586879Y0836162D01*
+X0586879Y0837730D01*
+X0586095Y0838514D01*
+X0586879Y0839982D02*
+X0586879Y0843118D01*
+X0586879Y0841550D02*
+X0582175Y0841550D01*
+X0583743Y0843118D01*
+X0582959Y0838514D02*
+X0582175Y0837730D01*
+X0582175Y0836162D01*
+X0582959Y0835378D01*
+X0583743Y0835378D01*
+X0584527Y0836162D01*
+X0585311Y0835378D01*
+X0586095Y0835378D01*
+X0584527Y0836162D02*
+X0584527Y0836946D01*
+X0605775Y0841550D02*
+X0610479Y0841550D01*
+X0610479Y0843118D02*
+X0610479Y0839982D01*
+X0607343Y0843118D02*
+X0605775Y0841550D01*
+X0612979Y0847182D02*
+X0614547Y0845614D01*
+X0616115Y0847182D01*
+X0616115Y0850318D01*
+X0616115Y0847966D02*
+X0612979Y0847966D01*
+X0612979Y0847182D02*
+X0612979Y0850318D01*
+X0612979Y0869214D02*
+X0616115Y0873918D01*
+X0616115Y0869214D01*
+X0612979Y0869214D02*
+X0612979Y0873918D01*
+X0881387Y0841550D02*
+X0886091Y0841550D01*
+X0886091Y0843118D02*
+X0886091Y0839982D01*
+X0885307Y0838514D02*
+X0886091Y0837730D01*
+X0886091Y0836162D01*
+X0885307Y0835378D01*
+X0884523Y0835378D01*
+X0883739Y0836162D01*
+X0883739Y0836946D01*
+X0883739Y0836162D02*
+X0882955Y0835378D01*
+X0882171Y0835378D01*
+X0881387Y0836162D01*
+X0881387Y0837730D01*
+X0882171Y0838514D01*
+X0881387Y0841550D02*
+X0882955Y0843118D01*
+X0904987Y0841550D02*
+X0909691Y0841550D01*
+X0909691Y0843118D02*
+X0909691Y0839982D01*
+X0906555Y0843118D02*
+X0904987Y0841550D01*
+X0912191Y0847182D02*
+X0913759Y0845614D01*
+X0915327Y0847182D01*
+X0915327Y0850318D01*
+X0915327Y0847966D02*
+X0912191Y0847966D01*
+X0912191Y0847182D02*
+X0912191Y0850318D01*
+X0912191Y0869214D02*
+X0915327Y0873918D01*
+X0915327Y0869214D01*
+X0912191Y0869214D02*
+X0912191Y0873918D01*
+X0908911Y0584945D02*
+X0908127Y0584945D01*
+X0907343Y0584161D01*
+X0906559Y0584945D01*
+X0905775Y0584945D01*
+X0904991Y0584161D01*
+X0904991Y0582593D01*
+X0905775Y0581809D01*
+X0904991Y0580341D02*
+X0904991Y0577205D01*
+X0904991Y0578773D02*
+X0909695Y0578773D01*
+X0908127Y0577205D01*
+X0908911Y0581809D02*
+X0909695Y0582593D01*
+X0909695Y0584161D01*
+X0908911Y0584945D01*
+X0907343Y0584161D02*
+X0907343Y0583377D01*
+X0886095Y0578773D02*
+X0881391Y0578773D01*
+X0881391Y0577205D02*
+X0881391Y0580341D01*
+X0884527Y0577205D02*
+X0886095Y0578773D01*
+X0878891Y0573141D02*
+X0877323Y0574709D01*
+X0875755Y0573141D01*
+X0875755Y0570005D01*
+X0875755Y0572357D02*
+X0878891Y0572357D01*
+X0878891Y0573141D02*
+X0878891Y0570005D01*
+X0878891Y0551109D02*
+X0875755Y0546405D01*
+X0875755Y0551109D01*
+X0878891Y0551109D02*
+X0878891Y0546405D01*
+X0110335Y0716515D02*
+X0110335Y0719651D01*
+X0110335Y0717299D02*
+X0107199Y0717299D01*
+X0107199Y0716515D02*
+X0108767Y0714947D01*
+X0110335Y0716515D01*
+X0107199Y0716515D02*
+X0107199Y0719651D01*
+X0107199Y0730747D02*
+X0107199Y0735451D01*
+X0110335Y0735451D01*
+X0108767Y0733099D02*
+X0107199Y0733099D01*
+X0107199Y0730747D02*
+X0110335Y0730747D01*
+X0102799Y0706651D02*
+X0102799Y0703515D01*
+X0102799Y0705083D02*
+X0098095Y0705083D01*
+X0099663Y0706651D01*
+X0086999Y0705867D02*
+X0086215Y0706651D01*
+X0086999Y0705867D02*
+X0086999Y0704299D01*
+X0086215Y0703515D01*
+X0084647Y0703515D01*
+X0083863Y0704299D01*
+X0083863Y0705083D01*
+X0084647Y0706651D01*
+X0082295Y0706651D01*
+X0082295Y0703515D01*
+M02*
@@ -0,0 +1,50 @@
+Generated by EAGLE CAM Processor 7.4.0
+
+Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.dri
+
+ Date              : 06/04/2026 22:10
+ Drills            : generated
+ Device            : Excellon drill station, coordinate format 2.5 inch
+
+Parameter settings:
+
+ Tolerance Drill + :  2.50 %
+ Tolerance Drill - :  2.50 %
+ Rotate            : no
+ Mirror            : no
+ Optimize          : yes
+ Auto fit          : yes
+ OffsetX           : 0inch
+ OffsetY           : 0inch
+ Layers            : Drills Holes
+
+Drill File Info:
+
+ Data Mode         : Absolute
+ Units             : 1/100000 Inch
+
+Drills used:
+
+ Code  Size       used
+
+ T01   0.0059inch  1609
+ T02   0.0079inch  1892
+ T03   0.0100inch    18
+ T04   0.0118inch   355
+ T05   0.0138inch   113
+ T06   0.0197inch    21
+ T07   0.0236inch     7
+ T08   0.0252inch     4
+ T09   0.0331inch     8
+ T10   0.0354inch     4
+ T11   0.0394inch   132
+ T12   0.0400inch   115
+ T13   0.0470inch   148
+ T14   0.0472inch     4
+ T15   0.1260inch     8
+
+Total number of drills: 4438
+
+Plotfiles:
+
+ C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.drd
@@ -0,0 +1,14 @@
+T01 0.006in
+T02 0.008in
+T03 0.010in
+T04 0.012in
+T05 0.014in
+T06 0.020in
+T07 0.024in
+T08 0.025in
+T09 0.033in
+T10 0.035in
+T11 0.039in
+T12 0.040in
+T13 0.047in
+T14 0.126in
@@ -0,0 +1,37 @@
+Generated by EAGLE CAM Processor 7.4.0
+
+Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.gpi
+
+ Date              : 06/04/2026 22:41
+ Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.bsk
+ Apertures         : generated: 
+ Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
+
+Parameter settings:
+
+ Emulate Apertures : no
+ Tolerance Draw  + :  0.00 %
+ Tolerance Draw  - :  0.00 %
+ Tolerance Flash + :  0.00 %
+ Tolerance Flash - :  0.00 %
+ Rotate            : no
+ Mirror            : no
+ Optimize          : yes
+ Auto fit          : yes
+ OffsetX           : 0inch
+ OffsetY           : 0inch
+
+Plotfile Info:
+
+ Coordinate Format : 2.5
+ Coordinate Units  : Inch
+ Data Mode         : Absolute
+ Zero Suppression  : None
+ End Of Block      : *
+
+Apertures used:
+
+ Code     Shape     Size                  used
+
+ D10      draw      0.0030inch             121
+
@@ -0,0 +1,710 @@
+ADAR1_ 150.00 218.00 180 ADAR1000ACCZN CC-88-1_ADI
+ADAR2_ 226.00 218.00 180 ADAR1000ACCZN CC-88-1_ADI
+ADAR3_ 226.00 142.00   0 ADAR1000ACCZN CC-88-1_ADI
+ADAR4_ 150.00 142.00   0 ADAR1000ACCZN CC-88-1_ADI
+ADTR1107_1 141.00 209.00 225 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_2 159.00 209.00 315 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_3 141.00 227.00 135 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_4 159.00 227.00  45 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_5 217.00 209.00 225 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_6 235.00 209.00 315 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_7 217.00 227.00 135 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_8 235.00 227.00  45 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_9 217.00 133.00 225 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_10 235.00 133.00 315 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_11 217.00 151.00 135 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_12 235.00 151.00  45 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_13 141.00 133.00 225 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_14 159.00 133.00 315 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_15 141.00 151.00 135 ADTR1107ACCZ CC-24-8_ADI
+ADTR1107_16 159.00 151.00  45 ADTR1107ACCZ CC-24-8_ADI
+C1 64.52 156.43   0 0.1uF C0201
+C2 64.52 157.08   0 0.1uF C0201
+C3 58.61 152.59 180 2.7pF C0402
+C4 55.87 153.47  90 0.1uF C0201
+C5 56.47 153.82  90 0.1uF C0201
+C6 57.05 153.82  90 0.1uF C0201
+C7 57.62 153.82  90 0.1uF C0201
+C8 59.40 153.77  90 0.1uF C0201
+C9 59.87 153.77  90 0.1uF C0201
+C10 60.40 153.77  90 0.1uF C0201
+C11 61.35 153.77  90 0.1uF C0201
+C12 61.90 153.77  90 0.1uF C0201
+C13 63.82 155.47  90 0.1uF C0201
+C14 53.00 156.48   0 0.1uF C0201
+C15 58.60 163.86   0 0.1uF C0201
+C16 53.28 158.23 270 0.1uF C0201
+C17 59.11 192.79 135 47uF C0201
+C18 92.83 95.88 270 2.7pF C0201
+C19 92.82 98.42  90 2.7pF C0201
+C20 92.73 103.23 270 4.3pF C0201
+C21 92.67 105.77  90 4.3pF C0201
+C22 62.08 94.57 180 2.2uF C0201
+C23 66.17 114.42  90 2.2uF C0201
+C24 86.77 109.52   0 100nF C0201
+C25 87.32 96.00   0 100nF C0201
+C26 87.09 101.26 270 100nF C0201
+C27 87.10 108.24  90 100nF C0201
+C28 82.41 115.04   0 100nF C0201
+C29 75.95 115.04   0 100nF C0201
+C30 70.91 115.03   0 100nF C0201
+C31 65.66 115.26  90 47nF C0201
+C32 61.34 105.71  90 100nF C0201
+C33 61.41 100.24  90 100nF C0201
+C34 61.35 93.74  90 100nF C0201
+C35 71.41 89.46 180 100nF C0201
+C36 64.53 158.25 270 0.1uF C0201
+C37 53.98 214.81   0 10uF C0201
+C38 58.50 214.07  90 0.1uF C0201
+C39 63.55 214.17  90 0.1uF C0201
+C40 65.48 215.62 180 10uF C0201
+C41 66.25 214.48   0 0.1uF C0201
+C42 65.48 216.07 180 0.1uF C0201
+C43 58.60 142.08 180 0.2pF C0201
+C44 57.81 148.10  90 0.1uF C0201
+C45 59.31 148.08  90 0.1uF C0201
+C46 58.57 148.28  90 0.1uF C0201
+C47 56.22 145.73   0 0.1uF C0201
+C48 62.55 143.34  90 0.1ｵF C0402
+C49 54.62 143.39 270 0.1ｵF C0402
+C50 17.63 182.50  90 100nF C0201
+C51 58.39 139.26  90 0.1uF C0201
+C52 59.06 139.29  90 0.1uF C0201
+C53 58.40 141.13   0 0.1uF C0201
+C54 58.75 133.08 180 0.6pF C0201
+C55 39.63 193.43 225 47uF C0201
+C56 56.35 136.71   0 0.1uF C0201
+C57 62.34 134.95  90 0.1ｵF C0402
+C58 55.10 134.97 270 0.1ｵF C0402
+C59 80.14 213.74 270 32.8pF C0201
+C60 76.72 145.26  90 103pF C0201
+C61 75.56 144.93   0 7.8pF C0201
+C62 75.55 145.56   0 7.8pF C0201
+C63 73.84 145.23  90 103pF C0201
+C64 72.61 144.89   0 25pF C0201
+C65 72.62 145.56   0 25pF C0201
+C66 135.36 232.49  45 100pF C0201
+C67 134.91 232.95  45 0.1uF C0201
+C68 133.70 230.97 225 100pF C0201
+C69 133.16 231.41 225 0.1uF C0201
+C70 137.58 231.90 225 1pF C0201
+C71 134.39 228.76 225 1pF C0201
+C72 138.16 228.51 315 1pF C0201
+C73 164.39 232.64 315 100pF C0201
+C74 164.95 233.09 315 0.1uF C0201
+C75 41.98 37.44 270 10ｵF C0805
+C76 44.18 37.77 270 100nF C0402
+C77 107.38 38.09 270 10ｵF C0805
+C78 109.99 38.54 270 100nF C0402
+C79 112.95 180.56  90 100pF C0201
+C80 113.60 180.56  90 0.1uF C0201
+C81 112.97 178.52 270 100pF C0201
+C82 113.66 178.52 270 0.1uF C0201
+C83 115.91 182.17 270 1pF C0201
+C84 115.93 177.02 270 1pF C0201
+C85 183.83 179.76   0 1pF C0201
+C86 226.37 223.00  90 1uF C0201
+C87 225.92 222.99  90 1uF C0201
+C88 151.49 222.99  90 1uF C0201
+C89 150.97 222.98  90 1uF C0201
+C90 149.79 222.43  90 1uF C0201
+C91 150.27 222.42  90 1uF C0201
+C92 225.02 222.49  90 1uF C0201
+C93 225.47 222.49  90 1uF C0201
+C94 225.69 137.67 270 1uF C0201
+C95 226.19 137.65 270 1uF C0201
+C96 226.24 136.03 270 1uF C0201
+C97 225.71 136.03 270 1uF C0201
+C98 149.99 137.72 270 1uF C0201
+C99 150.51 137.69 270 1uF C0201
+C100 151.06 136.31 270 1uF C0201
+C101 150.59 136.31 270 1uF C0201
+C102 139.83 212.93  45 10nF C0201
+C103 144.78 228.09 315 10nF C0201
+C104 160.12 223.26 225 10nF C0201
+C105 155.17 207.91 135 10nF C0201
+C106 215.85 212.89  45 10nF C0201
+C107 220.90 228.14 315 10nF C0201
+C108 60.02 193.71 135 4.7uF C0201
+C109 59.55 193.23 135 4.7uF C0201
+C110 60.48 194.16 135 0.47uF C0201
+C111 60.94 194.62 135 0.47uF C0201
+C112 61.41 195.11 135 0.47uF C0201
+C113 61.87 195.57 135 0.47uF C0201
+C114 231.14 207.91 135 10nF C0201
+C115 236.08 223.28 225 10nF C0201
+C116 231.22 131.83 135 10nF C0201
+C117 236.24 147.14 225 10nF C0201
+C118 220.65 151.98 315 10nF C0201
+C119 215.68 137.01  45 10nF C0201
+C120 155.14 131.87 135 10nF C0201
+C121 160.32 147.13 225 10nF C0201
+C122 144.88 152.19 315 10nF C0201
+C123 139.70 136.91  45 10nF C0201
+C124 162.87 234.00 135 100pF C0201
+C125 163.41 234.54 135 0.1uF C0201
+C126 136.19 205.50 315 1pF C0201
+C127 77.23 213.72 270 32.8pF C0201
+C128 139.27 202.41 315 1pF C0201
+C129 139.47 206.09  45 1pF C0201
+C130 164.79 203.51 225 100pF C0201
+C131 165.28 203.04 225 0.1uF C0201
+C132 166.32 204.80  45 100pF C0201
+C133 166.83 204.37  45 0.1uF C0201
+C134 162.50 204.12  45 1pF C0201
+C135 165.61 207.23  45 1pF C0201
+C136 161.93 207.42 135 1pF C0201
+C137 135.49 203.23 135 100pF C0201
+C138 135.02 202.74 135 0.1uF C0201
+C139 137.02 201.86 315 100pF C0201
+C140 136.39 201.25 315 0.1uF C0201
+C141 78.67 213.72 270 106pF C0201
+C142 163.82 230.39 135 1pF C0201
+C143 160.73 233.50 135 1pF C0201
+C144 160.57 229.92 225 1pF C0201
+C145 211.16 232.54  45 100pF C0201
+C146 210.66 233.00  45 0.1uF C0201
+C147 209.83 230.95 225 100pF C0201
+C148 209.33 231.39 225 0.1uF C0201
+C149 213.54 231.86 225 1pF C0201
+C150 210.40 228.70 225 1pF C0201
+C151 213.92 228.73 315 1pF C0201
+C152 165.66 157.62 315 100pF C0201
+C153 38.73 194.33 225 4.7uF C0201
+C154 39.19 193.87 225 4.7uF C0201
+C155 38.28 194.79 225 0.47uF C0201
+C156 37.83 195.23 225 0.47uF C0201
+C157 37.37 195.68 225 0.47uF C0201
+C158 36.92 196.16 225 0.47uF C0201
+C159 33.88 222.14 180 0.1uF C0201
+C160 165.89 126.45 225 0.1uF C0201
+C161 164.23 159.09 135 100pF C0201
+C162 167.22 127.96  45 0.1uF C0201
+C163 211.87 205.34 315 1pF C0201
+C164 95.14 107.47  90 2.2uF C0201
+C165 214.94 202.25 315 1pF C0201
+C166 215.17 205.82  45 1pF C0201
+C167 166.18 158.10 315 100pF C0201
+C168 134.12 125.84 135 0.1uF C0201
+C169 164.71 159.51 135 100pF C0201
+C170 136.19 124.85 315 0.1uF C0201
+C171 239.14 203.45  45 1pF C0201
+C172 242.24 206.51  45 1pF C0201
+C173 238.08 207.28 135 1pF C0201
+C174 165.38 126.90 225 100pF C0201
+C175 134.60 126.26 135 0.1uF C0201
+C176 62.65 174.87   0 47uF C0201
+C177 62.65 173.59   0 4.7uF C0201
+C178 62.65 174.26   0 4.7uF C0201
+C179 62.64 172.94   0 0.47uF C0201
+C180 62.62 172.24   0 0.47uF C0201
+C181 62.62 171.67   0 0.47uF C0201
+C182 62.63 171.06   0 0.47uF C0201
+C183 166.73 128.41  45 100pF C0201
+C184 27.95 210.80  90 12pF C0201
+C185 29.08 207.55  90 12pF C0201
+C186 24.64 201.69  90 4.7uF 35V EIA3528
+C187 21.59 209.81 270 4.7uF 35V EIA3528
+C188 27.39 203.95  90 0.1uF C0201
+C189 24.26 207.63 270 0.1uF C0201
+C190 39.09 211.26   0 0.1uF C0201
+C191 40.23 211.06 180 3.3uF C0201
+C192 33.89 198.90  90 0.1uF C0201
+C193 40.08 199.47 180 0.1uF C0201
+C194 42.05 205.81 180 0.1uF C0201
+C195 36.41 210.93 270 0.1uF C0201
+C196 135.71 124.34 315 0.1uF C0201
+C197 240.25 230.89 135 1pF C0201
+C198 237.12 234.00 135 1pF C0201
+C199 236.82 230.17 225 1pF C0201
+C200 210.13 157.53  45 100pF C0201
+C201 241.14 127.07 225 0.1uF C0201
+C202 208.66 156.06 225 100pF C0201
+C203 242.67 128.54  45 0.1uF C0201
+C204 238.99 127.57  45 1pF C0201
+C205 242.06 130.64  45 1pF C0201
+C206 238.08 131.28 135 1pF C0201
+C207 209.65 157.95  45 100pF C0201
+C208 241.62 126.65 225 0.1uF C0201
+C209 208.14 156.54 225 100pF C0201
+C210 243.19 128.06  45 0.1uF C0201
+C211 240.32 154.95 135 1pF C0201
+C212 237.24 158.04 135 1pF C0201
+C213 236.87 154.22 225 1pF C0201
+C214 240.97 157.23 315 100pF C0201
+C215 210.73 126.20 135 0.1uF C0201
+C216 239.52 158.68 135 100pF C0201
+C217 211.88 124.29 315 0.1uF C0201
+C218 212.42 156.97 225 1pF C0201
+C219 209.28 153.87 225 1pF C0201
+C220 213.67 152.93 315 1pF C0201
+C221 241.49 157.71 315 100pF C0201
+C222 210.31 125.82 135 0.1uF C0201
+C223 240.00 159.20 135 100pF C0201
+C224 212.30 124.77 315 0.1uF C0201
+C225 211.39 128.46 315 1pF C0201
+C226 214.47 125.38 315 1pF C0201
+C227 215.02 129.62  45 1pF C0201
+C228 241.86 202.40 225 100pF C0201
+C229 211.30 203.17 135 0.1uF C0201
+C230 212.71 201.65 315 100pF C0201
+C231 212.21 201.22 315 0.1uF C0201
+C232 163.08 127.47  45 1pF C0201
+C233 166.20 130.57  45 1pF C0201
+C234 162.33 131.03 135 1pF C0201
+C235 241.34 202.88 225 100pF C0201
+C236 210.78 202.69 135 0.1uF C0201
+C237 243.27 203.83  45 100pF C0201
+C238 242.80 204.33  45 0.1uF C0201
+C239 164.99 155.33 135 1pF C0201
+C240 161.87 158.44 135 1pF C0201
+C241 161.08 154.32 225 1pF C0201
+C242 241.34 233.62 315 100pF C0201
+C243 133.65 158.07  45 0.1uF C0201
+C244 239.95 235.09 135 100pF C0201
+C245 132.14 156.52 225 0.1uF C0201
+C246 136.45 156.82 225 1pF C0201
+C247 133.36 153.73 225 1pF C0201
+C248 137.48 153.08 315 1pF C0201
+C249 240.86 233.10 315 100pF C0201
+C250 134.17 157.59  45 0.1uF C0201
+C251 239.43 234.61 135 100pF C0201
+C252 132.62 156.10 225 0.1uF C0201
+C253 135.31 128.57 315 1pF C0201
+C254 138.43 125.45 315 1pF C0201
+C255 139.17 129.72  45 1pF C0201
+C256 45.26 22.42  90 100nF C0201
+C257 45.46 51.50  90 100nF C0201
+C258 112.49 30.06 270 100nF C0402
+C259 102.49 30.17 270 100nF C0402
+C260 99.60 45.35  90 100nF C0402
+C261 118.23 43.06 180 4.7nF C0201
+C262 89.70 45.27  90 100nF C0402
+C263 108.13 43.21 180 4.7nF C0201
+C264 139.40 45.00  90 100nF C0402
+C265 98.08 43.16 180 4.7nF C0201
+C266 162.79 29.91 270 100nF C0402
+C267 88.33 43.11 180 4.7nF C0201
+C268 78.40 144.95   0 25pF C0201
+C269 83.67 32.34   0 4.7nF C0201
+C270 78.39 145.57   0 25pF C0201
+C271 93.77 32.09   0 4.7nF C0201
+C272 82.50 216.35  90 18pF C0201
+C273 103.97 32.04   0 4.7nF C0201
+C274 82.74 142.36 270 18pF C0201
+C275 113.62 32.04   0 4.7nF C0201
+C276 104.58 39.82  90 1ｵF C0201
+C277 104.52 35.60   0 0.1ｵF C0201
+C278 104.52 36.28   0 0.1ｵF C0201
+C279 76.38 89.35 180 100nF C0201
+C280 168.48 43.01 180 4.7nF C0201
+C281 82.91 89.41   0 100nF C0201
+C282 158.18 43.16 180 4.7nF C0201
+C283  8.10 24.20   0 22ｵF C1206
+C284 148.18 43.06 180 4.7nF C0201
+C285 38.10 177.47   0 47uF C0201
+C286 138.38 43.06 180 4.7nF C0201
+C287 38.10 176.25   0 4.7uF C0201
+C288 133.72 32.04   0 4.7nF C0201
+C289 38.10 176.88   0 4.7uF C0201
+C290 143.72 31.99   0 4.7nF C0201
+C291 38.10 175.60   0 0.47uF C0201
+C292 153.87 32.09   0 4.7nF C0201
+C293 65.85 157.90 180 0.1uF C0201
+C294 164.77 32.04   0 4.7nF C0201
+C295 154.62 35.48   0 0.1ｵF C0201
+C296 154.30 39.72  90 1ｵF C0201
+C297 154.62 36.18   0 0.1ｵF C0201
+C298 198.75 54.77  90 100nF C0201
+C299 198.98 30.63 270 0.1ｵF C0201
+C300 203.17 31.10   0 1ｵF C0201
+C301 199.58 30.63 270 0.1ｵF C0201
+C302 204.35 54.72  90 100nF C0201
+C303 209.45 54.77  90 100nF C0201
+C304 214.65 54.82  90 100nF C0201
+C305 188.35 55.12  90 100nF C0201
+C306 193.60 55.02  90 100nF C0201
+C307 219.75 54.82  90 100nF C0201
+C308 75.73 213.20 270 22pF C0201
+C309 75.69 214.26  90 22pF C0201
+C310 183.30 55.27  90 100nF C0201
+C311 11.73 156.14 270 22ｵF C1206
+C312 23.23 156.49 270 10ｵF C0805
+C313 25.44 156.93 270 100nF C0402
+C314 27.15 156.93 270 1nF C0402
+C315 191.92 286.66  90 22ｵF C1206
+C316 171.43 289.19 270 10ｵF C0805
+C317 169.19 289.75 270 100nF C0402
+C318 167.38 289.73 270 1nF C0402
+C319 204.83 289.54 270 10ｵF C0805
+C320 207.24 290.12 270 100nF C0402
+C321 209.13 290.13 270 1nF C0402
+C322 182.98 77.69 270 22ｵF C1206
+C323 203.08 78.24 270 10ｵF C0805
+C324 205.59 78.64 270 100nF C0402
+C325 207.63 78.68 270 1nF C0402
+C326 169.03 77.74 270 10ｵF C0805
+C327 166.69 78.11 270 100nF C0402
+C328 164.93 78.08 270 1nF C0402
+C329  9.78 12.64 270 22ｵF C1206
+C330 101.58 226.24 270 10ｵF C0805
+C331 99.50 226.65 270 100nF C0402
+C332 97.79 226.65 270 1nF C0402
+C333 100.98 136.04 270 10ｵF C0805
+C334 99.19 136.60 270 100nF C0402
+C335 97.93 136.58 270 1nF C0402
+C336 37.48 37.39 270 10ｵF C0805
+C337 39.69 37.72 270 100nF C0402
+C338 157.08 38.14 270 10ｵF C0805
+C339 159.68 38.57 270 100nF C0402
+C340 193.92 32.97 180 10ｵF C0805
+C341 194.23 30.73 180 100nF C0402
+C342 92.22 30.14 270 100nF C0402
+C343 82.02 30.26 270 100nF C0402
+C344 119.96 45.24  90 100nF C0402
+C345 109.54 45.34  90 100nF C0402
+C346 142.58 30.01 270 100nF C0402
+C347 169.98 45.21  90 100nF C0402
+C348 149.66 45.02  90 100nF C0402
+C349 152.62 29.92 270 100nF C0402
+C350 131.86 30.06 270 100nF C0402
+C351 159.82 45.11  90 100nF C0402
+D2 73.53 118.48  90 Blue LED-0603
+D3 71.88 118.47  90 Blue LED-0603
+D4 75.13 118.46  90 Blue LED-0603
+D5 76.68 118.45  90 Blue LED-0603
+IC1 33.95 216.56   0 AT93C46A-10SQ-2.7 SOIC8
+J1 67.00 185.90   0 142-0731-211 1420731211
+J18 67.01 195.24   0 142-0731-211 1420731211
+J20 52.00 223.05   0 142-0731-211 1420731211
+J22 82.73 136.85   0 142-0731-211 1420731211
+J23 82.50 221.81   0 142-0731-211 1420731211
+J24 129.14 223.50  45 142-0731-211 1420731211
+J25 142.75 237.02  45 142-0731-211 1420731211
+J26 144.44 197.24 135 142-0731-211 1420731211
+J27 131.04 210.69 225 142-0731-211 1420731211
+J28 170.81 212.46  45 142-0731-211 1420731211
+J29 157.34 198.89  45 142-0731-211 1420731211
+J30 155.53 238.64 135 142-0731-211 1420731211
+J31 169.04 225.14  45 142-0731-211 1420731211
+J32 205.15 223.41  45 142-0731-211 1420731211
+J33 218.65 237.01  45 142-0731-211 1420731211
+J34 218.84 198.35 135 142-0731-211 1420731211
+J35 206.75 210.56  45 142-0731-211 1420731211
+J36 247.30 211.61  45 142-0731-211 1420731211
+J37 233.94 198.22  45 142-0731-211 1420731211
+J38 232.00 239.11  45 142-0731-211 1420731211
+J39 245.55 225.61  45 142-0731-211 1420731211
+J40 245.45 134.16  45 142-0731-211 1420731211
+J41 234.31 122.86  45 142-0731-211 1420731211
+J42 233.13 162.21 135 142-0731-211 1420731211
+J43 245.46 150.02  45 142-0731-211 1420731211
+J44 205.05 149.71  45 142-0731-211 1420731211
+J45 216.95 161.51  45 142-0731-211 1420731211
+J46 218.94 120.93  45 142-0731-211 1420731211
+J47 206.52 133.32  45 142-0731-211 1420731211
+J48 170.30 134.66  45 142-0731-211 1420731211
+J49 158.25 122.61  45 142-0731-211 1420731211
+J50 158.33 161.94 135 142-0731-211 1420731211
+J51 169.59 150.89  45 142-0731-211 1420731211
+J52 128.70 149.14  45 142-0731-211 1420731211
+J53 141.42 161.79  45 142-0731-211 1420731211
+J54 142.70 121.17  45 142-0731-211 1420731211
+J55 130.17 133.59  45 142-0731-211 1420731211
+L1 17.69 157.73   0  L5650M
+L2 76.23 145.25 270 12nH L0201
+L3 74.69 144.92   0 159nH L0201
+L4 74.67 145.56   0 159nH L0201
+L5 89.33 109.02   0 BLM15HB121SN1 0402
+L6 67.44 215.23  90 BLM15HB121SN1 0402
+L7 62.36 215.19  90 BLM15HB121SN1 0402
+L8 73.31 145.22 270 12nH L0201
+L9 71.66 144.89   0 50nH L0201
+L10 71.66 145.55   0 50nH L0201
+L11 177.85 289.22 180  L5650M
+L12 198.36 289.23   0  L5650M
+L13 196.97 79.23   0  L5650M
+L14 175.52 79.82 180  L5650M
+L15 107.54 226.15 180  L5650M
+L16 107.10 137.02 180  L5650M
+L17 31.01 37.48   0  L5650M
+L18 120.12  6.48   0  L5650M
+L19 18.00 207.89 180 BLM15HB121SN1 0402
+L20 20.63 203.53 180 BLM15HB121SN1 0402
+L21 114.77 65.02 180  L5650M
+L22 77.96 214.02   0 107.3nH L0201
+L23 126.84 64.98   0  L5650M
+L24 77.50 144.94   0 50nH L0201
+L25 77.97 213.41   0 107.3nH L0201
+L26 79.40 214.04   0 107.3nH L0201
+L27 79.42 213.43   0 107.3nH L0201
+L28 77.49 145.57   0 50nH L0201
+OPA_1 33.00 22.00  90 OPA4703EA/250 PW14
+OPA_2 33.20 51.95  90 OPA4703EA/250 PW14
+OPA_3 62.90 22.20  90 OPA4703EA/250 PW14
+OPA_4 63.00 52.00  90 OPA4703EA/250 PW14
+R1 59.23 150.71 270 24R R0402
+R2 59.50 177.50 270 100R R0201
+R3 57.56 173.11 180 100R R0201
+R4 59.81 180.74  90 100R R0201
+R5 53.16 172.94 180 100R R0201
+R6 55.80 173.04 180 100R R0201
+R7 51.85 172.99 180 100R R0201
+R8 48.95 173.01 180 100R R0201
+R9 50.79 172.96 180 100R R0201
+R10 47.85 173.01 180 100R R0201
+R11 46.78 172.53 180 100R R0201
+R12 59.57 178.72 270 100R R0201
+R13 57.79 150.70 270 24R R0402
+R14 58.61 143.28 180 115R R0201
+R15 58.61 142.62 180 4.3k R0201
+R16 58.01 148.94 180 200R R0201
+R17 59.07 148.92 180 200R R0201
+R18 55.93 144.16   0 0R R0201
+R19 61.32 144.15   0 0R R0201
+R20 58.22 140.45 180 200R R0201
+R21 59.16 140.45 180 200R R0201
+R22 58.76 134.18 180 56R R0201
+R23 52.14 201.13  90 22R R0201
+R24 53.44 201.10  90 22R R0201
+R25 54.69 201.12  90 22R R0201
+R26 55.94 201.14  90 22R R0201
+R27 57.24 201.16  90 22R R0201
+R28 58.49 201.18  90 22R R0201
+R29 59.76 201.19  90 22R R0201
+R30 61.06 201.21  90 22R R0201
+R31 51.18 213.99   0 50R R0201
+R32 58.76 133.60 180 4.3k R0201
+R33 64.84 214.45  90 3k2 R0201
+R34 56.23 135.69   0 0R R0201
+R35 61.21 135.68   0 0R R0201
+R36 53.83 154.35 180 830R R0402
+R37 53.81 152.99   0 1k R0402
+R38 55.16 150.83  90 20k R0402
+R39 50.14 18.20 270 10k R0201
+R40 50.24 47.48 270 10k R0201
+R41 48.94 53.66 270 1k R0201
+R42 48.36 53.66 270 4.7k R0201
+R43 48.59 24.74 270 1k R0201
+R44 47.96 24.69 270 4.7k R0201
+R45 151.96 213.75 270 4.7k R0201
+R46 151.95 225.02 270 4.7k R0201
+R47 152.50 225.03 270 4.7k R0201
+R48 228.04 213.51 270 4.7k R0201
+R49  8.32 180.66 180 22R R0201
+R50 21.14 177.99 270 4.7k R0201
+R51 26.18 180.49   0 22R R0201
+R52 26.11 183.12 270 4.7k R0201
+R53 17.51 184.25 270 4.7k R0201
+R54 17.46 185.30  90 4.7k R0201
+R55 227.41 222.59  90 1k R0201
+R56 225.17 137.61 270 1k R0201
+R57 147.87 137.67 270 1k R0201
+R58 149.49 137.69 270 1k R0201
+R59 31.74 46.95 270 1k R0201
+R60 30.79 206.39 180 1k2_1% R0201
+R61 29.92 202.31   0 1k R0201
+R62  8.21 183.26 180 22R R0201
+R63  8.12 185.78 180 22R R0201
+R64  8.07 188.36 180 22R R0201
+R65  8.34 187.59 270 4.7k R0201
+R66  8.38 184.94 270 4.7k R0201
+R67  8.49 182.47 270 4.7k R0201
+R68  8.59 179.78 270 4.7k R0201
+R69 60.07 182.71   0 4.7k R0201
+R70 227.96 222.61 270 4.7k R0201
+R71 228.51 222.62 270 4.7k R0201
+R72 224.06 146.58  90 4.7k R0201
+R73 223.99 131.89  90 4.7k R0201
+R74 222.78 129.02  90 4.7k R0201
+R75 148.12 146.64  90 4.7k R0201
+R76 149.76 132.90  90 4.7k R0201
+R77 148.42 132.20  90 4.7k R0201
+R78 226.88 222.61 270 840R R0201
+R79 224.60 137.59  90 840R R0201
+R80 148.40 137.67  90 840R R0201
+R81 148.95 137.67  90 840R R0201
+R82 34.59 46.90 270 1k R0201
+R83 38.25 213.89   0 10k R0201
+R84 30.66 215.31 180 10k R0201
+R85 61.59 47.14 270 1k R0201
+R86 64.39 47.07 270 1k R0201
+R87 64.39 57.05 270 1k R0201
+R88 61.59 56.93 270 1k R0201
+R89 61.33 47.83 180 2.443k R0201
+R90 64.65 47.82   0 2.443k R0201
+R91 64.62 56.23 180 2.443k R0201
+R92 61.36 56.17   0 2.443k R0201
+R93 34.59 57.06 270 1k R0201
+R94 31.84 56.94 270 1k R0201
+R95 31.51 47.78 180 2.443k R0201
+R96 34.82 47.77   0 2.443k R0201
+R97 34.85 56.23 180 2.443k R0201
+R98 31.58 56.17   0 2.443k R0201
+R99 61.54 17.22 270 1k R0201
+R100 64.30 17.28 270 1k R0201
+R101 64.30 27.13 270 1k R0201
+R102 61.55 27.13 270 1k R0201
+R103 61.29 18.03 180 2.443k R0201
+R104 64.54 18.07   0 2.443k R0201
+R105 64.53 26.33 180 2.443k R0201
+R106 61.30 26.37   0 2.443k R0201
+R107 31.65 17.18 270 1k R0201
+R108 34.40 17.13 270 1k R0201
+R109 34.40 27.03 270 1k R0201
+R110 76.70 115.88 270 500R R0201
+R111 95.14 108.56  90 10k R0201
+R112 75.15 115.93 270 500R R0201
+R113 73.75 115.93 270 500R R0201
+R114 72.30 115.93 270 500R R0201
+R115 76.36 213.18  90 50R R0201
+R116 76.37 214.26 270 50R R0201
+R117 69.78 212.87 180 4.7k R0201
+R118 31.58 26.98 270 1k R0201
+R119 31.37 17.93 180 2.443k R0201
+R120 34.66 17.92   0 2.443k R0201
+R121 34.61 26.18 180 2.443k R0201
+R122 31.32 26.17   0 2.443k R0201
+R123 49.20 18.43 270 10k R0201
+R124 117.45 43.27  90 1k R0201
+R125 107.40 43.47  90 1k R0201
+R126 97.35 43.42  90 1k R0201
+R127 87.50 43.37  90 1k R0201
+R128 84.45 32.08 270 1k R0201
+R129 94.60 31.88 270 1k R0201
+R130 104.68 31.73 270 1k R0201
+R131 114.43 31.78 270 1k R0201
+R132 105.53 39.53 180 5R R0201
+R133 167.67 43.27  90 1k R0201
+R134 157.37 43.42  90 1k R0201
+R135 147.32 43.37  90 1k R0201
+R136 137.52 43.32  90 1k R0201
+R137 134.48 31.78 270 1k R0201
+R138 69.03 171.15 180 1k R0201
+R139 69.03 170.50 180 1k R0201
+R140 69.03 169.84 180 1k R0201
+R141 69.03 169.17 180 4.7k R0201
+R142 37.34 187.53   0 4.7k R0201
+R143 60.07 183.41   0 4.7k R0201
+R144 60.07 184.08   0 1k R0201
+R145 31.18 211.95 180 10k R0201
+R146 37.53 214.86 270 2.2k R0201
+R147 144.63 31.73 270 1k R0201
+R148 154.68 31.83 270 1k R0201
+R149 165.58 31.73 270 1k R0201
+R150 155.33 39.49 180 5R R0201
+R151 154.47 37.43   0 10k R0201
+R152 202.92 30.22  90 5R R0201
+R153 200.33 30.48 270 10k R0201
+R154 42.27 165.29   0 22.1k R0201
+R155 35.92 165.29   0 22.1k R0201
+R156 29.57 165.29   0 22.1k R0201
+R157 23.22 165.29   0 22.1k R0201
+R158 87.62 181.59   0 22.1k R0201
+R159 87.62 182.49   0 22.1k R0201
+R160 87.62 183.44   0 22.1k R0201
+R161 87.62 184.44   0 22.1k R0201
+R162 87.62 185.34   0 22.1k R0201
+R163 87.62 186.24   0 22.1k R0201
+R164 87.62 187.14   0 22.1k R0201
+R165 63.47 133.96 270 25R R0201
+R166 54.05 134.03 270 25R R0201
+R167 61.82 97.48   0 1k R0201
+R168 61.82 98.03   0 1k R0201
+R169 79.72 90.07  90 1k R0201
+R170 79.17 90.07  90 1k R0201
+R171 86.58 98.07 180 1k R0201
+R172 86.58 98.62 180 1k R0201
+R173 63.50 156.75  90 100R R0201
+RF_SW_1 137.90 204.14 315 M3SWA2-34DR+ 16_QFN
+RF_SW_2 163.86 205.85  45 M3SWA2-34DR+ 16_QFN
+RF_SW_3 136.15 230.16 225 M3SWA2-34DR+ 16_QFN
+RF_SW_4 162.10 231.77 135 M3SWA2-34DR+ 16_QFN
+RF_SW_5 213.60 203.94 315 M3SWA2-34DR+ 16_QFN
+RF_SW_6 240.51 205.15  45 M3SWA2-34DR+ 16_QFN
+RF_SW_7 212.14 230.10 225 M3SWA2-34DR+ 16_QFN
+RF_SW_8 238.50 232.26 135 M3SWA2-34DR+ 16_QFN
+RF_SW_9 213.10 127.09 315 M3SWA2-34DR+ 16_QFN
+RF_SW_10 240.36 129.30  45 M3SWA2-34DR+ 16_QFN
+RF_SW_11 211.04 155.25 225 M3SWA2-34DR+ 16_QFN
+RF_SW_12 238.60 156.31 135 M3SWA2-34DR+ 16_QFN
+RF_SW_13 137.05 127.19 315 M3SWA2-34DR+ 16_QFN
+RF_SW_14 164.46 129.20  45 M3SWA2-34DR+ 16_QFN
+RF_SW_15 135.09 155.10 225 M3SWA2-34DR+ 16_QFN
+RF_SW_16 163.25 156.71 135 M3SWA2-34DR+ 16_QFN
+S1 98.41 109.95  90 MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM TACTILE_SWITCH_SMD_4.6X2.8MM
+SJ1 47.68 155.81  90  SJ_2
+U$1 116.18 179.55 270 M3SWA2-34DR+ 16_QFN
+U$2 91.65 211.91 180 BPF2 BPF2
+U$3 91.93 147.07   0 BPF2 BPF2
+U1 58.60 159.25 270 AD9484BCPZ-500 CP_56_5_ADI
+U2 74.41 102.23 180 STM32F746ZGT7 LQFP-144_STM
+U3 60.39 207.89  90 AD9708AR RW_28_ADI
+U4 58.59 145.49  90 AD8352ACPZ-R7 CP_16_3_ADI
+U5 82.49 214.01   0 LTC5552IUDBTRMPBF UDB_12_ADI
+U6 36.17 205.07   0 FT2232HQ 64QFN_FT2232HQ_FTD
+U7 48.66 50.54   0 DAC5578SRGET RGE24_2P7X2P7
+U8 58.72 136.47  90 AD8352ACPZ-R7 CP_16_3_ADI
+U9 22.04 183.82 180 MT25QL01GBBB8E12-0AUT BGA24_MT25QL_MRN
+U10 100.04 37.25   0 ADS7830IPWR PW16
+U11 115.00 45.14   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U13 82.76 144.55 180 LTC5552IUDBTRMPBF UDB_12_ADI
+U14 110.85 176.62 270 SZMMSZ5232BT1G SOD-123_ONS
+U15 110.85 182.37 270 SZMMSZ5232BT1G SOD-123_ONS
+U16 187.75 180.00 180 EP4RKU+ DG1677-2_MNC
+U17 128.49 232.25 225 SZMMSZ5232BT1G SOD-123_ONS
+U37 133.83 237.34 225 SZMMSZ5232BT1G SOD-123_ONS
+U38 164.30 238.84 135 SZMMSZ5232BT1G SOD-123_ONS
+U39 169.16 234.38 135 SZMMSZ5232BT1G SOD-123_ONS
+U40 171.01 203.72  45 SZMMSZ5232BT1G SOD-123_ONS
+U41 166.66 199.06  45 SZMMSZ5232BT1G SOD-123_ONS
+U42 49.68 183.28   0 XC7A50T-2FTG256I BGA256C100P16X16_1700X1700X155
+U43 135.61 195.39 315 SZMMSZ5232BT1G SOD-123_ONS
+U44 129.06 201.24 315 SZMMSZ5232BT1G SOD-123_ONS
+U45 203.29 232.19 225 SZMMSZ5232BT1G SOD-123_ONS
+U46 209.35 238.11 225 SZMMSZ5232BT1G SOD-123_ONS
+U47 203.01 158.96 225 SZMMSZ5232BT1G SOD-123_ONS
+U48 207.96 163.71 225 SZMMSZ5232BT1G SOD-123_ONS
+U49 210.04 120.11 315 SZMMSZ5232BT1G SOD-123_ONS
+U50 205.59 124.76 315 SZMMSZ5232BT1G SOD-123_ONS
+U51 248.29 126.73  45 SZMMSZ5232BT1G SOD-123_ONS
+U52 243.44 122.18  45 SZMMSZ5232BT1G SOD-123_ONS
+U53 172.18 126.35  45 SZMMSZ5232BT1G SOD-123_ONS
+U54 167.83 122.10  45 SZMMSZ5232BT1G SOD-123_ONS
+U55 167.03 163.87 135 SZMMSZ5232BT1G SOD-123_ONS
+U56 173.18 159.01 135 SZMMSZ5232BT1G SOD-123_ONS
+U57 126.84 158.23 225 SZMMSZ5232BT1G SOD-123_ONS
+U58 132.19 163.58 225 SZMMSZ5232BT1G SOD-123_ONS
+U59 133.37 120.04 315 SZMMSZ5232BT1G SOD-123_ONS
+U60 128.72 124.59 315 SZMMSZ5232BT1G SOD-123_ONS
+U61 210.16 197.51 315 SZMMSZ5232BT1G SOD-123_ONS
+U62 206.61 201.76 315 SZMMSZ5232BT1G SOD-123_ONS
+U63 247.59 201.96  45 SZMMSZ5232BT1G SOD-123_ONS
+U64 246.37 158.82 135 SZMMSZ5232BT1G SOD-123_ONS
+U65 241.52 164.27 135 SZMMSZ5232BT1G SOD-123_ONS
+U66 243.12 198.13  45 SZMMSZ5232BT1G SOD-123_ONS
+U67 241.12 239.87 135 SZMMSZ5232BT1G SOD-123_ONS
+U68 245.87 234.92 135 SZMMSZ5232BT1G SOD-123_ONS
+U69 48.35 21.44   0 DAC5578SRGET RGE24_2P7X2P7
+U73 105.00 45.24   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U74 94.97 45.22   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U75 85.02 45.18   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U76 86.84 30.28 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U77 96.86 30.03 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U78 107.22 30.01 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U79 116.87 29.97 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U80 164.99 45.18   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U81 154.84 45.21   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U82 144.83 45.10   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U83 134.88 45.06   0 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U84 137.03 30.02 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U85 147.02 30.05 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U86 157.06 30.07 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U87 167.98 29.93 180 INA241A3IDGKRDGK0008A-MFG DGK0008A-MFG
+U88 149.99 37.12   0 ADS7830IPWR PW16
+U89 200.60 35.26 270 ADS7830IPWR PW16
+X2  5.30 205.16   0 MINI-USB-32005-201 32005-201
+X53  5.33 107.56   0 MINI-USB-32005-201 32005-201
+XTAL1 90.58 104.75 270 NX3225GD-8MHZ-STD-CRA-3 XTAL_NX3225GD-8MHZ-STD-CRA-3_N
+XTAL3 90.68 97.21 270 NX3215SA-32.768KHz XTAL_NX3225GD-8MHZ-STD-CRA-3_N
+Y1 27.42 208.60  60 ECS-120-10-36B2-JTN-TR CRYSTAL-SMD-2X2.5MM
@@ -0,0 +1,692 @@
+G75*
+%MOIN*%
+%OFA0B0*%
+%FSLAX25Y25*%
+%IPPOS*%
+%LPD*%
+%AMOC8*
+5,1,8,0,0,1.08239X$1,22.5*
+%
+%ADD10C,0.12998*%
+%ADD11C,0.07451*%
+%ADD12C,0.04888*%
+%ADD13C,0.05774*%
+%ADD14OC8,0.06400*%
+%ADD15C,0.06400*%
+%ADD16C,0.03369*%
+%ADD17C,0.06306*%
+%ADD18C,0.03943*%
+%ADD19C,0.03353*%
+%ADD20C,0.06306*%
+%ADD21C,0.07487*%
+D10*
+X0021526Y0017248D03*
+X0462471Y0450319D03*
+X0462471Y0985752D03*
+X0021526Y1166854D03*
+X1013652Y1166854D03*
+X1013652Y0985752D03*
+X1013652Y0450319D03*
+X1013652Y0017248D03*
+D11*
+X0928258Y0471059D03*
+X0942400Y0485201D03*
+X0928258Y0499343D03*
+X0914116Y0485201D03*
+X0881888Y0477602D03*
+X0867746Y0463460D03*
+X0853604Y0477602D03*
+X0867746Y0491744D03*
+X0832991Y0526382D03*
+X0818848Y0540524D03*
+X0804706Y0526382D03*
+X0818848Y0512240D03*
+X0813061Y0576767D03*
+X0798919Y0590909D03*
+X0813061Y0605052D03*
+X0827203Y0590909D03*
+X0859911Y0623224D03*
+X0845769Y0637366D03*
+X0859911Y0651508D03*
+X0874054Y0637366D03*
+X0909470Y0640122D03*
+X0923612Y0654264D03*
+X0937754Y0640122D03*
+X0923612Y0625980D03*
+X0958013Y0592130D03*
+X0972156Y0606272D03*
+X0986298Y0592130D03*
+X0972156Y0577988D03*
+X0972116Y0543831D03*
+X0957974Y0529689D03*
+X0972116Y0515547D03*
+X0986258Y0529689D03*
+X0926801Y0767752D03*
+X0912659Y0781894D03*
+X0926801Y0796036D03*
+X0940943Y0781894D03*
+X0979400Y0820468D03*
+X0993542Y0834610D03*
+X0979400Y0848752D03*
+X0965258Y0834610D03*
+X0972510Y0875586D03*
+X0986652Y0889728D03*
+X0972510Y0903870D03*
+X0958368Y0889728D03*
+X0919163Y0928736D03*
+X0905021Y0942878D03*
+X0919163Y0957020D03*
+X0933306Y0942878D03*
+X0880747Y0934610D03*
+X0866604Y0920468D03*
+X0852462Y0934610D03*
+X0866604Y0948752D03*
+X0813455Y0895209D03*
+X0827597Y0881067D03*
+X0813455Y0866925D03*
+X0799313Y0881067D03*
+X0819754Y0844619D03*
+X0833896Y0830476D03*
+X0819754Y0816334D03*
+X0805612Y0830476D03*
+X0853210Y0782406D03*
+X0867352Y0796548D03*
+X0881495Y0782406D03*
+X0867352Y0768263D03*
+X0692400Y0837957D03*
+X0678258Y0852099D03*
+X0664116Y0837957D03*
+X0678258Y0823815D03*
+X0639369Y0784531D03*
+X0625226Y0770389D03*
+X0611084Y0784531D03*
+X0625226Y0798674D03*
+X0588581Y0778035D03*
+X0574439Y0763893D03*
+X0560297Y0778035D03*
+X0574439Y0792178D03*
+X0535825Y0830988D03*
+X0521683Y0845130D03*
+X0507541Y0830988D03*
+X0521683Y0816846D03*
+X0514208Y0867285D03*
+X0528350Y0881428D03*
+X0514208Y0895570D03*
+X0500066Y0881428D03*
+X0553644Y0934649D03*
+X0567786Y0920507D03*
+X0581928Y0934649D03*
+X0567786Y0948791D03*
+X0603958Y0941028D03*
+X0618100Y0955170D03*
+X0632243Y0941028D03*
+X0618100Y0926885D03*
+X0657147Y0887878D03*
+X0671289Y0902020D03*
+X0685432Y0887878D03*
+X0671289Y0873736D03*
+X0629124Y0653201D03*
+X0614982Y0639059D03*
+X0629124Y0624917D03*
+X0643266Y0639059D03*
+X0673455Y0609697D03*
+X0687597Y0595555D03*
+X0673455Y0581413D03*
+X0659313Y0595555D03*
+X0676250Y0545800D03*
+X0662108Y0531657D03*
+X0676250Y0517515D03*
+X0690392Y0531657D03*
+X0642951Y0484217D03*
+X0628809Y0470074D03*
+X0614667Y0484217D03*
+X0628809Y0498359D03*
+X0581731Y0478547D03*
+X0567589Y0464405D03*
+X0553447Y0478547D03*
+X0567589Y0492689D03*
+X0532400Y0527445D03*
+X0518258Y0541587D03*
+X0504116Y0527445D03*
+X0518258Y0513303D03*
+X0512471Y0574523D03*
+X0526613Y0588665D03*
+X0512471Y0602807D03*
+X0498328Y0588665D03*
+X0548407Y0638469D03*
+X0562549Y0624326D03*
+X0576691Y0638469D03*
+X0562549Y0652611D03*
+X0341486Y0550280D03*
+X0321486Y0550280D03*
+X0321486Y0530280D03*
+X0341486Y0530280D03*
+X0279557Y0723390D03*
+X0279557Y0743390D03*
+X0279597Y0760161D03*
+X0279597Y0780161D03*
+X0259597Y0780161D03*
+X0259597Y0760161D03*
+X0259557Y0743390D03*
+X0259557Y0723390D03*
+X0220502Y0869650D03*
+X0220502Y0889650D03*
+X0200502Y0889650D03*
+X0200502Y0869650D03*
+X0320581Y0864768D03*
+X0320581Y0884768D03*
+X0340581Y0884768D03*
+X0340581Y0864768D03*
+D12*
+X0301841Y0711953D03*
+X0301841Y0706953D03*
+X0308691Y0621170D03*
+X0308691Y0616170D03*
+D13*
+X0303691Y0613670D03*
+X0313691Y0613670D03*
+X0313691Y0623670D03*
+X0303691Y0623670D03*
+X0306841Y0704453D03*
+X0306841Y0714453D03*
+X0296841Y0714453D03*
+X0296841Y0704453D03*
+D14*
+X0207746Y0503114D03*
+X0207746Y0493114D03*
+X0207746Y0483114D03*
+X0207746Y0473114D03*
+X0207746Y0463114D03*
+X0207746Y0453114D03*
+X0207746Y0443114D03*
+X0207746Y0433114D03*
+X0207746Y0423114D03*
+X0207746Y0413114D03*
+X0197746Y0413114D03*
+X0197746Y0423114D03*
+X0197746Y0433114D03*
+X0197746Y0443114D03*
+X0197746Y0453114D03*
+X0197746Y0463114D03*
+X0197746Y0473114D03*
+X0197746Y0483114D03*
+X0197746Y0493114D03*
+X0197746Y0503114D03*
+X0304833Y0320358D03*
+X0304833Y0310358D03*
+X0314833Y0310358D03*
+X0324833Y0310358D03*
+X0334833Y0310358D03*
+X0344833Y0310358D03*
+X0354833Y0310358D03*
+X0364833Y0310358D03*
+X0364833Y0320358D03*
+X0354833Y0320358D03*
+X0344833Y0320358D03*
+X0334833Y0320358D03*
+X0324833Y0320358D03*
+X0314833Y0320358D03*
+X0408730Y0365437D03*
+X0408730Y0375437D03*
+X0408730Y0385437D03*
+X0408730Y0395437D03*
+X0408730Y0405437D03*
+X0408730Y0415437D03*
+X0418730Y0415437D03*
+X0418730Y0405437D03*
+X0418730Y0395437D03*
+X0418730Y0385437D03*
+X0418730Y0375437D03*
+X0418730Y0365437D03*
+X0027589Y0712563D03*
+X0027589Y0722563D03*
+X0027589Y0732563D03*
+X0027589Y0742563D03*
+X0017589Y0742563D03*
+X0017589Y0732563D03*
+X0017589Y0722563D03*
+X0017589Y0712563D03*
+D15*
+X0255423Y0498122D02*
+X0255423Y0492122D01*
+X0265423Y0492122D02*
+X0265423Y0498122D01*
+X0275423Y0498122D02*
+X0275423Y0492122D01*
+X0212116Y0375051D02*
+X0212116Y0369051D01*
+X0202116Y0369051D02*
+X0202116Y0375051D01*
+X0192116Y0375051D02*
+X0192116Y0369051D01*
+X0182116Y0369051D02*
+X0182116Y0375051D01*
+X0172116Y0375051D02*
+X0172116Y0369051D01*
+X0162116Y0369051D02*
+X0162116Y0375051D01*
+X0152116Y0375051D02*
+X0152116Y0369051D01*
+X0142116Y0369051D02*
+X0142116Y0375051D01*
+X0142471Y0345051D02*
+X0142471Y0339051D01*
+X0152471Y0339051D02*
+X0152471Y0345051D01*
+X0132471Y0345051D02*
+X0132471Y0339051D01*
+X0122471Y0339051D02*
+X0122471Y0345051D01*
+X0161762Y0322886D02*
+X0161762Y0316886D01*
+X0171762Y0316886D02*
+X0171762Y0322886D01*
+X0181762Y0322886D02*
+X0181762Y0316886D01*
+X0191762Y0316886D02*
+X0191762Y0322886D01*
+X0201762Y0322886D02*
+X0201762Y0316886D01*
+X0211762Y0316886D02*
+X0211762Y0322886D01*
+X0211526Y0341098D02*
+X0211526Y0347098D01*
+X0201526Y0347098D02*
+X0201526Y0341098D01*
+X0191526Y0341098D02*
+X0191526Y0347098D01*
+X0181526Y0347098D02*
+X0181526Y0341098D01*
+X0233959Y0320358D02*
+X0239959Y0320358D01*
+X0239959Y0310358D02*
+X0233959Y0310358D01*
+X0233959Y0300358D02*
+X0239959Y0300358D01*
+X0239959Y0290358D02*
+X0233959Y0290358D01*
+X0258368Y0300201D02*
+X0264368Y0300201D01*
+X0264368Y0310201D02*
+X0258368Y0310201D01*
+X0258368Y0320201D02*
+X0264368Y0320201D01*
+X0280219Y0319925D02*
+X0286219Y0319925D01*
+X0286219Y0309925D02*
+X0280219Y0309925D01*
+X0280219Y0299925D02*
+X0286219Y0299925D01*
+X0311833Y0750437D02*
+X0317833Y0750437D01*
+X0317833Y0760437D02*
+X0311833Y0760437D01*
+X0724510Y0209177D02*
+X0730510Y0209177D01*
+X0730510Y0199177D02*
+X0724510Y0199177D01*
+X0724510Y0189177D02*
+X0730510Y0189177D01*
+X0744982Y0189098D02*
+X0750982Y0189098D01*
+X0750982Y0199098D02*
+X0744982Y0199098D01*
+X0744982Y0209098D02*
+X0750982Y0209098D01*
+X0765848Y0208154D02*
+X0771848Y0208154D01*
+X0771848Y0198154D02*
+X0765848Y0198154D01*
+X0765848Y0188154D02*
+X0771848Y0188154D01*
+X0785730Y0187839D02*
+X0791730Y0187839D01*
+X0791730Y0197839D02*
+X0785730Y0197839D01*
+X0785730Y0207839D02*
+X0791730Y0207839D01*
+X0807384Y0208272D02*
+X0813384Y0208272D01*
+X0813384Y0198272D02*
+X0807384Y0198272D01*
+X0807384Y0188272D02*
+X0813384Y0188272D01*
+X0828447Y0188232D02*
+X0834447Y0188232D01*
+X0834447Y0198232D02*
+X0828447Y0198232D01*
+X0828447Y0208232D02*
+X0834447Y0208232D01*
+X0848919Y0208862D02*
+X0854919Y0208862D01*
+X0854919Y0198862D02*
+X0848919Y0198862D01*
+X0848919Y0188862D02*
+X0854919Y0188862D01*
+X0868408Y0188902D02*
+X0874408Y0188902D01*
+X0874408Y0198902D02*
+X0868408Y0198902D01*
+X0868408Y0208902D02*
+X0874408Y0208902D01*
+D16*
+X0200452Y0203576D03*
+X0197352Y0203576D03*
+X0194252Y0203576D03*
+X0194252Y0200476D03*
+X0194252Y0197376D03*
+X0197352Y0197376D03*
+X0197352Y0200476D03*
+X0200452Y0200476D03*
+X0200452Y0197376D03*
+X0199232Y0089009D03*
+X0199232Y0085909D03*
+X0199232Y0082809D03*
+X0196132Y0082809D03*
+X0193032Y0082809D03*
+X0193032Y0085909D03*
+X0196132Y0085909D03*
+X0196132Y0089009D03*
+X0193032Y0089009D03*
+D17*
+X0170226Y0114689D02*
+X0170226Y0120594D01*
+X0160226Y0120594D02*
+X0160226Y0114689D01*
+X0160226Y0061539D02*
+X0160226Y0055634D01*
+X0170226Y0055634D02*
+X0170226Y0061539D01*
+X0218888Y0062327D02*
+X0218888Y0056421D01*
+X0228888Y0056421D02*
+X0228888Y0062327D01*
+X0228888Y0115476D02*
+X0228888Y0121382D01*
+X0218888Y0121382D02*
+X0218888Y0115476D01*
+X0219282Y0173744D02*
+X0219282Y0179650D01*
+X0229282Y0179650D02*
+X0229282Y0173744D01*
+X0278337Y0173744D02*
+X0278337Y0179650D01*
+X0288337Y0179650D02*
+X0288337Y0173744D01*
+X0287943Y0121382D02*
+X0287943Y0115476D01*
+X0277943Y0115476D02*
+X0277943Y0121382D01*
+X0277943Y0062327D02*
+X0277943Y0056421D01*
+X0287943Y0056421D02*
+X0287943Y0062327D01*
+X0330954Y0077375D02*
+X0330954Y0083281D01*
+X0340954Y0083281D02*
+X0340954Y0077375D01*
+X0350954Y0077375D02*
+X0350954Y0083281D01*
+X0369728Y0082963D02*
+X0369728Y0077058D01*
+X0379728Y0077058D02*
+X0379728Y0082963D01*
+X0389728Y0082963D02*
+X0389728Y0077058D01*
+X0409412Y0076750D02*
+X0409412Y0082655D01*
+X0419412Y0082655D02*
+X0419412Y0076750D01*
+X0429412Y0076750D02*
+X0429412Y0082655D01*
+X0447944Y0082895D02*
+X0447944Y0076990D01*
+X0457944Y0076990D02*
+X0457944Y0082895D01*
+X0467944Y0082895D02*
+X0467944Y0076990D01*
+X0527441Y0077392D02*
+X0527441Y0083297D01*
+X0537441Y0083297D02*
+X0537441Y0077392D01*
+X0547441Y0077392D02*
+X0547441Y0083297D01*
+X0566712Y0083508D02*
+X0566712Y0077602D01*
+X0576712Y0077602D02*
+X0576712Y0083508D01*
+X0586712Y0083508D02*
+X0586712Y0077602D01*
+X0606046Y0076755D02*
+X0606046Y0082661D01*
+X0616046Y0082661D02*
+X0616046Y0076755D01*
+X0626046Y0076755D02*
+X0626046Y0082661D01*
+X0645054Y0083075D02*
+X0645054Y0077169D01*
+X0655054Y0077169D02*
+X0655054Y0083075D01*
+X0665054Y0083075D02*
+X0665054Y0077169D01*
+X0664969Y0214900D02*
+X0664969Y0220805D01*
+X0654969Y0220805D02*
+X0654969Y0214900D01*
+X0644969Y0214900D02*
+X0644969Y0220805D01*
+X0625663Y0220802D02*
+X0625663Y0214896D01*
+X0615663Y0214896D02*
+X0615663Y0220802D01*
+X0605663Y0220802D02*
+X0605663Y0214896D01*
+X0586764Y0214893D02*
+X0586764Y0220798D01*
+X0576764Y0220798D02*
+X0576764Y0214893D01*
+X0566764Y0214893D02*
+X0566764Y0220798D01*
+X0547034Y0220947D02*
+X0547034Y0215041D01*
+X0537034Y0215041D02*
+X0537034Y0220947D01*
+X0527034Y0220947D02*
+X0527034Y0215041D01*
+X0468617Y0215083D02*
+X0468617Y0220989D01*
+X0458617Y0220989D02*
+X0458617Y0215083D01*
+X0448617Y0215083D02*
+X0448617Y0220989D01*
+X0429181Y0221390D02*
+X0429181Y0215484D01*
+X0419181Y0215484D02*
+X0419181Y0221390D01*
+X0409181Y0221390D02*
+X0409181Y0215484D01*
+X0389141Y0215373D02*
+X0389141Y0221279D01*
+X0379141Y0221279D02*
+X0379141Y0215373D01*
+X0369141Y0215373D02*
+X0369141Y0221279D01*
+X0349931Y0221316D02*
+X0349931Y0215410D01*
+X0339931Y0215410D02*
+X0339931Y0221316D01*
+X0329931Y0221316D02*
+X0329931Y0215410D01*
+X0288337Y0232799D02*
+X0288337Y0238705D01*
+X0278337Y0238705D02*
+X0278337Y0232799D01*
+X0229282Y0232799D02*
+X0229282Y0238705D01*
+X0219282Y0238705D02*
+X0219282Y0232799D01*
+X0171014Y0232602D02*
+X0171014Y0238508D01*
+X0161014Y0238508D02*
+X0161014Y0232602D01*
+X0161014Y0179453D02*
+X0161014Y0173547D01*
+X0171014Y0173547D02*
+X0171014Y0179453D01*
+X0111959Y0179453D02*
+X0111959Y0173547D01*
+X0101959Y0173547D02*
+X0101959Y0179453D01*
+X0101959Y0232602D02*
+X0101959Y0238508D01*
+X0111959Y0238508D02*
+X0111959Y0232602D01*
+X0028219Y0228705D02*
+X0022313Y0228705D01*
+X0022313Y0238705D02*
+X0028219Y0238705D01*
+X0028297Y0192524D02*
+X0022392Y0192524D01*
+X0022392Y0182524D02*
+X0028297Y0182524D01*
+X0101171Y0120594D02*
+X0101171Y0114689D01*
+X0111171Y0114689D02*
+X0111171Y0120594D01*
+X0111171Y0061539D02*
+X0111171Y0055634D01*
+X0101171Y0055634D02*
+X0101171Y0061539D01*
+X0028219Y0063902D02*
+X0022313Y0063902D01*
+X0022313Y0073902D02*
+X0028219Y0073902D01*
+X0026526Y0338626D02*
+X0020620Y0338626D01*
+X0020620Y0348626D02*
+X0026526Y0348626D01*
+X0024557Y0553823D02*
+X0030463Y0553823D01*
+X0030463Y0563823D02*
+X0024557Y0563823D01*
+X0027313Y0611539D02*
+X0021408Y0611539D01*
+X0021408Y0621539D02*
+X0027313Y0621539D01*
+X0026762Y0646736D02*
+X0020856Y0646736D01*
+X0020856Y0656736D02*
+X0026762Y0656736D01*
+X0027313Y0675791D02*
+X0021408Y0675791D01*
+X0021408Y0685791D02*
+X0027313Y0685791D01*
+X0026526Y0867681D02*
+X0032431Y0867681D01*
+X0032431Y0877681D02*
+X0026526Y0877681D01*
+X0026919Y0995122D02*
+X0021014Y0995122D01*
+X0021014Y1005122D02*
+X0026919Y1005122D01*
+X0467313Y1096106D02*
+X0467313Y1102012D01*
+X0477313Y1102012D02*
+X0477313Y1096106D01*
+X0711014Y1093429D02*
+X0711014Y1087524D01*
+X0721014Y1087524D02*
+X0721014Y1093429D01*
+X0735187Y1123075D02*
+X0735187Y1128980D01*
+X0745187Y1128980D02*
+X0745187Y1123075D01*
+X0752352Y1093429D02*
+X0752352Y1087524D01*
+X0762352Y1087524D02*
+X0762352Y1093429D01*
+X0796289Y1095909D02*
+X0796289Y1090004D01*
+X0806289Y1090004D02*
+X0806289Y1095909D01*
+X0956171Y1093154D02*
+X0956171Y1099059D01*
+X0966171Y1099059D02*
+X0966171Y1093154D01*
+X0974793Y0429610D02*
+X0980699Y0429610D01*
+X0980699Y0419610D02*
+X0974793Y0419610D01*
+X0974478Y0398232D02*
+X0980384Y0398232D01*
+X0980384Y0388232D02*
+X0974478Y0388232D01*
+X0973219Y0312720D02*
+X0979124Y0312720D01*
+X0979124Y0302720D02*
+X0973219Y0302720D01*
+X0973415Y0249492D02*
+X0979321Y0249492D01*
+X0979321Y0239492D02*
+X0973415Y0239492D01*
+X0973415Y0179492D02*
+X0979321Y0179492D01*
+X0979321Y0169492D02*
+X0973415Y0169492D01*
+X0749045Y0308665D02*
+X0749045Y0314571D01*
+X0739045Y0314571D02*
+X0739045Y0308665D01*
+X0735463Y0356697D02*
+X0735463Y0362602D01*
+X0745463Y0362602D02*
+X0745463Y0356697D01*
+X0495226Y0360634D02*
+X0495226Y0366539D01*
+X0485226Y0366539D02*
+X0485226Y0360634D01*
+D18*
+X0026762Y0416303D03*
+X0026762Y0433626D03*
+X0026644Y0800555D03*
+X0026644Y0817878D03*
+X0664636Y1135161D03*
+X0671919Y1135358D03*
+X0680778Y1130634D03*
+X0760896Y1142642D03*
+X0812274Y1132209D03*
+X0821919Y1136539D03*
+X0829400Y1136933D03*
+D19*
+X0749400Y0714650D03*
+X0749203Y0710319D03*
+X0744872Y0710122D03*
+X0744872Y0714650D03*
+X0740345Y0714846D03*
+X0740345Y0710319D03*
+X0740345Y0705594D03*
+X0745069Y0705201D03*
+X0749203Y0705594D03*
+X0405482Y0880634D03*
+X0397510Y0884669D03*
+X0390915Y0884669D03*
+X0390719Y0530535D03*
+X0396132Y0530339D03*
+X0403514Y0526008D03*
+X0179597Y0141657D03*
+X0171132Y0138508D03*
+X0161880Y0140673D03*
+X0153219Y0137327D03*
+X0051250Y0096579D03*
+X0043967Y0037720D03*
+D20*
+X0447411Y0539197D03*
+X0348199Y0847760D03*
+X0380778Y0891165D03*
+X0348297Y0964098D03*
+D21*
+X0121992Y0620994D03*
+X0429400Y0262524D03*
+X0531368Y0259374D03*
+X0558927Y0029059D03*
+M02*
@@ -0,0 +1,105 @@
+"Qty";"Value";"Device";"Package";"Parts";"Description";"AVAILABILITY";"CHECK_PRICES";"COPYRIGHT";"DATASHEET";"DESCRIPTION";"HEIGHT";"MANUFACTURER_NAME";"MANUFACTURER_PART_NUMBER";"MF";"MFR_NAME";"MOUSER_PART_NUMBER";"MOUSER_PRICE-STOCK";"MP";"MPN";"OC_FARNELL";"OC_NEWARK";"PACKAGE";"POPULARITY";"PRICE";"PROD_ID";"REFDES";"SNAPEDA_LINK";"SPICEMODEL";"SPICEPREFIX";"TYPE";"VALUE";
+"11";"";"L-EUL5650M";"L5650M";"L1, L11, L12, L13, L14, L15, L16, L17, L18, L21, L23";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"L";"";"";
+"1";"";"MA10-2";"MA10-2";"SV1";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"";"3";"";"";"";"";"";"";"";"";
+"1";"";"PINHD-1X2";"1X02";"JP20";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"98";"";"";"";"";"";"";"";"";
+"11";"";"PINHD-1X3";"1X03";"JP4, JP5, JP6, JP10, JP11, JP12, JP14, JP15, JP16, JP17, JP19";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"92";"";"";"";"";"";"";"";"";
+"3";"";"PINHD-1X4";"1X04";"JP8, JP9, JP18";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"91";"";"";"";"";"";"";"";"";
+"1";"";"PINHD-1X6";"1X06";"JP2";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"79";"";"";"";"";"";"";"";"";
+"1";"";"PINHD-1X8";"1X08";"JP7";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"67";"";"";"";"";"";"";"";"";
+"1";"";"PINHD-2X4";"2X04";"JP3";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"47";"";"";"";"";"";"";"";"";
+"1";"";"PINHD-2X6";"2X06";"JP1";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"8";"";"";"";"";"";"";"";"";
+"1";"";"PINHD-2X7";"2X07";"JP13";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"8";"";"";"";"";"";"";"";"";
+"1";"";"SJ2W";"SJ_2";"SJ1";"SMD solder JUMPER";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"7";"";"";"";"";"";"";"";"";
+"71";"0.1uF";"CC0201";"C0201";"C1, C2, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C36, C38, C39, C41, C42, C44, C45, C46, C47, C51, C52, C53, C56, C67, C69, C74, C80, C82, C125, C131, C133, C138, C140, C146, C148, C159, C160, C162, C168, C170, C175, C188, C189, C190, C192, C193, C194, C195, C196, C201, C203, C208, C210, C215, C217, C222, C224, C229, C231, C236, C238, C243, C245, C250, C252, C293";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"0.1µF";"C-EUC0402";"C0402";"C48, C49, C57, C58";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"";"";"";"";"C";"";"";
+"6";"0.1µF";"CC0201";"C0201";"C277, C278, C295, C297, C299, C301";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"0.2pF";"C-EUC0201";"C0201";"C43";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"C";"";"";
+"13";"0.47uF";"CC0201";"C0201";"C110, C111, C112, C113, C155, C156, C157, C158, C179, C180, C181, C182, C291";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"0.6pF";"C-EUC0201";"C0201";"C54";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"C";"";"";
+"4";"0R";"RR0201";"R0201";"R18, R19, R34, R35";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"12";"100R";"RR0201";"R0201";"R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R173";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"28";"100nF";"C-EUC0402";"C0402";"C76, C78, C258, C259, C260, C262, C264, C266, C313, C317, C320, C324, C327, C331, C334, C337, C339, C341, C342, C343, C344, C345, C346, C347, C348, C349, C350, C351";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"";"";"";"";"C";"";"";
+"24";"100nF";"CC0201";"C0201";"C24, C25, C26, C27, C28, C29, C30, C32, C33, C34, C35, C50, C256, C257, C279, C281, C298, C302, C303, C304, C305, C306, C307, C310";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"34";"100pF";"CC0201";"C0201";"C66, C68, C73, C79, C81, C124, C130, C132, C137, C139, C145, C147, C152, C161, C167, C169, C174, C183, C200, C202, C207, C209, C214, C216, C221, C223, C228, C230, C235, C237, C242, C244, C249, C251";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"103pF";"CC0201";"C0201";"C60, C63";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"106pF";"CC0201";"C0201";"C141";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"107.3nH";"LL0201";"L0201";"L22, L25, L26, L27";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"9";"10k";"RR0201";"R0201";"R39, R40, R83, R84, R111, R123, R145, R151, R153";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"16";"10nF";"CC0201";"C0201";"C102, C103, C104, C105, C106, C107, C114, C115, C116, C117, C118, C119, C120, C121, C122, C123";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"10uF";"CC0201";"C0201";"C37, C40";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"12";"10µF";"C-EUC0805";"C0805";"C75, C77, C312, C316, C319, C323, C326, C330, C333, C336, C338, C340";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"";"";"";"";"C";"";"";
+"1";"115R";"R-EU_R0201";"R0201";"R14";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"2";"12nH";"LL0201";"L0201";"L2, L8";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"2";"12pF";"CC0201";"C0201";"C184, C185";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"37";"142-0731-211";"142-0731-211";"1420731211";"J1, J18, J20, J22, J23, J24, J25, J26, J27, J28, J29, J30, J31, J32, J33, J34, J35, J36, J37, J38, J39, J40, J41, J42, J43, J44, J45, J46, J47, J48, J49, J50, J51, J52, J53, J54, J55";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"";"";"";"";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"9.8852mm";"Cinch Connectivity Solutions";"142-0731-211";"";"";"530-142-0731-211";"https://www.mouser.co.uk/ProductDetail/Johnson-Cinch-Connectivity-Solutions/142-0731-211?qs=HFfMDpzxxd0OVzI3hm9tuA%3D%3D";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"2";"159nH";"LL0201";"L0201";"L3, L4";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"2";"18pF";"CC0201";"C0201";"C272, C274";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"1k";"R-EU_R0402";"R0402";"R37";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"49";"1k";"RR0201";"R0201";"R41, R43, R55, R56, R57, R58, R59, R61, R82, R85, R86, R87, R88, R93, R94, R99, R100, R101, R102, R107, R108, R109, R118, R124, R125, R126, R127, R128, R129, R130, R131, R133, R134, R135, R136, R137, R138, R139, R140, R144, R147, R148, R149, R167, R168, R169, R170, R171, R172";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"1";"1k2_1%";"RR0201";"R0201";"R60";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"7";"1nF";"C-EUC0402";"C0402";"C314, C318, C321, C325, C328, C332, C335";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"";"";"";"";"C";"";"";
+"51";"1pF";"CC0201";"C0201";"C70, C71, C72, C83, C84, C85, C126, C128, C129, C134, C135, C136, C142, C143, C144, C149, C150, C151, C163, C165, C166, C171, C172, C173, C197, C198, C199, C204, C205, C206, C211, C212, C213, C218, C219, C220, C225, C226, C227, C232, C233, C234, C239, C240, C241, C246, C247, C248, C253, C254, C255";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"16";"1uF";"CC0201";"C0201";"C86, C87, C88, C89, C90, C91, C92, C93, C94, C95, C96, C97, C98, C99, C100, C101";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"3";"1µF";"CC0201";"C0201";"C276, C296, C300";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"2.2k";"RR0201";"R0201";"R146";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"3";"2.2uF";"CC0201";"C0201";"C22, C23, C164";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"16";"2.443k";"RR0201";"R0201";"R89, R90, R91, R92, R95, R96, R97, R98, R103, R104, R105, R106, R119, R120, R121, R122";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"1";"2.7pF";"C-EUC0402";"C0402";"C3";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"";"";"";"";"C";"";"";
+"2";"2.7pF";"CC0201";"C0201";"C18, C19";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"200R";"RR0201";"R0201";"R16, R17, R20, R21";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"1";"20k";"R-EU_R0402";"R0402";"R38";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"40";"22-23-2021";"22-23-2021";"22-23-2021";"X1, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X24, X54, X55, X56, X_1, X_2, X_3, X_4, X_5, X_6, X_7, X_8, X_9, X_10, X_11, X_12, X_13, X_14, X_15, X_16";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"";"";"";"MOLEX";"";"";"";"";"22-23-2021";"1462926";"25C3832";"";"40";"";"";"";"";"";"";"";"";
+"16";"22-23-2031";"22-23-2031";"22-23-2031";"X3, X38, X39, X40, X41, X42, X43, X44, X45, X46, X47, X48, X49, X50, X51, X52";".100" (2.54mm) Center Header - 3 Pin";"";"";"";"";"";"";"";"";"MOLEX";"";"";"";"";"22-23-2031";"1462950";"30C0862";"";"35";"";"";"";"";"";"";"";"";
+"11";"22.1k";"RR0201";"R0201";"R154, R155, R156, R157, R158, R159, R160, R161, R162, R163, R164";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"13";"22R";"RR0201";"R0201";"R23, R24, R25, R26, R27, R28, R29, R30, R49, R51, R62, R63, R64";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"22pF";"CC0201";"C0201";"C308, C309";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"5";"22µF";"C-EUC1206";"C1206";"C283, C311, C315, C322, C329";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"54";"";"";"";"";"";"C";"";"";
+"2";"24R";"R-EU_R0402";"R0402";"R1, R13";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"2";"25R";"RR0201";"R0201";"R165, R166";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"4";"25pF";"CC0201";"C0201";"C64, C65, C268, C270";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"3.3uF";"CC0201";"C0201";"C191";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"32.8pF";"CC0201";"C0201";"C59, C127";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"3k2";"RR0201";"R0201";"R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"4.3k";"R-EU_R0201";"R0201";"R15, R32";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"2";"4.3pF";"CC0201";"C0201";"C20, C21";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"27";"4.7k";"RR0201";"R0201";"R42, R44, R45, R46, R47, R48, R50, R52, R53, R54, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, R77, R117, R141, R142, R143";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"16";"4.7nF";"CC0201";"C0201";"C261, C263, C265, C267, C269, C271, C273, C275, C280, C282, C284, C286, C288, C290, C292, C294";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"8";"4.7uF";"CC0201";"C0201";"C108, C109, C153, C154, C177, C178, C287, C289";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"4.7uF 35V";"4.7UF-POLAR-EIA3528-35V-10%(TANT)";"EIA3528";"C186, C187";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"CAP-13916";"";"";"";"";"";"4.7uF 35V";
+"1";"47nF";"CC0201";"C0201";"C31";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"47uF";"CC0201";"C0201";"C17, C55, C176, C285";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"500R";"RR0201";"R0201";"R110, R112, R113, R114";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"3";"50R";"RR0201";"R0201";"R31, R115, R116";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"4";"50nH";"LL0201";"L0201";"L9, L10, L24, L28";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"1";"56R";"R-EU_R0201";"R0201";"R22";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"3";"5R";"RR0201";"R0201";"R132, R150, R152";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"7.8pF";"CC0201";"C0201";"C61, C62";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"830R";"R-EU_R0402";"R0402";"R36";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"4";"840R";"RR0201";"R0201";"R78, R79, R80, R81";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"AD8352ACPZ-R7";"AD8352ACPZ-R7";"CP_16_3_ADI";"U4, U8";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.analog.com/media/en/technical-documentation/data-sheets/ad8352.pdf";"2 GHz Ultralow Distortion Differential RF/IF Amplifier";"";"Analog Devices Inc";"AD8352ACPZ-R7";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"AD9484BCPZ-500";"AD9484BCPZ-500";"CP_56_5_ADI";"U1";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.analog.com/media/en/technical-documentation/data-sheets/AD9484.pdf";"8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter";"";"Analog Devices Inc";"AD9484BCPZ-500";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"AD9708AR";"AD9708AR";"RW_28_ADI";"U3";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"AD9708AR";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"4";"ADAR1000ACCZN";"ADAR1000ACCZN";"CC-88-1_ADI";"ADAR1_, ADAR2_, ADAR3_, ADAR4_";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"ADAR1000ACCZN";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"RF";"";
+"3";"ADS7830IPWR";"ADS7830IPWR";"PW16";"U10, U88, U89";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/ads7830";"8-Bit, 8-Channel Sampling A/D Converter with I2C Interface 16-TSSOP -40 to 85";"";"Texas Instruments";"ADS7830IPWR";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"16";"ADTR1107ACCZ";"ADTR1107ACCZ";"CC-24-8_ADI";"ADTR1107_1, ADTR1107_2, ADTR1107_3, ADTR1107_4, ADTR1107_5, ADTR1107_6, ADTR1107_7, ADTR1107_8, ADTR1107_9, ADTR1107_10, ADTR1107_11, ADTR1107_12, ADTR1107_13, ADTR1107_14, ADTR1107_15, ADTR1107_16";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"ADTR1107ACCZ";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"RF";"";
+"1";"AT93C46A-10SQ-2.7";"AT93C46A-10SQ-2.7";"SOIC8";"IC1";"Three-wire Automotive Temperature Serial EEPROM 1K (64 x 16)";"";"";"";"";"";"";"";"";"";"";"";"";"";"AT93C46DN-SH-B";"1455086";"58M3879";"";"0";"";"";"";"";"";"";"";"";
+"5";"BLM15HB121SN1";"BLM15HB121SN1";"0402";"L5, L6, L7, L19, L20";"EMIFIL (R) Chip Ferrite Bead for GHz Noise";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"";"";"";
+"2";"BPF2";"BPF2";"BPF2";"U$2, U$3";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"4";"Blue";"LED-BLUE0603";"LED-0603";"D2, D3, D4, D5";"Blue SMD LED";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"DIO-08575";"";"";"";"";"";"Blue";
+"2";"CJT-T-P-HH-ST-TH1";"CJT-T-P-HH-ST-TH1";"CJTTPHHSTTH1";"J19, J21";"Conn Twinax F 0Hz to 4GHz 100Ohm Solder ST Thru-Hole Gold";"";"";"";"";"Conn Twinax F 0Hz to 4GHz 100Ohm Solder ST Thru-Hole Gold";"7.31mm";"SAMTEC";"CJT-T-P-HH-ST-TH1";"";"";"200-CJTTPHHSTTH1";"https://www.mouser.co.uk/ProductDetail/Samtec/CJT-T-P-HH-ST-TH1?qs=PB6%2FjmICvI3dfW8RDpxn0g%3D%3D";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"2";"DAC5578SRGET";"DAC5578SRGET";"RGE24_2P7X2P7";"U7, U69";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/dac5578";"8-bit, Octal Channel, Ultra-Low Glitch, Voltage Output, 2-Wire Interface DAC 24-VQFN -40 to 125";"";"Texas Instruments";"DAC5578SRGET";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"ECS-120-10-36B2-JTN-TR";"CRYSTAL-12MHZ";"CRYSTAL-SMD-2X2.5MM";"Y1";"12.0MHz Crystal";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"XTAL-15540";"";"";"";"";"";"";
+"1";"EP4RKU+";"EP4RKU+";"DG1677-2_MNC";"U16";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"EP4RKU+";"";"Mini Circuits";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"FT2232HQ";"FT2232HQ";"64QFN_FT2232HQ_FTD";"U6";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"";"";"FT2232HQ";"";"FTDI, Future Technology Devices International Ltd";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"16";"INA241A3IDGKRDGK0008A-MFG";"INA241A3IDGKRDGK0008A-MFG";"DGK0008A-MFG";"U11, U73, U74, U75, U76, U77, U78, U79, U80, U81, U82, U83, U84, U85, U86, U87";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"-5-V to 110-V bidirectional ultraprecise current sense amplifier with enhanced PWM rejection 8-VSSOP -40 to 125";"";"Texas Instruments";"INA241A3IDGKR";"";"";"";"";"";"";"";"";"";"";"";"";"RefDes";"";"";"";"TYPE";"";
+"2";"LTC5552IUDBTRMPBF";"LTC5552IUDBTRMPBF";"UDB_12_ADI";"U5, U13";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"LTC5552IUDB#TRMPBF";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"17";"M3SWA2-34DR+";"M3SWA2-34DR+";"16_QFN";"RF_SW_1, RF_SW_2, RF_SW_3, RF_SW_4, RF_SW_5, RF_SW_6, RF_SW_7, RF_SW_8, RF_SW_9, RF_SW_10, RF_SW_11, RF_SW_12, RF_SW_13, RF_SW_14, RF_SW_15, RF_SW_16, U$1";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"2";"MINI-USB-32005-201";"MINI-USB-32005-201";"32005-201";"X2, X53";"MINI USB-B Conector";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"";"5";"";"";"";"";"";"";"";"";
+"1";"MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM";"MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM";"TACTILE_SWITCH_SMD_4.6X2.8MM";"S1";"Momentary Switch (Pushbutton) - SPST";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"SWCH-15606";"";"";"";"";"";"";
+"1";"MT25QL01GBBB8E12-0AUT";"MT25QL01GBBB8E12-0AUT";"BGA24_MT25QL_MRN";"U9";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"MT25QL01GBBB8E12-0AUT";"";"Micron";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"NX3215SA-32.768KHz";"NX3225GD-8MHZ-STD-CRA-3";"XTAL_NX3225GD-8MHZ-STD-CRA-3_N";"XTAL3";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"NX3225GD-8MHZ-STD-CRA-3";"";"NDK";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"NX3225GD-8MHZ-STD-CRA-3";"NX3225GD-8MHZ-STD-CRA-3";"XTAL_NX3225GD-8MHZ-STD-CRA-3_N";"XTAL1";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"NX3225GD-8MHZ-STD-CRA-3";"";"NDK";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"4";"OPA4703EA/250";"OPA4703EA/250";"PW14";"OPA_1, OPA_2, OPA_3, OPA_4";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/opa4703";"Quad, 12-V, 1-MHz, low-offset operational amplifier 14-TSSOP -40 to 85";"";"Texas Instruments";"OPA4703EA/250";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"STM32F746ZGT7";"STM32F746ZGT7";"LQFP-144_STM";"U2";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"STM32F746ZGT7";"";"STMicroelectronics";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"34";"SZMMSZ5232BT1G";"SZMMSZ5232BT1G";"SOD-123_ONS";"U14, U15, U17, U37, U38, U39, U40, U41, U43, U44, U45, U46, U47, U48, U49, U50, U51, U52, U53, U54, U55, U56, U57, U58, U59, U60, U61, U62, U63, U64, U65, U66, U67, U68";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"SZMMSZ5232BT1G";"";"onsemi";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"XC7A50T-2FTG256I";"XC7A50T-2FTG256I";"BGA256C100P16X16_1700X1700X155";"U42";"Artix-7 Field Programmable Gate Array (FPGA) IC 170 2764800 52160 256-LBGA  Check availability";"In Stock";"https://www.snapeda.com/parts/XC7A50T-2FTG256I/Xilinx/view-part/?ref=eda";"";"";"                                                      Artix-7 Field Programmable Gate Array (FPGA) IC 170 2764800 52160 256-LBGA                                              ";"";"";"";"Xilinx Inc.";"";"";"";"XC7A50T-2FTG256I";"";"";"";"LBGA-256 Xilinx Inc.";"";"None";"";"";"https://www.snapeda.com/parts/XC7A50T-2FTG256I/Xilinx/view-part/?ref=snap";"";"";"";"";
@@ -0,0 +1,86 @@
+%PDF-1.4
+%“Œ‹ž ReportLab Generated PDF document http://www.reportlab.com
+1 0 obj
+<<
+/F1 2 0 R /F2 3 0 R /F3 4 0 R /F4 5 0 R
+>>
+endobj
+2 0 obj
+<<
+/BaseFont /Helvetica /Encoding /WinAnsiEncoding /Name /F1 /Subtype /Type1 /Type /Font
+>>
+endobj
+3 0 obj
+<<
+/BaseFont /Helvetica-Bold /Encoding /WinAnsiEncoding /Name /F2 /Subtype /Type1 /Type /Font
+>>
+endobj
+4 0 obj
+<<
+/BaseFont /Symbol /Name /F3 /Subtype /Type1 /Type /Font
+>>
+endobj
+5 0 obj
+<<
+/BaseFont /Helvetica-Oblique /Encoding /WinAnsiEncoding /Name /F4 /Subtype /Type1 /Type /Font
+>>
+endobj
+6 0 obj
+<<
+/Contents 10 0 R /MediaBox [ 0 0 595.2756 841.8898 ] /Parent 9 0 R /Resources <<
+/Font 1 0 R /ProcSet [ /PDF /Text /ImageB /ImageC /ImageI ]
+>> /Rotate 0 /Trans <<
+
+>> 
+  /Type /Page
+>>
+endobj
+7 0 obj
+<<
+/PageMode /UseNone /Pages 9 0 R /Type /Catalog
+>>
+endobj
+8 0 obj
+<<
+/Author (\(anonymous\)) /CreationDate (D:20250912164324+00'00') /Creator (\(unspecified\)) /Keywords () /ModDate (D:20250912164324+00'00') /Producer (ReportLab PDF Library - www.reportlab.com) 
+  /Subject (\(unspecified\)) /Title (\(anonymous\)) /Trapped /False
+>>
+endobj
+9 0 obj
+<<
+/Count 1 /Kids [ 6 0 R ] /Type /Pages
+>>
+endobj
+10 0 obj
+<<
+/Filter [ /ASCII85Decode /FlateDecode ] /Length 2059
+>>
+stream
+Gatm<95iQE&AIm?b[ggQ==YXc8To\KZq6bSU6!eY>+k@RO_J$Z,cW&R1jdm4^-h/tfnksI].j0B@qI^lc,U]!+S_])1J.[Scf+XN"j15e!m2MnoCq`dro1s+>-A>]&C@C4R7o!<""/nq.+U%j05\Z_+6G#p@R);1(1Th^kY,U"O@^X^n1Mu)1<^pC+/KaW?n?i]-gl<A2(V39p]H=>#s3b7GF6-u;49+tRQkK5B7+Q#7D.3OSLHemSi)nEp2YNRM7*(MLXAha_n"-&S>[V0hP@2_96O]s;sOMN?=HkjG/.c"+$qQ:3)!(T-J+tgN@1eoHi,Uga!)+X0&d-\R40.g)BErQ<4pN7r+9qj!j:S\34=cIX)Yi[Q%2itNEk&+)\dBsa@I`09&^MCM3$d\`5Ch`QY-jUTa=o+1qea@S'2/S!#d;0STUqqn]406d^1'64Aea4PBed<#:X>?B5I'8\AklQ%f^L"0_'EE\r*grD%KA!$Jbr4''_G\GE'4taV&77:u.Wac8*>kaS\VgOgDNiM\$C.neN$qENsqtR95;4+@8l>i&8kQ=XmMiZHSV()+n,Q"eIlfLMN$/:iD<:,eOr4+Ar9M&#gUo%n,\F/Cm/^,Lg@dmhuXgFu2/l(3#>OmPjFTE1?.q%g\+k7j2:5Em(24pf5C)PoVr7@'25+FH0`cDU\r1aO/*HK(iWtYI:aIZOm;pD#IsrN'oo;BqXO)W>p?B5uKjN+a<M3di*W'XS=:K9-VA">9\`X-J88t<P,sW[)b>M+A03\RFqFkn*dYcB,C@+Y46jR4c_f?\?]V?*[4f5SL)hIeiq-T"_%J4$2dZ&Auo0Q^?a=A+%);hH_JU\6_TC5>*q^3$R(Y)MYh9hVK#R+KliIgdllm?F#pAOn&43YR$=!0+X1)IQK0gH["=Poi:?7-fC0j,?@;f*O^^_a*%RH4$4&BRFbs7N(Ls=4ZHSFoSR*OX_?EjKgo[()R?[;&GgjQ.N_`I\E,&hX8uXSjFY'ks!DS"-"Oq4Qmg\K93+;IIIYXK[\YI7mggR#/[!si8(9!X2:_R0'%c/l=M]r=6\OLVTO28_RLX:dZ*j/>8#]kXlE!]q_T/N/E3f!G9s2B[5_9&@Vd-hS14,C8$a4eDHg?SG!W,;3B_0"rORelB^g/@Ag6O*l/ZQcf&JNpa<B81R9Z!C7%DXD3Gd5%ekkV0(a8Meq\,kWVnk.;AO-8fj>3eQ4iak(A7T:f+AR.eq,bF^GfT;L(=#o5`C(6J%-ju\1h7Yi&PC^H)g627$<\GTY_%I5^W/Cu<iHO4L^RH+-G\[s->X(LkS@0G^q!io2r*.]j03\G>OhjHR%5>)l<W96$r41RMaNDCo3BiVhAR:E@SV1L9lH?SYI?o7'o:-TP>?8lk/d[+=jTn-:IHUN5h(:ZN_LMU[>CK$ko6^kbjb4t=#.H@ac;T<>[Mk2J2beul7eqFY%(/1f)Ib)b`cKd%C6U_NTp1>cF&'`Oj/8_4</$[;9.VrcP4hQjBoI4WC>I>rYO@`8o&o2Wk&rFS&e$A1sYa8\*oslpPcreJr/W?@$N3?dUnesS:m*gVaV]^GQ=P)HMTdbe:WTi=RZ.4N@_k'(4gNtdifc!kfToM#Y4[<4*h@!3`;:@d6%\j.mEUi5LfQ<\P0?\.LQt?J*>8c7qY14WaW*q0q[[h3G5$8YODC\no6(-E;[1H?'\?n$;0#(_/\R8uS[).&)&B"oJ-'fojE#`;)AD1>rk[jA'oV@eHH4SPq`Ps-WmIM/8I"6\e@^iE8e.h&tdc5Ij/bPuh$DZUWfQ,G76m=PV1RaoTGRYg)T,c4_/\>lZ@O0E)KD9/![KPS)qR>%>(\6,o!HD/dm]C<8Z_2d9K-]_'qB5%HFpl?3JTn>DhDIh)<RV]X:Ja=L>]#8u/h?regcf)G3u&,s'?pEef1rShR\9Zth+)!SF^-B0D0o:+i6>2q],dRi\A#E]28O%b0EQ61O^i2h`\[&N<s/?UHG="n9Yh1T:3RbUZmaO;O[5qcf4CI[):`i3[oG4u)\]V=6;Uit=G>@_fN]2<-dM5@?T@%+D#~>endstream
+endobj
+xref
+0 11
+0000000000 65535 f 
+0000000073 00000 n 
+0000000134 00000 n 
+0000000241 00000 n 
+0000000353 00000 n 
+0000000430 00000 n 
+0000000545 00000 n 
+0000000749 00000 n 
+0000000817 00000 n 
+0000001100 00000 n 
+0000001159 00000 n 
+trailer
+<<
+/ID 
+[<b8f8c11bfd0a1bed1b3e2009136b9939><b8f8c11bfd0a1bed1b3e2009136b9939>]
+% ReportLab generated PDF document -- digest (http://www.reportlab.com)
+
+/Info 8 0 R
+/Root 7 0 R
+/Size 11
+>>
+startxref
+3310
+%%EOF
@@ -0,0 +1,438 @@
+#!/usr/bin/env python3
+"""
+AERIS-10 FMC Anti-Alias Filter — openEMS 3D EM Simulation
+==========================================================
+5th-order differential Butterworth LC LPF, fc ≈ 195 MHz
+All components are 0402 (1.0 x 0.5 mm) on FR4 4-layer stackup.
+
+Filter topology (each half of differential):
+  IN → R_series(49.9Ω) → L1(24nH) → C1(27pF)↓GND → L2(82nH) → C2(27pF)↓GND → L3(24nH) → OUT
+  Plus R_diff(100Ω) across input and output differential pairs.
+
+PCB stackup:
+  L1: F.Cu    (signal + components)  — 35µm copper
+  Prepreg: 0.2104 mm
+  L2: In1.Cu  (GND plane)           — 35µm copper
+  Core: 1.0 mm
+  L3: In2.Cu  (Power plane)         — 35µm copper
+  Prepreg: 0.2104 mm
+  L4: B.Cu    (signal)              — 35µm copper
+
+Total board thickness ≈ 1.6 mm
+
+Differential trace: W=0.23mm, S=0.12mm gap → Zdiff≈100Ω
+All 0402 pads: 0.5mm x 0.55mm with 0.5mm gap between pads
+
+Simulation extracts 4-port S-parameters (differential in → differential out)
+then converts to mixed-mode (Sdd11, Sdd21, Scc21) for analysis.
+"""
+
+import os
+import sys
+import numpy as np
+
+sys.path.insert(0, '/Users/ganeshpanth/openEMS-Project/CSXCAD/python')
+sys.path.insert(0, '/Users/ganeshpanth/openEMS-Project/openEMS/python')
+os.environ['PATH'] = '/Users/ganeshpanth/opt/openEMS/bin:' + os.environ.get('PATH', '')
+
+from CSXCAD import ContinuousStructure
+from openEMS import openEMS
+from openEMS.physical_constants import C0, EPS0
+
+unit = 1e-3
+
+f_start = 1e6
+f_stop = 1e9
+f_center = 150e6
+f_IF_low = 120e6
+f_IF_high = 180e6
+
+max_res = C0 / f_stop / unit / 20
+
+copper_t = 0.035
+prepreg_t = 0.2104
+core_t = 1.0
+sub_er = 4.3
+sub_tand = 0.02
+cu_cond = 5.8e7
+
+z_L4_bot = 0.0
+z_L4_top = z_L4_bot + copper_t
+z_pre2_top = z_L4_top + prepreg_t
+z_L3_top = z_pre2_top + copper_t
+z_core_top = z_L3_top + core_t
+z_L2_top = z_core_top + copper_t
+z_pre1_top = z_L2_top + prepreg_t
+z_L1_bot = z_pre1_top
+z_L1_top = z_L1_bot + copper_t
+
+pad_w = 0.50
+pad_l = 0.55
+pad_gap = 0.50
+comp_pitch = 1.5
+
+trace_w = 0.23
+trace_s = 0.12
+pair_pitch = trace_w + trace_s
+
+R_series = 49.9
+R_diff_in = 100.0
+R_diff_out = 100.0
+
+L1_val = 24e-9
+L2_val = 82e-9
+L3_val = 24e-9
+
+C1_val = 27e-12
+C2_val = 27e-12
+
+FDTD = openEMS(NrTS=50000, EndCriteria=1e-5)
+FDTD.SetGaussExcite(0.5 * (f_start + f_stop), 0.5 * (f_stop - f_start))
+FDTD.SetBoundaryCond(['PML_8'] * 6)
+
+CSX = ContinuousStructure()
+FDTD.SetCSX(CSX)
+
+copper = CSX.AddMetal('copper')
+gnd_metal = CSX.AddMetal('gnd_plane')
+fr4_pre1 = CSX.AddMaterial(
+    'prepreg1', epsilon=sub_er, kappa=sub_tand * 2 * np.pi * f_center * EPS0 * sub_er
+)
+fr4_core = CSX.AddMaterial(
+    'core', epsilon=sub_er, kappa=sub_tand * 2 * np.pi * f_center * EPS0 * sub_er
+)
+fr4_pre2 = CSX.AddMaterial(
+    'prepreg2', epsilon=sub_er, kappa=sub_tand * 2 * np.pi * f_center * EPS0 * sub_er
+)
+
+y_P = +pair_pitch / 2
+y_N = -pair_pitch / 2
+
+x_port_in = -1.0
+x_R_series = 0.0
+x_L1 = x_R_series + comp_pitch
+x_C1 = x_L1 + comp_pitch
+x_L2 = x_C1 + comp_pitch
+x_C2 = x_L2 + comp_pitch
+x_L3 = x_C2 + comp_pitch
+x_port_out = x_L3 + comp_pitch + 1.0
+
+x_Rdiff_in = x_port_in - 0.5
+x_Rdiff_out = x_port_out + 0.5
+
+margin = 3.0
+x_min = x_Rdiff_in - margin
+x_max = x_Rdiff_out + margin
+y_min = y_N - margin
+y_max = y_P + margin
+z_min = z_L4_bot - margin
+z_max = z_L1_top + margin
+
+fr4_pre1.AddBox([x_min, y_min, z_L2_top], [x_max, y_max, z_L1_bot], priority=1)
+fr4_core.AddBox([x_min, y_min, z_L3_top], [x_max, y_max, z_core_top], priority=1)
+fr4_pre2.AddBox([x_min, y_min, z_L4_top], [x_max, y_max, z_pre2_top], priority=1)
+
+gnd_metal.AddBox(
+    [x_min + 0.5, y_min + 0.5, z_core_top], [x_max - 0.5, y_max - 0.5, z_L2_top], priority=10
+)
+
+
+def add_trace_segment(x_start, x_end, y_center, z_bot, z_top, w, metal, priority=20):
+    metal.AddBox(
+        [x_start, y_center - w / 2, z_bot], [x_end, y_center + w / 2, z_top], priority=priority
+    )
+
+
+def add_0402_pads(x_center, y_center, z_bot, z_top, metal, priority=20):
+    x_left = x_center - pad_gap / 2 - pad_w / 2
+    metal.AddBox(
+        [x_left - pad_w / 2, y_center - pad_l / 2, z_bot],
+        [x_left + pad_w / 2, y_center + pad_l / 2, z_top],
+        priority=priority,
+    )
+    x_right = x_center + pad_gap / 2 + pad_w / 2
+    metal.AddBox(
+        [x_right - pad_w / 2, y_center - pad_l / 2, z_bot],
+        [x_right + pad_w / 2, y_center + pad_l / 2, z_top],
+        priority=priority,
+    )
+    return (x_left, x_right)
+
+
+def add_lumped_element(
+    CSX, name, element_type, value, x_center, y_center, z_bot, z_top, direction='x'
+):
+    x_left = x_center - pad_gap / 2 - pad_w / 2
+    x_right = x_center + pad_gap / 2 + pad_w / 2
+    if direction == 'x':
+        start = [x_left, y_center - pad_l / 4, z_bot]
+        stop = [x_right, y_center + pad_l / 4, z_top]
+        edir = 'x'
+    elif direction == 'y':
+        start = [x_center - pad_l / 4, y_center - pad_gap / 2 - pad_w / 2, z_bot]
+        stop = [x_center + pad_l / 4, y_center + pad_gap / 2 + pad_w / 2, z_top]
+        edir = 'y'
+    if element_type == 'R':
+        elem = CSX.AddLumpedElement(name, ny=edir, caps=True, R=value)
+    elif element_type == 'L':
+        elem = CSX.AddLumpedElement(name, ny=edir, caps=True, L=value)
+    elif element_type == 'C':
+        elem = CSX.AddLumpedElement(name, ny=edir, caps=True, C=value)
+    elem.AddBox(start, stop, priority=30)
+    return elem
+
+
+def add_shunt_cap(
+    CSX, name, value, x_center, y_trace, _z_top_signal, _z_gnd_top, metal, priority=20,
+):
+    metal.AddBox(
+        [x_center - pad_w / 2, y_trace - pad_l / 2, z_L1_bot],
+        [x_center + pad_w / 2, y_trace + pad_l / 2, z_L1_top],
+        priority=priority,
+    )
+    via_drill = 0.15
+    cap = CSX.AddLumpedElement(name, ny='z', caps=True, C=value)
+    cap.AddBox(
+        [x_center - via_drill, y_trace - via_drill, z_L2_top],
+        [x_center + via_drill, y_trace + via_drill, z_L1_bot],
+        priority=30,
+    )
+    via_metal = CSX.AddMetal(name + '_via')
+    via_metal.AddBox(
+        [x_center - via_drill, y_trace - via_drill, z_L2_top],
+        [x_center + via_drill, y_trace + via_drill, z_L1_bot],
+        priority=25,
+    )
+
+
+add_trace_segment(
+    x_port_in, x_R_series - pad_gap / 2 - pad_w, y_P, z_L1_bot, z_L1_top, trace_w, copper
+)
+add_0402_pads(x_R_series, y_P, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'R10', 'R', R_series, x_R_series, y_P, z_L1_bot, z_L1_top)
+add_trace_segment(
+    x_R_series + pad_gap / 2 + pad_w,
+    x_L1 - pad_gap / 2 - pad_w,
+    y_P,
+    z_L1_bot,
+    z_L1_top,
+    trace_w,
+    copper,
+)
+add_0402_pads(x_L1, y_P, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'L5', 'L', L1_val, x_L1, y_P, z_L1_bot, z_L1_top)
+add_trace_segment(x_L1 + pad_gap / 2 + pad_w, x_C1, y_P, z_L1_bot, z_L1_top, trace_w, copper)
+add_shunt_cap(CSX, 'C53', C1_val, x_C1, y_P, z_L1_top, z_L2_top, copper)
+add_trace_segment(x_C1, x_L2 - pad_gap / 2 - pad_w, y_P, z_L1_bot, z_L1_top, trace_w, copper)
+add_0402_pads(x_L2, y_P, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'L8', 'L', L2_val, x_L2, y_P, z_L1_bot, z_L1_top)
+add_trace_segment(x_L2 + pad_gap / 2 + pad_w, x_C2, y_P, z_L1_bot, z_L1_top, trace_w, copper)
+add_shunt_cap(CSX, 'C55', C2_val, x_C2, y_P, z_L1_top, z_L2_top, copper)
+add_trace_segment(x_C2, x_L3 - pad_gap / 2 - pad_w, y_P, z_L1_bot, z_L1_top, trace_w, copper)
+add_0402_pads(x_L3, y_P, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'L10', 'L', L3_val, x_L3, y_P, z_L1_bot, z_L1_top)
+add_trace_segment(x_L3 + pad_gap / 2 + pad_w, x_port_out, y_P, z_L1_bot, z_L1_top, trace_w, copper)
+
+add_trace_segment(
+    x_port_in, x_R_series - pad_gap / 2 - pad_w, y_N, z_L1_bot, z_L1_top, trace_w, copper
+)
+add_0402_pads(x_R_series, y_N, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'R11', 'R', R_series, x_R_series, y_N, z_L1_bot, z_L1_top)
+add_trace_segment(
+    x_R_series + pad_gap / 2 + pad_w,
+    x_L1 - pad_gap / 2 - pad_w,
+    y_N,
+    z_L1_bot,
+    z_L1_top,
+    trace_w,
+    copper,
+)
+add_0402_pads(x_L1, y_N, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'L6', 'L', L1_val, x_L1, y_N, z_L1_bot, z_L1_top)
+add_trace_segment(x_L1 + pad_gap / 2 + pad_w, x_C1, y_N, z_L1_bot, z_L1_top, trace_w, copper)
+add_shunt_cap(CSX, 'C54', C1_val, x_C1, y_N, z_L1_top, z_L2_top, copper)
+add_trace_segment(x_C1, x_L2 - pad_gap / 2 - pad_w, y_N, z_L1_bot, z_L1_top, trace_w, copper)
+add_0402_pads(x_L2, y_N, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'L7', 'L', L2_val, x_L2, y_N, z_L1_bot, z_L1_top)
+add_trace_segment(x_L2 + pad_gap / 2 + pad_w, x_C2, y_N, z_L1_bot, z_L1_top, trace_w, copper)
+add_shunt_cap(CSX, 'C56', C2_val, x_C2, y_N, z_L1_top, z_L2_top, copper)
+add_trace_segment(x_C2, x_L3 - pad_gap / 2 - pad_w, y_N, z_L1_bot, z_L1_top, trace_w, copper)
+add_0402_pads(x_L3, y_N, z_L1_bot, z_L1_top, copper)
+add_lumped_element(CSX, 'L9', 'L', L3_val, x_L3, y_N, z_L1_bot, z_L1_top)
+add_trace_segment(x_L3 + pad_gap / 2 + pad_w, x_port_out, y_N, z_L1_bot, z_L1_top, trace_w, copper)
+
+R4_x = x_port_in - 0.3
+copper.AddBox(
+    [R4_x - pad_l / 2, y_P - pad_w / 2, z_L1_bot],
+    [R4_x + pad_l / 2, y_P + pad_w / 2, z_L1_top],
+    priority=20,
+)
+copper.AddBox(
+    [R4_x - pad_l / 2, y_N - pad_w / 2, z_L1_bot],
+    [R4_x + pad_l / 2, y_N + pad_w / 2, z_L1_top],
+    priority=20,
+)
+R4_elem = CSX.AddLumpedElement('R4', ny='y', caps=True, R=R_diff_in)
+R4_elem.AddBox([R4_x - pad_l / 4, y_N, z_L1_bot], [R4_x + pad_l / 4, y_P, z_L1_top], priority=30)
+
+R18_x = x_port_out + 0.3
+copper.AddBox(
+    [R18_x - pad_l / 2, y_P - pad_w / 2, z_L1_bot],
+    [R18_x + pad_l / 2, y_P + pad_w / 2, z_L1_top],
+    priority=20,
+)
+copper.AddBox(
+    [R18_x - pad_l / 2, y_N - pad_w / 2, z_L1_bot],
+    [R18_x + pad_l / 2, y_N + pad_w / 2, z_L1_top],
+    priority=20,
+)
+R18_elem = CSX.AddLumpedElement('R18', ny='y', caps=True, R=R_diff_out)
+R18_elem.AddBox([R18_x - pad_l / 4, y_N, z_L1_bot], [R18_x + pad_l / 4, y_P, z_L1_top], priority=30)
+
+port1 = FDTD.AddLumpedPort(
+    1,
+    50,
+    [x_port_in, y_P - trace_w / 2, z_L2_top],
+    [x_port_in, y_P + trace_w / 2, z_L1_bot],
+    'z',
+    excite=1.0,
+)
+port2 = FDTD.AddLumpedPort(
+    2,
+    50,
+    [x_port_in, y_N - trace_w / 2, z_L2_top],
+    [x_port_in, y_N + trace_w / 2, z_L1_bot],
+    'z',
+    excite=-1.0,
+)
+port3 = FDTD.AddLumpedPort(
+    3,
+    50,
+    [x_port_out, y_P - trace_w / 2, z_L2_top],
+    [x_port_out, y_P + trace_w / 2, z_L1_bot],
+    'z',
+    excite=0,
+)
+port4 = FDTD.AddLumpedPort(
+    4,
+    50,
+    [x_port_out, y_N - trace_w / 2, z_L2_top],
+    [x_port_out, y_N + trace_w / 2, z_L1_bot],
+    'z',
+    excite=0,
+)
+
+mesh = CSX.GetGrid()
+mesh.SetDeltaUnit(unit)
+mesh.AddLine('x', [x_min, x_max])
+for x_comp in [x_R_series, x_L1, x_C1, x_L2, x_C2, x_L3]:
+    mesh.AddLine('x', np.linspace(x_comp - 1.0, x_comp + 1.0, 15))
+mesh.AddLine('x', [x_port_in, x_port_out])
+mesh.AddLine('x', [R4_x, R18_x])
+mesh.AddLine('y', [y_min, y_max])
+for y_trace in [y_P, y_N]:
+    mesh.AddLine('y', np.linspace(y_trace - 0.5, y_trace + 0.5, 10))
+mesh.AddLine('z', [z_min, z_max])
+mesh.AddLine('z', np.linspace(z_L4_bot - 0.1, z_L1_top + 0.1, 25))
+mesh.SmoothMeshLines('x', max_res, ratio=1.4)
+mesh.SmoothMeshLines('y', max_res, ratio=1.4)
+mesh.SmoothMeshLines('z', max_res / 3, ratio=1.3)
+
+sim_path = os.path.join(os.path.dirname(os.path.abspath(__file__)), 'results')
+if not os.path.exists(sim_path):
+    os.makedirs(sim_path)
+
+CSX_file = os.path.join(sim_path, 'aaf_filter.xml')
+CSX.Write2XML(CSX_file)
+
+FDTD.Run(sim_path, cleanup=True, verbose=3)
+
+freq = np.linspace(f_start, f_stop, 1001)
+port1.CalcPort(sim_path, freq)
+port2.CalcPort(sim_path, freq)
+port3.CalcPort(sim_path, freq)
+port4.CalcPort(sim_path, freq)
+
+inc1 = port1.uf_inc
+ref1 = port1.uf_ref
+inc2 = port2.uf_inc
+ref2 = port2.uf_ref
+inc3 = port3.uf_inc
+ref3 = port3.uf_ref
+inc4 = port4.uf_inc
+ref4 = port4.uf_ref
+
+a_diff = (inc1 - inc2) / np.sqrt(2)
+b_diff_in = (ref1 - ref2) / np.sqrt(2)
+b_diff_out = (ref3 - ref4) / np.sqrt(2)
+
+Sdd11 = b_diff_in / a_diff
+Sdd21 = b_diff_out / a_diff
+
+b_comm_out = (ref3 + ref4) / np.sqrt(2)
+Scd21 = b_comm_out / a_diff
+
+import matplotlib  # noqa: E402
+matplotlib.use('Agg')
+import matplotlib.pyplot as plt  # noqa: E402
+
+fig, axes = plt.subplots(3, 1, figsize=(12, 14))
+
+ax = axes[0]
+Sdd21_dB = 20 * np.log10(np.abs(Sdd21) + 1e-15)
+ax.plot(freq / 1e6, Sdd21_dB, 'b-', linewidth=2, label='|Sdd21| (Insertion Loss)')
+ax.axvspan(
+    f_IF_low / 1e6, f_IF_high / 1e6, alpha=0.15, color='green', label='IF Band (120-180 MHz)'
+)
+ax.axhline(-3, color='r', linestyle='--', alpha=0.5, label='-3 dB')
+ax.set_xlabel('Frequency (MHz)')
+ax.set_ylabel('|Sdd21| (dB)')
+ax.set_title('Anti-Alias Filter — Differential Insertion Loss')
+ax.set_xlim([0, 1000])
+ax.set_ylim([-60, 5])
+ax.grid(True, alpha=0.3)
+ax.legend()
+
+ax = axes[1]
+Sdd11_dB = 20 * np.log10(np.abs(Sdd11) + 1e-15)
+ax.plot(freq / 1e6, Sdd11_dB, 'r-', linewidth=2, label='|Sdd11| (Return Loss)')
+ax.axvspan(f_IF_low / 1e6, f_IF_high / 1e6, alpha=0.15, color='green', label='IF Band')
+ax.axhline(-10, color='orange', linestyle='--', alpha=0.5, label='-10 dB')
+ax.set_xlabel('Frequency (MHz)')
+ax.set_ylabel('|Sdd11| (dB)')
+ax.set_title('Anti-Alias Filter — Differential Return Loss')
+ax.set_xlim([0, 1000])
+ax.set_ylim([-40, 0])
+ax.grid(True, alpha=0.3)
+ax.legend()
+
+ax = axes[2]
+phase_Sdd21 = np.unwrap(np.angle(Sdd21))
+group_delay = -np.diff(phase_Sdd21) / np.diff(2 * np.pi * freq) * 1e9
+ax.plot(freq[1:] / 1e6, group_delay, 'g-', linewidth=2, label='Group Delay')
+ax.axvspan(f_IF_low / 1e6, f_IF_high / 1e6, alpha=0.15, color='green', label='IF Band')
+ax.set_xlabel('Frequency (MHz)')
+ax.set_ylabel('Group Delay (ns)')
+ax.set_title('Anti-Alias Filter — Group Delay')
+ax.set_xlim([0, 500])
+ax.grid(True, alpha=0.3)
+ax.legend()
+
+plt.tight_layout()
+plot_file = os.path.join(sim_path, 'aaf_filter_response.png')
+plt.savefig(plot_file, dpi=150)
+
+idx_120 = np.argmin(np.abs(freq - f_IF_low))
+idx_150 = np.argmin(np.abs(freq - f_center))
+idx_180 = np.argmin(np.abs(freq - f_IF_high))
+idx_200 = np.argmin(np.abs(freq - 200e6))
+idx_400 = np.argmin(np.abs(freq - 400e6))
+
+
+csv_file = os.path.join(sim_path, 'aaf_sparams.csv')
+np.savetxt(
+    csv_file,
+    np.column_stack([freq / 1e6, Sdd21_dB, Sdd11_dB, 20 * np.log10(np.abs(Scd21) + 1e-15)]),
+    header='Freq_MHz, Sdd21_dB, Sdd11_dB, Scd21_dB',
+    delimiter=',', fmt='%.6f'
+)
@@ -91,9 +91,9 @@ z_edges = np.concatenate([z_centers - slot_L/2.0, z_centers + slot_L/2.0])
 # -------------------------
 # Mesh lines — EXPLICIT (no GetLine calls)
 # -------------------------
-x_lines = sorted(set([x_min, -t_metal, 0.0, a, a+t_metal, x_max] + list(x_edges)))
+x_lines = sorted({x_min, -t_metal, 0.0, a, a + t_metal, x_max, *list(x_edges)})
 y_lines = [y_min, 0.0, b, b+t_metal, y_max]
-z_lines = sorted(set([z_min, 0.0, L, z_max] + list(z_edges)))
+z_lines = sorted({z_min, 0.0, L, z_max, *list(z_edges)})

 mesh.AddLine('x', x_lines)
 mesh.AddLine('y', y_lines)
@@ -106,7 +106,8 @@ mesh.SmoothMeshLines('all', mesh_res, ratio=1.4)
 # Materials
 # -------------------------
 pec    = CSX.AddMetal('PEC')
-quartz = CSX.AddMaterial('QUARTZ'); quartz.SetMaterialProperty(epsilon=er_quartz)
+quartz = CSX.AddMaterial('QUARTZ')
+quartz.SetMaterialProperty(epsilon=er_quartz)
 air    = CSX.AddMaterial('AIR')     # explicit for slot holes

 # -------------------------
@@ -122,7 +123,7 @@ pec.AddBox([-t_metal,-t_metal,0],[a+t_metal,0,       L])          # bottom
 pec.AddBox([-t_metal, b, 0],     [a+t_metal,b+t_metal,L])         # top

 # Slots = AIR boxes overriding the top metal
-for zc, xc in zip(z_centers, x_centers):
+for zc, xc in zip(z_centers, x_centers, strict=False):
    x1, x2 = xc - slot_w/2.0, xc + slot_w/2.0
    z1, z2 = zc - slot_L/2.0, zc + slot_L/2.0
    prim = air.AddBox([x1, b, z1], [x2, b+t_metal, z2])
@@ -180,7 +181,7 @@ if simulate:
 # Post-processing: S-params & impedance
 # -------------------------
 freq = np.linspace(f_start, f_stop, 401)
-ports = [p for p in FDTD.ports]   # Port 1 & Port 2 in creation order
+ports = list(FDTD.ports)   # Port 1 & Port 2 in creation order
 for p in ports:
    p.CalcPort(Sim_Path, freq)

@@ -191,13 +192,19 @@ Zin = ports[0].uf_tot / ports[0].if_tot
 plt.figure(figsize=(7.6,4.6))
 plt.plot(freq*1e-9, 20*np.log10(np.abs(S11)), lw=2, label='|S11|')
 plt.plot(freq*1e-9, 20*np.log10(np.abs(S21)), lw=2, ls='--', label='|S21|')
-plt.grid(True); plt.legend(); plt.xlabel('Frequency (GHz)'); plt.ylabel('Magnitude (dB)')
+plt.grid(True)
+plt.legend()
+plt.xlabel('Frequency (GHz)')
+plt.ylabel('Magnitude (dB)')
 plt.title('S-Parameters: Slotted Quartz-Filled WG')

 plt.figure(figsize=(7.6,4.6))
 plt.plot(freq*1e-9, np.real(Zin), lw=2, label='Re{Zin}')
 plt.plot(freq*1e-9, np.imag(Zin), lw=2, ls='--', label='Im{Zin}')
-plt.grid(True); plt.legend(); plt.xlabel('Frequency (GHz)'); plt.ylabel('Ohms')
+plt.grid(True)
+plt.legend()
+plt.xlabel('Frequency (GHz)')
+plt.ylabel('Ohms')
 plt.title('Input Impedance (Port 1)')

 # -------------------------
@@ -219,9 +226,6 @@ mismatch = 1.0 - np.abs(S11[idx_f0])**2   # (1 - |S11|^2)
 Gmax_lin = Dmax_lin * float(mismatch)
 Gmax_dBi = 10*np.log10(Gmax_lin)

-print(f"Max directivity @ {f0/1e9:.3f} GHz: {10*np.log10(Dmax_lin):.2f} dBi")
-print(f"Mismatch term  (1-|S11|^2)        : {float(mismatch):.3f}")
-print(f"Estimated max realized gain       : {Gmax_dBi:.2f} dBi")

 # 3D normalized pattern
 E = np.squeeze(res.E_norm)     # shape [f, th, ph] -> [th, ph]
@@ -237,19 +241,26 @@ ax = fig.add_subplot(111, projection='3d')
 ax.plot_surface(X, Y, Z, rstride=2, cstride=2, linewidth=0, antialiased=True, alpha=0.92)
 ax.set_title(f'Normalized 3D Pattern @ {f0/1e9:.2f} GHz\n(peak ≈ {Gmax_dBi:.1f} dBi)')
 ax.set_box_aspect((1,1,1))
-ax.set_xlabel('x'); ax.set_ylabel('y'); ax.set_zlabel('z')
+ax.set_xlabel('x')
+ax.set_ylabel('y')
+ax.set_zlabel('z')
 plt.tight_layout()

 # Quick 2D geometry preview (top view at y=b)
 plt.figure(figsize=(8.4,2.8))
-plt.fill_between([0,a], [0,0], [L,L], color='#dddddd', alpha=0.5, step='pre', label='WG aperture (top)')
-for zc, xc in zip(z_centers, x_centers):
+plt.fill_between(
+    [0, a], [0, 0], [L, L], color='#dddddd', alpha=0.5, step='pre', label='WG aperture (top)'
+)
+for zc, xc in zip(z_centers, x_centers, strict=False):
    plt.gca().add_patch(plt.Rectangle((xc - slot_w/2.0, zc - slot_L/2.0),
                                      slot_w, slot_L, fc='#3355ff', ec='k'))
-plt.xlim(-2, a+2); plt.ylim(-5, L+5)
+plt.xlim(-2, a + 2)
+plt.ylim(-5, L + 5)
 plt.gca().invert_yaxis()
-plt.xlabel('x (mm)'); plt.ylabel('z (mm)')
+plt.xlabel('x (mm)')
+plt.ylabel('z (mm)')
 plt.title('Top-view slot layout (y=b plane)')
-plt.grid(True); plt.legend()
+plt.grid(True)
+plt.legend()

 plt.show()
@@ -1,6 +1,6 @@
 # openems_quartz_slotted_wg_10p5GHz.py
 # Slotted rectangular waveguide (quartz-filled, εr=3.8) tuned to 10.5 GHz.
-# Builds geometry, meshes (no GetLine calls), sweeps S-params/impedance over 9.5–11.5 GHz,
+# Builds geometry, meshes (no GetLine calls), sweeps S-params/impedance over 9.5-11.5 GHz,
 # computes 3D far-field, and reports estimated max realized gain.

 import os
@@ -15,14 +15,14 @@ from openEMS.physical_constants import C0
 try:
    from CSXCAD import ContinuousStructure, AppCSXCAD_BIN
    HAVE_APP = True
-except Exception:
+except ImportError:
    from CSXCAD import ContinuousStructure
    AppCSXCAD_BIN = None
    HAVE_APP = False

 #Set PROFILE to "sanity" first; run and check [mesh] cells: stays reasonable.

-#If it’s small, move to "balanced"; once happy, go "full".
+#If it's small, move to "balanced"; once happy, go "full".

 #Toggle VIEW_GEOM=True if you want the 3D viewer (requires AppCSXCAD_BIN available).

@@ -123,9 +123,9 @@ x_edges = np.concatenate([x_centers - slot_w/2.0, x_centers + slot_w/2.0])
 z_edges = np.concatenate([z_centers - slot_L/2.0, z_centers + slot_L/2.0])

 # Mesh lines: explicit (NO GetLine calls)
-x_lines = sorted(set([x_min, -t_metal, 0.0, a, a+t_metal, x_max] + list(x_edges)))
+x_lines = sorted({x_min, -t_metal, 0.0, a, a + t_metal, x_max, *list(x_edges)})
 y_lines = [y_min, 0.0, b, b+t_metal, y_max]
-z_lines = sorted(set([z_min, 0.0, guide_length_mm, z_max] + list(z_edges)))
+z_lines = sorted({z_min, 0.0, guide_length_mm, z_max, *list(z_edges)})

 mesh.AddLine('x', x_lines)
 mesh.AddLine('y', y_lines)
@@ -134,11 +134,10 @@ mesh.AddLine('z', z_lines)
 # Print complexity and rough memory (to help stay inside 16 GB)
 Nx, Ny, Nz = len(x_lines)-1, len(y_lines)-1, len(z_lines)-1
 Ncells = Nx*Ny*Nz
-print(f"[mesh] cells: {Nx} × {Ny} × {Nz} = {Ncells:,}")
 mem_fields_bytes = Ncells * 6 * 8  # rough ~ (Ex,Ey,Ez,Hx,Hy,Hz) doubles
-print(f"[mesh] rough field memory: ~{mem_fields_bytes/1e9:.2f} GB (solver overhead extra)")
-dx_min = min(np.diff(x_lines)); dy_min = min(np.diff(y_lines)); dz_min = min(np.diff(z_lines))
-print(f"[mesh] min steps (mm): dx={dx_min:.3f}, dy={dy_min:.3f}, dz={dz_min:.3f}")
+dx_min = min(np.diff(x_lines))
+dy_min = min(np.diff(y_lines))
+dz_min = min(np.diff(z_lines))

 # Optional smoothing to limit max cell size
 mesh.SmoothMeshLines('all', mesh_res, ratio=1.4)
@@ -147,7 +146,8 @@ mesh.SmoothMeshLines('all', mesh_res, ratio=1.4)
 # MATERIALS & SOLIDS
 # =================
 pec     = CSX.AddMetal('PEC')
-quartzM = CSX.AddMaterial('QUARTZ'); quartzM.SetMaterialProperty(epsilon=er_quartz)
+quartzM = CSX.AddMaterial('QUARTZ')
+quartzM.SetMaterialProperty(epsilon=er_quartz)
 airM    = CSX.AddMaterial('AIR')

 # Quartz full block
@@ -157,10 +157,12 @@ quartzM.AddBox([0, 0, 0], [a, b, guide_length_mm])
 pec.AddBox([-t_metal, 0, 0],     [0,        b,       guide_length_mm])        # left
 pec.AddBox([a,        0, 0],     [a+t_metal,b,       guide_length_mm])        # right
 pec.AddBox([-t_metal,-t_metal,0],[a+t_metal,0,       guide_length_mm])        # bottom
-pec.AddBox([-t_metal, b, 0],     [a+t_metal,b+t_metal,guide_length_mm])       # top (slots will pierce)
+pec.AddBox(
+    [-t_metal, b, 0], [a + t_metal, b + t_metal, guide_length_mm]
+)  # top (slots will pierce)

 # Slots (AIR) overriding top metal
-for zc, xc in zip(z_centers, x_centers):
+for zc, xc in zip(z_centers, x_centers, strict=False):
    x1, x2 = xc - slot_w/2.0, xc + slot_w/2.0
    z1, z2 = zc - slot_L/2.0, zc + slot_L/2.0
    prim = airM.AddBox([x1, b, z1], [x2, b+t_metal, z2])
@@ -210,23 +212,20 @@ if VIEW_GEOM and HAVE_APP and AppCSXCAD_BIN:
 t0 = time.time()
 FDTD.Run(Sim_Path, cleanup=True, verbose=2, numThreads=THREADS)
 t1 = time.time()
-print(f"[timing] FDTD solve elapsed: {t1 - t0:.2f} s")

 # ... right before NF2FF (far-field):
 t2 = time.time()
 try:
-    res = nf2ff.CalcNF2FF(Sim_Path, [f0], theta, phi)
-except AttributeError:
-    res = FDTD.CalcNF2FF(nf2ff, Sim_Path, [f0], theta, phi)
+    res = nf2ff.CalcNF2FF(Sim_Path, [f0], theta, phi)  # noqa: F821
+except AttributeError:
+    res = FDTD.CalcNF2FF(nf2ff, Sim_Path, [f0], theta, phi)  # noqa: F821
 t3 = time.time()
-print(f"[timing] NF2FF (far-field) elapsed: {t3 - t2:.2f} s")

 # ... S-parameters postproc timing (optional):
 t4 = time.time()
-for p in ports:
-    p.CalcPort(Sim_Path, freq)
+for p in ports:  # noqa: F821
+    p.CalcPort(Sim_Path, freq)  # noqa: F821
 t5 = time.time()
-print(f"[timing] Port/S-params postproc elapsed: {t5 - t4:.2f} s")


 # =======
@@ -235,11 +234,8 @@ print(f"[timing] Port/S-params postproc elapsed: {t5 - t4:.2f} s")
 if SIMULATE:
    FDTD.Run(Sim_Path, cleanup=True, verbose=2, numThreads=THREADS)

-# ==========================
-# POST: S-PARAMS / IMPEDANCE
-# ==========================
-freq = np.linspace(f_start, f_stop, profiles[PROFILE]["freq_pts"])
-ports = [p for p in FDTD.ports]   # Port 1 & 2 in creation order
+freq = np.linspace(f_start, f_stop, profiles[PROFILE]["freq_pts"])
+ports = list(FDTD.ports)   # Port 1 & 2 in creation order
 for p in ports:
    p.CalcPort(Sim_Path, freq)

@@ -250,13 +246,19 @@ Zin = ports[0].uf_tot / ports[0].if_tot
 plt.figure(figsize=(7.6,4.6))
 plt.plot(freq*1e-9, 20*np.log10(np.abs(S11)), lw=2, label='|S11|')
 plt.plot(freq*1e-9, 20*np.log10(np.abs(S21)), lw=2, ls='--', label='|S21|')
-plt.grid(True); plt.legend(); plt.xlabel('Frequency (GHz)'); plt.ylabel('Magnitude (dB)')
+plt.grid(True)
+plt.legend()
+plt.xlabel('Frequency (GHz)')
+plt.ylabel('Magnitude (dB)')
 plt.title(f'S-Parameters (profile: {PROFILE})')

 plt.figure(figsize=(7.6,4.6))
 plt.plot(freq*1e-9, np.real(Zin), lw=2, label='Re{Zin}')
 plt.plot(freq*1e-9, np.imag(Zin), lw=2, ls='--', label='Im{Zin}')
-plt.grid(True); plt.legend(); plt.xlabel('Frequency (GHz)'); plt.ylabel('Ohms')
+plt.grid(True)
+plt.legend()
+plt.xlabel('Frequency (GHz)')
+plt.ylabel('Ohms')
 plt.title('Input Impedance (Port 1)')

 # ==========================
@@ -277,9 +279,6 @@ mismatch = 1.0 - np.abs(S11[idx_f0])**2
 Gmax_lin = Dmax_lin * float(mismatch)
 Gmax_dBi = 10*np.log10(Gmax_lin)

-print(f"[far-field] Dmax @ {f0/1e9:.3f} GHz: {10*np.log10(Dmax_lin):.2f} dBi")
-print(f"[far-field] mismatch (1-|S11|^2): {float(mismatch):.3f}")
-print(f"[far-field] est. max realized gain: {Gmax_dBi:.2f} dBi")

 # Normalized 3D pattern
 E = np.squeeze(res.E_norm)     # [th, ph]
@@ -295,22 +294,35 @@ ax = fig.add_subplot(111, projection='3d')
 ax.plot_surface(X, Y, Z, rstride=2, cstride=2, linewidth=0, antialiased=True, alpha=0.92)
 ax.set_title(f'Normalized 3D Pattern @ {f0/1e9:.2f} GHz\n(peak ≈ {Gmax_dBi:.1f} dBi)')
 ax.set_box_aspect((1,1,1))
-ax.set_xlabel('x'); ax.set_ylabel('y'); ax.set_zlabel('z')
+ax.set_xlabel('x')
+ax.set_ylabel('y')
+ax.set_zlabel('z')
 plt.tight_layout()

 # ==========================
 # QUICK 2D GEOMETRY PREVIEW
 # ==========================
 plt.figure(figsize=(8.4,2.8))
-plt.fill_between([0,a], [0,0], [guide_length_mm, guide_length_mm], color='#dddddd', alpha=0.5, step='pre', label='WG top aperture')
-for zc, xc in zip(z_centers, x_centers):
+plt.fill_between(
+    [0, a],
+    [0, 0],
+    [guide_length_mm, guide_length_mm],
+    color='#dddddd',
+    alpha=0.5,
+    step='pre',
+    label='WG top aperture',
+)
+for zc, xc in zip(z_centers, x_centers, strict=False):
    plt.gca().add_patch(plt.Rectangle((xc - slot_w/2.0, zc - slot_L/2.0),
                                      slot_w, slot_L, fc='#3355ff', ec='k'))
-plt.xlim(-2, a+2); plt.ylim(-5, guide_length_mm+5)
+plt.xlim(-2, a + 2)
+plt.ylim(-5, guide_length_mm + 5)
 plt.gca().invert_yaxis()
-plt.xlabel('x (mm)'); plt.ylabel('z (mm)')
+plt.xlabel('x (mm)')
+plt.ylabel('z (mm)')
 plt.title(f'Top-view slot layout (N={Nslots}, profile={PROFILE})')
-plt.grid(True); plt.legend()
+plt.grid(True)
+plt.legend()



@@ -68,11 +68,8 @@ def generate_multi_ramp_csv(Fs=125e6, Tb=1e-6, Tau=2e-6, fmax=30e6, fmin=10e6,
    # --- Save CSV (no header)
    df = pd.DataFrame({"time(s)": t_csv, "voltage(V)": y_csv})
    df.to_csv(filename, index=False, header=False)
-    print(f"CSV saved: {filename}")
-    print(f"Total raw samples: {total_samples} | Ramps inserted: {ramps_inserted} | CSV points: {len(y_csv)}")

-    # --- Plot (staircase)
-    if show_plot or save_plot_png:
+    if show_plot or save_plot_png:
        # Choose plotting vectors (use raw DAC samples to keep lines crisp)
        t_plot = t
        y_plot = y
@@ -108,7 +105,6 @@ def generate_multi_ramp_csv(Fs=125e6, Tb=1e-6, Tau=2e-6, fmax=30e6, fmin=10e6,

        if save_plot_png:
            plt.savefig(save_plot_png, dpi=150)
-            print(f"Plot saved: {save_plot_png}")
        if show_plot:
            plt.show()
        else:
@@ -1,7 +1,6 @@
 import matplotlib.pyplot as plt

-# Dimensions (all in mm)
-line_width = 0.204
+line_width = 0.204
 substrate_height = 0.102
 via_drill = 0.20
 via_pad_A = 0.20  # minimal pad case
@@ -27,10 +26,20 @@ ax.axhline(polygon_y2, color="blue", linestyle="--")
 via_positions = [2, 4, 6, 8]  # x positions for visualization
 for x in via_positions:
    # Case A
-    ax.add_patch(plt.Circle((x, polygon_y1), via_pad_A/2, facecolor="green", alpha=0.5, label="Via pad A" if x==2 else ""))
+    ax.add_patch(
+        plt.Circle(
+            (x, polygon_y1), via_pad_A / 2, facecolor="green", alpha=0.5,
+            label="Via pad A" if x == 2 else ""
+        )
+    )
    ax.add_patch(plt.Circle((x, polygon_y2), via_pad_A/2, facecolor="green", alpha=0.5))
    # Case B
-    ax.add_patch(plt.Circle((-x, polygon_y1), via_pad_B/2, facecolor="red", alpha=0.3, label="Via pad B" if x==2 else ""))
+    ax.add_patch(
+        plt.Circle(
+            (-x, polygon_y1), via_pad_B / 2, facecolor="red", alpha=0.3,
+            label="Via pad B" if x == 2 else ""
+        )
+    )
    ax.add_patch(plt.Circle((-x, polygon_y2), via_pad_B/2, facecolor="red", alpha=0.3))

 # Add dimensions text
@@ -1,7 +1,6 @@
 import matplotlib.pyplot as plt

-# Dimensions (all in mm)
-line_width = 0.204
+line_width = 0.204
 via_pad_A = 0.20
 via_pad_B = 0.45
 polygon_offset = 0.30
@@ -26,10 +25,20 @@ ax.axhline(polygon_y2, color="blue", linestyle="--")
 via_positions = [2, 2 + via_pitch]  # two vias for showing spacing
 for x in via_positions:
    # Case A
-    ax.add_patch(plt.Circle((x, polygon_y1), via_pad_A/2, facecolor="green", alpha=0.5, label="Via pad A" if x==2 else ""))
+    ax.add_patch(
+        plt.Circle(
+            (x, polygon_y1), via_pad_A / 2, facecolor="green", alpha=0.5,
+            label="Via pad A" if x == 2 else ""
+        )
+    )
    ax.add_patch(plt.Circle((x, polygon_y2), via_pad_A/2, facecolor="green", alpha=0.5))
    # Case B
-    ax.add_patch(plt.Circle((-x, polygon_y1), via_pad_B/2, facecolor="red", alpha=0.3, label="Via pad B" if x==2 else ""))
+    ax.add_patch(
+        plt.Circle(
+            (-x, polygon_y1), via_pad_B / 2, facecolor="red", alpha=0.3,
+            label="Via pad B" if x == 2 else ""
+        )
+    )
    ax.add_patch(plt.Circle((-x, polygon_y2), via_pad_B/2, facecolor="red", alpha=0.3))

 # Add text annotations
@@ -40,15 +49,17 @@ ax.text(-2, polygon_y1 + 0.5, "Via B Ø0.45 mm pad", color="red")

 # Add pitch dimension (horizontal between vias)
 ax.annotate("", xy=(2, polygon_y1 + 0.2), xytext=(2 + via_pitch, polygon_y1 + 0.2),
-            arrowprops=dict(arrowstyle="<->", color="purple"))
+            arrowprops={"arrowstyle": "<->", "color": "purple"})
 ax.text(2 + via_pitch/2, polygon_y1 + 0.3, f"{via_pitch:.2f} mm pitch", color="purple", ha="center")

 # Add distance from RF line edge to via center
 line_edge_y = rf_line_y + line_width/2
 via_center_y = polygon_y1
 ax.annotate("", xy=(2.4, line_edge_y), xytext=(2.4, via_center_y),
-            arrowprops=dict(arrowstyle="<->", color="brown"))
-ax.text(2.5, (line_edge_y + via_center_y)/2, f"{via_center_offset:.2f} mm", color="brown", va="center")
+            arrowprops={"arrowstyle": "<->", "color": "brown"})
+ax.text(
+    2.5, (line_edge_y + via_center_y) / 2, f"{via_center_offset:.2f} mm", color="brown", va="center"
+)

 # Formatting
 ax.set_xlim(-5, 5)
@@ -27,7 +27,7 @@ n_idx = np.arange(N) - (N-1)/2
 y_positions = m_idx * dy
 z_positions = n_idx * dz

-def element_factor(theta_rad, phi_rad):
+def element_factor(theta_rad, _phi_rad):
    return np.abs(np.cos(theta_rad))

 def array_factor(theta_rad, phi_rad, y_positions, z_positions, wy, wz, theta0_rad, phi0_rad):
@@ -105,5 +105,3 @@ plt.title('Array Pattern Heatmap (|AF·EF|, dB) — Kaiser ~-25 dB')
 plt.tight_layout()
 plt.savefig('Heatmap_Kaiser25dB_like.png', bbox_inches='tight')
 plt.show()
-
-print('Saved: E_plane_Kaiser25dB_like.png, H_plane_Kaiser25dB_like.png, Heatmap_Kaiser25dB_like.png')
@@ -15,12 +15,20 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
    timestamp_ns = 0
    
    # Target parameters
-    targets = [
-        {'range': 3000, 'velocity': 25, 'snr': 30, 'azimuth': 10, 'elevation': 5},   # Fast moving target
-        {'range': 5000, 'velocity': -15, 'snr': 25, 'azimuth': 20, 'elevation': 2},  # Approaching target
-        {'range': 8000, 'velocity': 5, 'snr': 20, 'azimuth': 30, 'elevation': 8},    # Slow moving target
-        {'range': 12000, 'velocity': -8, 'snr': 18, 'azimuth': 45, 'elevation': 3},  # Distant target
-    ]
+    targets = [
+        {
+            'range': 3000, 'velocity': 25, 'snr': 30, 'azimuth': 10, 'elevation': 5
+        },  # Fast moving target
+        {
+            'range': 5000, 'velocity': -15, 'snr': 25, 'azimuth': 20, 'elevation': 2
+        },  # Approaching target
+        {
+            'range': 8000, 'velocity': 5, 'snr': 20, 'azimuth': 30, 'elevation': 8
+        },  # Slow moving target
+        {
+            'range': 12000, 'velocity': -8, 'snr': 18, 'azimuth': 45, 'elevation': 3
+        },  # Distant target
+    ]
    
    # Noise parameters
    noise_std = 5
@@ -30,7 +38,6 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
    chirp_number = 0
    
    # Generate Long Chirps (30µs duration equivalent)
-    print("Generating Long Chirps...")
    for chirp in range(num_long_chirps):
        for sample in range(samples_per_chirp):
            # Base noise
@@ -38,7 +45,7 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
            q_val = np.random.normal(0, noise_std)
            
            # Add clutter (stationary targets)
-            clutter_range = 2000  # Fixed clutter at 2km
+            _clutter_range = 2000  # Fixed clutter at 2km
            if sample < 100:  # Simulate clutter in first 100 samples
                i_val += np.random.normal(0, clutter_std)
                q_val += np.random.normal(0, clutter_std)
@@ -47,7 +54,9 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
            for target in targets:
                # Calculate range bin (simplified)
                range_bin = int(target['range'] / 20)  # ~20m per bin
-                doppler_phase = 2 * math.pi * target['velocity'] * chirp / 100  # Doppler phase shift
+                doppler_phase = (
+                    2 * math.pi * target['velocity'] * chirp / 100
+                )  # Doppler phase shift
                
                # Target appears around its range bin with some spread
                if abs(sample - range_bin) < 10:
@@ -80,7 +89,6 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
    timestamp_ns += 175400  # 175.4µs guard time
    
    # Generate Short Chirps (0.5µs duration equivalent)
-    print("Generating Short Chirps...")
    for chirp in range(num_short_chirps):
        for sample in range(samples_per_chirp):
            # Base noise
@@ -96,7 +104,9 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
            for target in targets:
                # Range bin calculation (different for short chirps)
                range_bin = int(target['range'] / 40)  # Different range resolution
-                doppler_phase = 2 * math.pi * target['velocity'] * (chirp + 5) / 80  # Different Doppler
+                doppler_phase = (
+                    2 * math.pi * target['velocity'] * (chirp + 5) / 80
+                )  # Different Doppler
                
                # Target appears around its range bin
                if abs(sample - range_bin) < 8:
@@ -130,11 +140,6 @@ def generate_radar_csv(filename="pulse_compression_output.csv"):
    
    # Save to CSV
    df.to_csv(filename, index=False)
-    print(f"Generated CSV file: {filename}")
-    print(f"Total samples: {len(df)}")
-    print(f"Long chirps: {num_long_chirps}, Short chirps: {num_short_chirps}")
-    print(f"Samples per chirp: {samples_per_chirp}")
-    print(f"File size: {len(df) // 1000}K samples")
    
    return df

@@ -142,15 +147,11 @@ def analyze_generated_data(df):
    """
    Analyze the generated data to verify target detection
    """
-    print("\n=== Data Analysis ===")
    
    # Basic statistics
-    long_chirps = df[df['chirp_type'] == 'LONG']
-    short_chirps = df[df['chirp_type'] == 'SHORT']
+    df[df['chirp_type'] == 'LONG']
+    df[df['chirp_type'] == 'SHORT']
    
-    print(f"Long chirp samples: {len(long_chirps)}")
-    print(f"Short chirp samples: {len(short_chirps)}")
-    print(f"Unique chirp numbers: {df['chirp_number'].nunique()}")
    
    # Calculate actual magnitude and phase for analysis
    df['magnitude'] = np.sqrt(df['I_value']**2 + df['Q_value']**2)
@@ -160,15 +161,11 @@ def analyze_generated_data(df):
    high_mag_threshold = df['magnitude'].quantile(0.95)  # Top 5%
    targets_detected = df[df['magnitude'] > high_mag_threshold]
    
-    print(f"\nTarget detection threshold: {high_mag_threshold:.2f}")
-    print(f"High magnitude samples: {len(targets_detected)}")
    
    # Group by chirp type
-    long_targets = targets_detected[targets_detected['chirp_type'] == 'LONG']
-    short_targets = targets_detected[targets_detected['chirp_type'] == 'SHORT']
+    targets_detected[targets_detected['chirp_type'] == 'LONG']
+    targets_detected[targets_detected['chirp_type'] == 'SHORT']
    
-    print(f"Targets in long chirps: {len(long_targets)}")
-    print(f"Targets in short chirps: {len(short_targets)}")
    
    return df

@@ -179,10 +176,3 @@ if __name__ == "__main__":
    # Analyze the generated data
    analyze_generated_data(df)
    
-    print("\n=== CSV File Ready ===")
-    print("You can now test the Python GUI with this CSV file!")
-    print("The file contains:")
-    print("- 16 Long chirps + 16 Short chirps")
-    print("- 4 simulated targets at different ranges and velocities")
-    print("- Realistic noise and clutter")
-    print("- Proper I/Q data for Doppler processing")
@@ -90,8 +90,6 @@ def generate_small_radar_csv(filename="small_test_radar_data.csv"):
    
    df = pd.DataFrame(data)
    df.to_csv(filename, index=False)
-    print(f"Generated small CSV: {filename}")
-    print(f"Total samples: {len(df)}")
    return df

 generate_small_radar_csv()
@@ -1,5 +1,5 @@
 import numpy as np
-from numpy.fft import fft, ifft
+from numpy.fft import fft
 import matplotlib.pyplot as plt


@@ -15,7 +15,10 @@ theta_n= 2*np.pi*(pow(N,2)*pow(Ts,2)*(fmax-fmin)/(2*Tb)+fmin*N*Ts) # instantaneo
 y = 1 + np.sin(theta_n) # ramp signal in time domain

 M = np.arange(n, 2*n, 1)
-theta_m= 2*np.pi*(pow(M,2)*pow(Ts,2)*(-fmax+fmin)/(2*Tb)+(-fmin+2*fmax)*M*Ts)-2*np.pi*((fmin-fmax)*Tb/2+(2*fmax-fmin)*Tb) # instantaneous phase
+theta_m= (
+    2*np.pi*(pow(M,2)*pow(Ts,2)*(-fmax+fmin)/(2*Tb)+(-fmin+2*fmax)*M*Ts)
+    - 2*np.pi*((fmin-fmax)*Tb/2+(2*fmax-fmin)*Tb)
+) # instantaneous phase
 z = 1 + np.sin(theta_m) # ramp signal in time domain

 x = np.concatenate((y, z))
@@ -23,9 +26,9 @@ x = np.concatenate((y, z))
 t = Ts*np.arange(0,2*n,1)
 X = fft(x)
 L =len(X)
-l = np.arange(L)
+freq_indices = np.arange(L)
 T = L*Ts
-freq = l/T
+freq = freq_indices/T


 plt.figure(figsize = (12, 6))
@@ -15,7 +15,10 @@ theta_n= 2*np.pi*(pow(N,2)*pow(Ts,2)*(fmax-fmin)/(2*Tb)+fmin*N*Ts) # instantaneo
 y = 1 + np.sin(theta_n) # ramp signal in time domain

 M = np.arange(n, 2*n, 1)
-theta_m= 2*np.pi*(pow(M,2)*pow(Ts,2)*(-fmax+fmin)/(2*Tb)+(-fmin+2*fmax)*M*Ts)-2*np.pi*((fmin-fmax)*Tb/2+(2*fmax-fmin)*Tb) # instantaneous phase
+theta_m= (
+    2*np.pi*(pow(M,2)*pow(Ts,2)*(-fmax+fmin)/(2*Tb)+(-fmin+2*fmax)*M*Ts)
+    - 2*np.pi*((fmin-fmax)*Tb/2+(2*fmax-fmin)*Tb)
+) # instantaneous phase
 z = 1 + np.sin(theta_m) # ramp signal in time domain

 x = np.concatenate((y, z))
@@ -24,11 +27,10 @@ t = Ts*np.arange(0,2*n,1)
 plt.plot(t, x)
 X = fft(x)
 L =len(X)
-l = np.arange(L)
+freq_indices = np.arange(L)
 T = L*Ts
-freq = l/T
+freq = freq_indices/T

-print("The Array is: ", x) #printing the array

 plt.figure(figsize = (12, 6))
 plt.subplot(121)
@@ -20,5 +20,5 @@ y = 1 + np.sin(theta_n)  # Normalize from 0 to 2
 y_scaled = np.round(y * 127.5).astype(int)  # Scale to 8-bit range (0-255)

 # Print values in Verilog-friendly format
-for i in range(n):
-    print(f"waveform_LUT[{i}] = 8'h{y_scaled[i]:02X};")
+for _i in range(n):
+    pass
@@ -58,10 +58,10 @@ class RadarCalculatorGUI:
        scrollbar = ttk.Scrollbar(self.input_frame, orient="vertical", command=canvas.yview)
        scrollable_frame = ttk.Frame(canvas)
        
-        scrollable_frame.bind(
-            "<Configure>",
-            lambda e: canvas.configure(scrollregion=canvas.bbox("all"))
-        )
+        scrollable_frame.bind(
+            "<Configure>",
+            lambda _e: canvas.configure(scrollregion=canvas.bbox("all"))
+        )
        
        canvas.create_window((0, 0), window=scrollable_frame, anchor="nw")
        canvas.configure(yscrollcommand=scrollbar.set)
@@ -83,7 +83,7 @@ class RadarCalculatorGUI:
        
        self.entries = {}
        
-        for i, (label, default) in enumerate(inputs):
+        for _i, (label, default) in enumerate(inputs):
            # Create a frame for each input row
            row_frame = ttk.Frame(scrollable_frame)
            row_frame.pack(fill=tk.X, pady=5)
@@ -119,8 +119,8 @@ class RadarCalculatorGUI:
        calculate_btn.pack()
        
        # Bind hover effect
-        calculate_btn.bind("<Enter>", lambda e: calculate_btn.config(bg='#45a049'))
-        calculate_btn.bind("<Leave>", lambda e: calculate_btn.config(bg='#4CAF50'))
+        calculate_btn.bind("<Enter>", lambda _e: calculate_btn.config(bg='#45a049'))
+        calculate_btn.bind("<Leave>", lambda _e: calculate_btn.config(bg='#4CAF50'))
        
    def create_results_display(self):
        """Create the results display area"""
@@ -135,10 +135,10 @@ class RadarCalculatorGUI:
        scrollbar = ttk.Scrollbar(self.results_frame, orient="vertical", command=canvas.yview)
        scrollable_frame = ttk.Frame(canvas)
        
-        scrollable_frame.bind(
-            "<Configure>",
-            lambda e: canvas.configure(scrollregion=canvas.bbox("all"))
-        )
+        scrollable_frame.bind(
+            "<Configure>",
+            lambda _e: canvas.configure(scrollregion=canvas.bbox("all"))
+        )
        
        canvas.create_window((0, 0), window=scrollable_frame, anchor="nw")
        canvas.configure(yscrollcommand=scrollbar.set)
@@ -158,7 +158,7 @@ class RadarCalculatorGUI:
        
        self.results_labels = {}
        
-        for i, (label, key) in enumerate(results):
+        for _i, (label, key) in enumerate(results):
            # Create a frame for each result row
            row_frame = ttk.Frame(scrollable_frame)
            row_frame.pack(fill=tk.X, pady=10, padx=20)
@@ -180,10 +180,10 @@ class RadarCalculatorGUI:
        note_text = """
        NOTES:
        • Maximum detectable range is calculated using the radar equation
-        • Range resolution = c × τ / 2, where τ is pulse duration
-        • Maximum unambiguous range = c / (2 × PRF)
-        • Maximum detectable speed = λ × PRF / 4
-        • Speed resolution = λ × PRF / (2 × N) where N is number of pulses (assumed 1)
+        • Range resolution = c x τ / 2, where τ is pulse duration
+        • Maximum unambiguous range = c / (2 x PRF)
+        • Maximum detectable speed = λ x PRF / 4
+        • Speed resolution = λ x PRF / (2 x N) where N is number of pulses (assumed 1)
        • λ (wavelength) = c / f
        """
        
@@ -221,7 +221,10 @@ class RadarCalculatorGUI:
            temp = self.get_float_value(self.entries["Temperature (K):"])
            
            # Validate inputs
-            if None in [f_ghz, pulse_duration_us, prf, p_dbm, g_dbi, sens_dbm, rcs, losses_db, nf_db, temp]:
+            if None in [
+                f_ghz, pulse_duration_us, prf, p_dbm, g_dbi,
+                sens_dbm, rcs, losses_db, nf_db, temp,
+            ]:
                messagebox.showerror("Error", "Please enter valid numeric values for all fields")
                return
                
@@ -235,7 +238,7 @@ class RadarCalculatorGUI:
            g_linear = 10 ** (g_dbi / 10)
            sens_linear = 10 ** ((sens_dbm - 30) / 10)
            losses_linear = 10 ** (losses_db / 10)
-            nf_linear = 10 ** (nf_db / 10)
+            _nf_linear = 10 ** (nf_db / 10)
            
            # Calculate receiver noise power
            if k is None:
@@ -297,12 +300,15 @@ class RadarCalculatorGUI:
            # Show success message
            messagebox.showinfo("Success", "Calculation completed successfully!")
            
-        except Exception as e:
-            messagebox.showerror("Calculation Error", f"An error occurred during calculation:\n{str(e)}")
+        except (ValueError, ZeroDivisionError) as e:
+            messagebox.showerror(
+                "Calculation Error",
+                f"An error occurred during calculation:\n{e!s}",
+            )
            
 def main():
    root = tk.Tk()
-    app = RadarCalculatorGUI(root)
+    _app = RadarCalculatorGUI(root)
    root.mainloop()

 if __name__ == "__main__":
@@ -12,13 +12,22 @@ def calculate_patch_antenna_parameters(frequency, epsilon_r, h_sub, h_cu, array)
    lamb = c /(frequency * 1e9)
    
    # Calculate the effective dielectric constant
-    epsilon_eff = (epsilon_r + 1) / 2 + (epsilon_r - 1) / 2 * (1 + 12 * h_sub_m / (array[1] * h_cu_m)) ** (-0.5)
+    epsilon_eff = (
+        (epsilon_r + 1) / 2
+        + (epsilon_r - 1) / 2 * (1 + 12 * h_sub_m / (array[1] * h_cu_m)) ** (-0.5)
+    )
    
    # Calculate the width of the patch
    W = c / (2 * frequency * 1e9) * np.sqrt(2 / (epsilon_r + 1))
    
    # Calculate the effective length
-    delta_L = 0.412 * h_sub_m * (epsilon_eff + 0.3) * (W / h_sub_m + 0.264) / ((epsilon_eff - 0.258) * (W / h_sub_m + 0.8))
+    delta_L = (
+        0.412
+        * h_sub_m
+        * (epsilon_eff + 0.3)
+        * (W / h_sub_m + 0.264)
+        / ((epsilon_eff - 0.258) * (W / h_sub_m + 0.8))
+    )
    
    # Calculate the length of the patch
    L = c / (2 * frequency * 1e9 * np.sqrt(epsilon_eff)) - 2 * delta_L
@@ -31,7 +40,10 @@ def calculate_patch_antenna_parameters(frequency, epsilon_r, h_sub, h_cu, array)
    
    # Calculate the feeding line width (W_feed)
    Z0 = 50  # Characteristic impedance of the feeding line (typically 50 ohms)
-    A = Z0 / 60 * np.sqrt((epsilon_r + 1) / 2) + (epsilon_r - 1) / (epsilon_r + 1) * (0.23 + 0.11 / epsilon_r)
+    A = (
+        Z0 / 60 * np.sqrt((epsilon_r + 1) / 2)
+        + (epsilon_r - 1) / (epsilon_r + 1) * (0.23 + 0.11 / epsilon_r)
+    )
    W_feed = 8 * h_sub_m / np.exp(A) - 2 * h_cu_m
    
    # Convert results back to mm
@@ -50,10 +62,7 @@ h_sub = 0.102  # Height of substrate in mm
 h_cu = 0.07  # Height of copper in mm
 array = [2, 2]  # 2x2 array

-W_mm, L_mm, dx_mm, dy_mm, W_feed_mm = calculate_patch_antenna_parameters(frequency, epsilon_r, h_sub, h_cu, array)
+W_mm, L_mm, dx_mm, dy_mm, W_feed_mm = calculate_patch_antenna_parameters(
+    frequency, epsilon_r, h_sub, h_cu, array
+)

-print(f"Width of the patch: {W_mm:.4f} mm")
-print(f"Length of the patch: {L_mm:.4f} mm")
-print(f"Separation distance in horizontal axis: {dx_mm:.4f} mm")
-print(f"Separation distance in vertical axis: {dy_mm:.4f} mm")
-print(f"Feeding line width: {W_feed_mm:.2f} mm")
@@ -0,0 +1,116 @@
+// ADAR1000_AGC.cpp -- STM32 outer-loop AGC implementation
+//
+// See ADAR1000_AGC.h for architecture overview.
+
+#include "ADAR1000_AGC.h"
+#include "ADAR1000_Manager.h"
+#include "diag_log.h"
+
+#include <cstring>
+
+// ---------------------------------------------------------------------------
+// Constructor -- set all config fields to safe defaults
+// ---------------------------------------------------------------------------
+ADAR1000_AGC::ADAR1000_AGC()
+    : agc_base_gain(ADAR1000Manager::kDefaultRxVgaGain) // 30
+    , gain_step_down(4)
+    , gain_step_up(1)
+    , min_gain(0)
+    , max_gain(127)
+    , holdoff_frames(4)
+    , enabled(false)
+    , holdoff_counter(0)
+    , last_saturated(false)
+    , saturation_event_count(0)
+{
+    memset(cal_offset, 0, sizeof(cal_offset));
+}
+
+// ---------------------------------------------------------------------------
+// update -- called once per frame with the FPGA DIG_5 saturation flag
+//
+// Returns true if agc_base_gain changed (caller should then applyGain).
+// ---------------------------------------------------------------------------
+void ADAR1000_AGC::update(bool fpga_saturation)
+{
+    if (!enabled)
+        return;
+
+    last_saturated = fpga_saturation;
+
+    if (fpga_saturation) {
+        // Attack: reduce gain immediately
+        saturation_event_count++;
+        holdoff_counter = 0;
+
+        if (agc_base_gain >= gain_step_down + min_gain) {
+            agc_base_gain -= gain_step_down;
+        } else {
+            agc_base_gain = min_gain;
+        }
+
+        DIAG("AGC", "SAT detected -- gain_base -> %u  (events=%lu)",
+             (unsigned)agc_base_gain, (unsigned long)saturation_event_count);
+
+    } else {
+        // Recovery: wait for holdoff, then increase gain
+        holdoff_counter++;
+
+        if (holdoff_counter >= holdoff_frames) {
+            holdoff_counter = 0;
+
+            if (agc_base_gain + gain_step_up <= max_gain) {
+                agc_base_gain += gain_step_up;
+            } else {
+                agc_base_gain = max_gain;
+            }
+
+            DIAG("AGC", "Recovery step -- gain_base -> %u", (unsigned)agc_base_gain);
+        }
+    }
+}
+
+// ---------------------------------------------------------------------------
+// applyGain -- write effective gain to all 16 RX VGA channels
+//
+// Uses the Manager's adarSetRxVgaGain which takes 1-based channel indices
+// (matching the convention in setBeamAngle).
+// ---------------------------------------------------------------------------
+void ADAR1000_AGC::applyGain(ADAR1000Manager &mgr)
+{
+    for (uint8_t dev = 0; dev < AGC_NUM_DEVICES; ++dev) {
+        for (uint8_t ch = 0; ch < AGC_NUM_CHANNELS; ++ch) {
+            uint8_t gain = effectiveGain(dev * AGC_NUM_CHANNELS + ch);
+            // Channel parameter is 1-based per Manager convention
+            mgr.adarSetRxVgaGain(dev, ch + 1, gain, BROADCAST_OFF);
+        }
+    }
+}
+
+// ---------------------------------------------------------------------------
+// resetState -- clear runtime counters, preserve configuration
+// ---------------------------------------------------------------------------
+void ADAR1000_AGC::resetState()
+{
+    holdoff_counter = 0;
+    last_saturated = false;
+    saturation_event_count = 0;
+}
+
+// ---------------------------------------------------------------------------
+// effectiveGain -- compute clamped per-channel gain
+// ---------------------------------------------------------------------------
+uint8_t ADAR1000_AGC::effectiveGain(uint8_t channel_index) const
+{
+    if (channel_index >= AGC_TOTAL_CHANNELS)
+        return min_gain;  // safety fallback — OOB channels get minimum gain
+
+    int16_t raw = static_cast<int16_t>(agc_base_gain) + cal_offset[channel_index];
+
+    if (raw < static_cast<int16_t>(min_gain))
+        return min_gain;
+    if (raw > static_cast<int16_t>(max_gain))
+        return max_gain;
+
+    return static_cast<uint8_t>(raw);
+}
@@ -0,0 +1,97 @@
+// ADAR1000_AGC.h -- STM32 outer-loop AGC for ADAR1000 RX VGA gain
+//
+// Adjusts the analog VGA common-mode gain on each ADAR1000 RX channel based on
+// the FPGA's saturation flag (DIG_5 / PD13).  Runs once per radar frame
+// (~258 ms) in the main loop, after runRadarPulseSequence().
+//
+// Architecture:
+//   - Inner loop (FPGA, per-sample): rx_gain_control auto-adjusts digital
+//     gain_shift based on peak magnitude / saturation.  Range ±42 dB.
+//   - Outer loop (THIS MODULE, per-frame): reads FPGA DIG_5 GPIO.  If
+//     saturation detected, reduces agc_base_gain immediately (attack).  If no
+//     saturation for holdoff_frames, increases agc_base_gain (decay/recovery).
+//
+// Per-channel gain formula:
+//   VGA[dev][ch] = clamp(agc_base_gain + cal_offset[dev*4+ch], min_gain, max_gain)
+//
+// The cal_offset array allows per-element calibration to correct inter-channel
+// gain imbalance.  Default is all zeros (uniform gain).
+
+#ifndef ADAR1000_AGC_H
+#define ADAR1000_AGC_H
+
+#include <stdint.h>
+
+// Forward-declare to avoid pulling in the full ADAR1000_Manager header here.
+// The .cpp includes the real header.
+class ADAR1000Manager;
+
+// Number of ADAR1000 devices
+#define AGC_NUM_DEVICES   4
+// Number of channels per ADAR1000
+#define AGC_NUM_CHANNELS  4
+// Total RX channels
+#define AGC_TOTAL_CHANNELS (AGC_NUM_DEVICES * AGC_NUM_CHANNELS)
+
+class ADAR1000_AGC {
+public:
+    // --- Configuration (public for easy field-testing / GUI override) ---
+
+    // Common-mode base gain (raw ADAR1000 register value, 0-255).
+    // Default matches ADAR1000Manager::kDefaultRxVgaGain = 30.
+    uint8_t agc_base_gain;
+
+    // Per-channel calibration offset (signed, added to agc_base_gain).
+    // Index = device*4 + channel.  Default: all 0.
+    int8_t cal_offset[AGC_TOTAL_CHANNELS];
+
+    // How much to decrease agc_base_gain per frame when saturated (attack).
+    uint8_t gain_step_down;
+
+    // How much to increase agc_base_gain per frame when recovering (decay).
+    uint8_t gain_step_up;
+
+    // Minimum allowed agc_base_gain (floor).
+    uint8_t min_gain;
+
+    // Maximum allowed agc_base_gain (ceiling).
+    uint8_t max_gain;
+
+    // Number of consecutive non-saturated frames required before gain-up.
+    uint8_t holdoff_frames;
+
+    // Master enable.  When false, update() is a no-op.
+    bool enabled;
+
+    // --- Runtime state (read-only for diagnostics) ---
+
+    // Consecutive non-saturated frame counter (resets on saturation).
+    uint8_t holdoff_counter;
+
+    // True if the last update() saw saturation.
+    bool last_saturated;
+
+    // Total saturation events since reset/construction.
+    uint32_t saturation_event_count;
+
+    // --- Methods ---
+
+    ADAR1000_AGC();
+
+    // Call once per frame after runRadarPulseSequence().
+    // fpga_saturation: result of HAL_GPIO_ReadPin(GPIOD, GPIO_PIN_13) == GPIO_PIN_SET
+    void update(bool fpga_saturation);
+
+    // Apply the current gain to all 16 RX VGA channels via the Manager.
+    void applyGain(ADAR1000Manager &mgr);
+
+    // Reset runtime state (holdoff counter, saturation count) without
+    // changing configuration.
+    void resetState();
+
+    // Compute the effective gain for a specific channel index (0-15),
+    // clamped to [min_gain, max_gain].  Useful for diagnostics.
+    uint8_t effectiveGain(uint8_t channel_index) const;
+};
+
+#endif // ADAR1000_AGC_H
@@ -7,8 +7,8 @@ RadarSettings::RadarSettings() {

 void RadarSettings::resetToDefaults() {
    system_frequency = 10.0e9;    // 10 GHz
-    chirp_duration_1 = 30.0e-6;   // 30 µs
-    chirp_duration_2 = 0.5e-6;    // 0.5 µs
+    chirp_duration_1 = 30.0e-6;   // 30 �s
+    chirp_duration_2 = 0.5e-6;    // 0.5 �s
    chirps_per_position = 32;
    freq_min = 10.0e6;           // 10 MHz
    freq_max = 30.0e6;           // 30 MHz
@@ -21,8 +21,8 @@ void RadarSettings::resetToDefaults() {
 }

 bool RadarSettings::parseFromUSB(const uint8_t* data, uint32_t length) {
-    // Minimum packet size: "SET" + 8 doubles + 1 uint32_t + "END" = 3 + 8*8 + 4 + 3 = 74 bytes
-    if (data == nullptr || length < 74) {
+    // Minimum packet size: "SET" + 9 doubles + 1 uint32_t + "END" = 3 + 9*8 + 4 + 3 = 82 bytes
+    if (data == nullptr || length < 82) {
        settings_valid = false;
        return false;
    }
@@ -43,6 +43,11 @@ void USBHandler::processStartFlag(const uint8_t* data, uint32_t length) {
    // Start flag: bytes [23, 46, 158, 237]
    const uint8_t START_FLAG[] = {23, 46, 158, 237};
    
+    // Guard: need at least 4 bytes to contain a start flag.
+    // Without this, length - 4 wraps to ~4 billion (uint32_t unsigned underflow)
+    // and the loop reads far past the buffer boundary.
+    if (length < 4) return;
+    
    // Check if start flag is in the received data
    for (uint32_t i = 0; i <= length - 4; i++) {
        if (memcmp(data + i, START_FLAG, 4) == 0) {
@@ -23,6 +23,7 @@
 #include "usbd_cdc_if.h"
 #include "adar1000.h"
 #include "ADAR1000_Manager.h"
+#include "ADAR1000_AGC.h"
 extern "C" {
 #include "ad9523.h"
 }
@@ -45,7 +46,9 @@ extern "C" {
 #include <vector>
 #include "stm32_spi.h"
 #include "stm32_delay.h"
-#include "TinyGPSPlus.h"
+extern "C" {
+#include "um982_gps.h"
+}
 extern "C" {
 #include "GY_85_HAL.h"
 }
@@ -120,8 +123,8 @@ UART_HandleTypeDef huart5;
 UART_HandleTypeDef huart3;

 /* USER CODE BEGIN PV */
-// The TinyGPSPlus object
-TinyGPSPlus gps;
+// UM982 dual-antenna GPS receiver
+UM982_GPS_t um982;

 // Global data structures
 GPS_Data_t current_gps_data = {0};
@@ -172,7 +175,7 @@ float RADAR_Altitude;
 double RADAR_Longitude = 0;
 double RADAR_Latitude = 0;

-extern uint8_t GUI_start_flag_received;
+extern uint8_t GUI_start_flag_received;  // [STM32-006] Legacy, unused -- kept for linker compat


 //RADAR
@@ -224,6 +227,7 @@ extern SPI_HandleTypeDef hspi4;
 //ADAR1000

 ADAR1000Manager adarManager;
+ADAR1000_AGC    outerAgc;
 static uint8_t matrix1[15][16];
 static uint8_t matrix2[15][16];
 static uint8_t vector_0[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
@@ -618,7 +622,8 @@ typedef enum {
    ERROR_POWER_SUPPLY,
    ERROR_TEMPERATURE_HIGH,
    ERROR_MEMORY_ALLOC,
-    ERROR_WATCHDOG_TIMEOUT
+    ERROR_WATCHDOG_TIMEOUT,
+    ERROR_COUNT  // must be last — used for bounds checking error_strings[]
 } SystemError_t;

 static SystemError_t last_error = ERROR_NONE;
@@ -629,19 +634,41 @@ static bool system_emergency_state = false;
 SystemError_t checkSystemHealth(void) {
    SystemError_t current_error = ERROR_NONE;

+    // 0. Watchdog: detect main-loop stall (checkSystemHealth not called for >60 s).
+    //    Timestamp is captured at function ENTRY and updated unconditionally, so
+    //    any early return from a sub-check below cannot leave a stale value that
+    //    would later trip a spurious ERROR_WATCHDOG_TIMEOUT. A dedicated cold-start
+    //    branch ensures the first call after boot never trips (last_health_check==0
+    //    would otherwise make `HAL_GetTick() - 0 > 60000` true forever after the
+    //    60-s mark of the init sequence).
+    static uint32_t last_health_check = 0;
+    uint32_t now_tick = HAL_GetTick();
+    if (last_health_check == 0) {
+        last_health_check = now_tick;          // cold start: seed only
+    } else {
+        uint32_t elapsed = now_tick - last_health_check;
+        last_health_check = now_tick;          // update BEFORE any early return
+        if (elapsed > 60000) {
+            current_error = ERROR_WATCHDOG_TIMEOUT;
+            DIAG_ERR("SYS", "Health check: Watchdog timeout (>60s since last check)");
+            return current_error;
+        }
+    }
+
    // 1. Check AD9523 Clock Generator
    static uint32_t last_clock_check = 0;
-    if (HAL_GetTick() - last_clock_check > 5000) {
-        GPIO_PinState s0 = HAL_GPIO_ReadPin(AD9523_STATUS0_GPIO_Port, AD9523_STATUS0_Pin);
-        GPIO_PinState s1 = HAL_GPIO_ReadPin(AD9523_STATUS1_GPIO_Port, AD9523_STATUS1_Pin);
-        DIAG_GPIO("CLK", "AD9523 STATUS0", s0);
-        DIAG_GPIO("CLK", "AD9523 STATUS1", s1);
-        if (s0 == GPIO_PIN_RESET || s1 == GPIO_PIN_RESET) {
-            current_error = ERROR_AD9523_CLOCK;
-            DIAG_ERR("CLK", "AD9523 clock health check FAILED (STATUS0=%d STATUS1=%d)", s0, s1);
-        }
-        last_clock_check = HAL_GetTick();
-    }
+    if (HAL_GetTick() - last_clock_check > 5000) {
+        GPIO_PinState s0 = HAL_GPIO_ReadPin(AD9523_STATUS0_GPIO_Port, AD9523_STATUS0_Pin);
+        GPIO_PinState s1 = HAL_GPIO_ReadPin(AD9523_STATUS1_GPIO_Port, AD9523_STATUS1_Pin);
+        DIAG_GPIO("CLK", "AD9523 STATUS0", s0);
+        DIAG_GPIO("CLK", "AD9523 STATUS1", s1);
+        if (s0 == GPIO_PIN_RESET || s1 == GPIO_PIN_RESET) {
+            current_error = ERROR_AD9523_CLOCK;
+            DIAG_ERR("CLK", "AD9523 clock health check FAILED (STATUS0=%d STATUS1=%d)", s0, s1);
+            return current_error;
+        }
+        last_clock_check = HAL_GetTick();
+    }

    // 2. Check ADF4382 Lock Status
    bool tx_locked, rx_locked;
@@ -649,10 +676,12 @@ SystemError_t checkSystemHealth(void) {
        if (!tx_locked) {
            current_error = ERROR_ADF4382_TX_UNLOCK;
            DIAG_ERR("LO", "Health check: TX LO UNLOCKED");
+            return current_error;
        }
        if (!rx_locked) {
            current_error = ERROR_ADF4382_RX_UNLOCK;
            DIAG_ERR("LO", "Health check: RX LO UNLOCKED");
+            return current_error;
        }
    }

@@ -661,47 +690,47 @@ SystemError_t checkSystemHealth(void) {
        if (!adarManager.verifyDeviceCommunication(i)) {
            current_error = ERROR_ADAR1000_COMM;
            DIAG_ERR("BF", "Health check: ADAR1000 #%d comm FAILED", i);
-            break;
+            return current_error;
        }

        float temp = adarManager.readTemperature(i);
        if (temp > 85.0f) {
            current_error = ERROR_ADAR1000_TEMP;
            DIAG_ERR("BF", "Health check: ADAR1000 #%d OVERTEMP %.1fC > 85C", i, temp);
-            break;
+            return current_error;
        }
    }

    // 4. Check IMU Communication
    static uint32_t last_imu_check = 0;
-    if (HAL_GetTick() - last_imu_check > 10000) {
-        if (!GY85_Update(&imu)) {
-            current_error = ERROR_IMU_COMM;
-            DIAG_ERR("IMU", "Health check: GY85_Update() FAILED");
-        }
-        last_imu_check = HAL_GetTick();
-    }
+    if (HAL_GetTick() - last_imu_check > 10000) {
+        if (!GY85_Update(&imu)) {
+            current_error = ERROR_IMU_COMM;
+            DIAG_ERR("IMU", "Health check: GY85_Update() FAILED");
+            return current_error;
+        }
+        last_imu_check = HAL_GetTick();
+    }

    // 5. Check BMP180 Communication
    static uint32_t last_bmp_check = 0;
-    if (HAL_GetTick() - last_bmp_check > 15000) {
-        double pressure = myBMP.getPressure();
-        if (pressure < 30000.0 || pressure > 110000.0 || isnan(pressure)) {
-            current_error = ERROR_BMP180_COMM;
-            DIAG_ERR("SYS", "Health check: BMP180 pressure out of range: %.0f", pressure);
-        }
-        last_bmp_check = HAL_GetTick();
-    }
+    if (HAL_GetTick() - last_bmp_check > 15000) {
+        double pressure = myBMP.getPressure();
+        if (pressure < 30000.0 || pressure > 110000.0 || isnan(pressure)) {
+            current_error = ERROR_BMP180_COMM;
+            DIAG_ERR("SYS", "Health check: BMP180 pressure out of range: %.0f", pressure);
+            return current_error;
+        }
+        last_bmp_check = HAL_GetTick();
+    }

-    // 6. Check GPS Communication
-    static uint32_t last_gps_fix = 0;
-    if (gps.location.isUpdated()) {
-        last_gps_fix = HAL_GetTick();
-    }
-    if (HAL_GetTick() - last_gps_fix > 30000) {
-        current_error = ERROR_GPS_COMM;
-        DIAG_WARN("SYS", "Health check: GPS no fix for >30s");
-    }
+    // 6. Check GPS Communication (30s grace period from boot / last valid fix)
+    uint32_t gps_fix_age = um982_position_age(&um982);
+    if (gps_fix_age > 30000) {
+        current_error = ERROR_GPS_COMM;
+        DIAG_WARN("SYS", "Health check: GPS no fix for >30s (age=%lu ms)", (unsigned long)gps_fix_age);
+        return current_error;
+    }

    // 7. Check RF Power Amplifier Current
    if (PowerAmplifier) {
@@ -709,12 +738,12 @@ SystemError_t checkSystemHealth(void) {
            if (Idq_reading[i] > 2.5f) {
                current_error = ERROR_RF_PA_OVERCURRENT;
                DIAG_ERR("PA", "Health check: PA ch%d OVERCURRENT Idq=%.3fA > 2.5A", i, Idq_reading[i]);
-                break;
+                return current_error;
            }
            if (Idq_reading[i] < 0.1f) {
                current_error = ERROR_RF_PA_BIAS;
                DIAG_ERR("PA", "Health check: PA ch%d BIAS FAULT Idq=%.3fA < 0.1A", i, Idq_reading[i]);
-                break;
+                return current_error;
            }
        }
    }
@@ -723,15 +752,10 @@ SystemError_t checkSystemHealth(void) {
    if (temperature > 75.0f) {
        current_error = ERROR_TEMPERATURE_HIGH;
        DIAG_ERR("SYS", "Health check: System OVERTEMP %.1fC > 75C", temperature);
+        return current_error;
    }

-    // 9. Simple watchdog check
-    static uint32_t last_health_check = 0;
-    if (HAL_GetTick() - last_health_check > 60000) {
-        current_error = ERROR_WATCHDOG_TIMEOUT;
-        DIAG_ERR("SYS", "Health check: Watchdog timeout (>60s since last check)");
-    }
-    last_health_check = HAL_GetTick();
+    // 9. Watchdog check is performed at function entry (see step 0).

    if (current_error != ERROR_NONE) {
        DIAG_ERR("SYS", "checkSystemHealth returning error code %d", current_error);
@@ -843,7 +867,7 @@ void handleSystemError(SystemError_t error) {
    DIAG_ERR("SYS", "handleSystemError: error=%d error_count=%lu", error, error_count);

    char error_msg[100];
-    const char* error_strings[] = {
+    static const char* const error_strings[] = {
        "No error",
        "AD9523 Clock failure",
        "ADF4382 TX LO unlocked",
@@ -863,9 +887,16 @@ void handleSystemError(SystemError_t error) {
        "Watchdog timeout"
    };

+    static_assert(sizeof(error_strings) / sizeof(error_strings[0]) == ERROR_COUNT,
+                  "error_strings[] and SystemError_t enum are out of sync");
+
+    const char* err_name = (error >= 0 && error < (int)(sizeof(error_strings) / sizeof(error_strings[0])))
+                           ? error_strings[error]
+                           : "Unknown error";
+
    snprintf(error_msg, sizeof(error_msg),
             "ERROR #%d: %s (Count: %lu)\r\n",
-             error, error_strings[error], error_count);
+             error, err_name, error_count);
    HAL_UART_Transmit(&huart3, (uint8_t*)error_msg, strlen(error_msg), 1000);

    // Blink LED pattern based on error code
@@ -875,9 +906,23 @@ void handleSystemError(SystemError_t error) {
        HAL_Delay(200);
    }

-    // Critical errors trigger emergency shutdown
-    if (error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) {
-        DIAG_ERR("SYS", "CRITICAL ERROR (code %d: %s) -- initiating Emergency_Stop()", error, error_strings[error]);
+    // Critical errors trigger emergency shutdown.
+    //
+    // Safety-critical range: any fault that can damage the PAs or leave the
+    // system in an undefined state must cut the RF rails via Emergency_Stop().
+    // This covers:
+    //   ERROR_RF_PA_OVERCURRENT .. ERROR_POWER_SUPPLY (9..13) -- PA/supply faults
+    //   ERROR_TEMPERATURE_HIGH  (14) -- >75 C on the PA thermal sensors;
+    //                                  without cutting bias + 5V/5V5/RFPA rails
+    //                                  the GaN QPA2962 stage can thermal-runaway.
+    //   ERROR_WATCHDOG_TIMEOUT  (16) -- health-check loop has stalled (>60 s);
+    //                                  transmitter state is unknown, safest to
+    //                                  latch Emergency_Stop rather than rely on
+    //                                  IWDG reset (which re-energises the rails).
+    if ((error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) ||
+        error == ERROR_TEMPERATURE_HIGH ||
+        error == ERROR_WATCHDOG_TIMEOUT) {
+        DIAG_ERR("SYS", "CRITICAL ERROR (code %d: %s) -- initiating Emergency_Stop()", error, err_name);
        snprintf(error_msg, sizeof(error_msg),
                 "CRITICAL ERROR! Initiating emergency shutdown.\r\n");
        HAL_UART_Transmit(&huart3, (uint8_t*)error_msg, strlen(error_msg), 1000);
@@ -919,38 +964,41 @@ bool checkSystemHealthStatus(void) {
 // Get system status for GUI
 // Get system status for GUI with 8 temperature variables
 void getSystemStatusForGUI(char* status_buffer, size_t buffer_size) {
-    char temp_buffer[200];
-    char final_status[500] = "System Status: ";
+    // Build status string directly in the output buffer using offset-tracked
+    // snprintf.  Each call returns the number of chars written (excluding NUL),
+    // so we advance 'off' and shrink 'rem' to guarantee we never overflow.
+    size_t off = 0;
+    size_t rem = buffer_size;
+    int w;

    // Basic status
    if (system_emergency_state) {
-        strcat(final_status, "EMERGENCY_STOP|");
+        w = snprintf(status_buffer + off, rem, "System Status: EMERGENCY_STOP|");
    } else {
-        strcat(final_status, "NORMAL|");
+        w = snprintf(status_buffer + off, rem, "System Status: NORMAL|");
    }
+    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

    // Error information
-    snprintf(temp_buffer, sizeof(temp_buffer), "LastError:%d|ErrorCount:%lu|",
-             last_error, error_count);
-    strcat(final_status, temp_buffer);
+    w = snprintf(status_buffer + off, rem, "LastError:%d|ErrorCount:%lu|",
+                 last_error, error_count);
+    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

    // Sensor status
-    snprintf(temp_buffer, sizeof(temp_buffer), "IMU:%.1f,%.1f,%.1f|GPS:%.6f,%.6f|ALT:%.1f|",
-             Pitch_Sensor, Roll_Sensor, Yaw_Sensor,
-             RADAR_Latitude, RADAR_Longitude, RADAR_Altitude);
-    strcat(final_status, temp_buffer);
+    w = snprintf(status_buffer + off, rem, "IMU:%.1f,%.1f,%.1f|GPS:%.6f,%.6f|ALT:%.1f|",
+                 Pitch_Sensor, Roll_Sensor, Yaw_Sensor,
+                 RADAR_Latitude, RADAR_Longitude, RADAR_Altitude);
+    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

    // LO Status
    bool tx_locked, rx_locked;
    ADF4382A_CheckLockStatus(&lo_manager, &tx_locked, &rx_locked);
-    snprintf(temp_buffer, sizeof(temp_buffer), "LO_TX:%s|LO_RX:%s|",
-             tx_locked ? "LOCKED" : "UNLOCKED",
-             rx_locked ? "LOCKED" : "UNLOCKED");
-    strcat(final_status, temp_buffer);
+    w = snprintf(status_buffer + off, rem, "LO_TX:%s|LO_RX:%s|",
+                 tx_locked ? "LOCKED" : "UNLOCKED",
+                 rx_locked ? "LOCKED" : "UNLOCKED");
+    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

    // Temperature readings (8 variables)
-    // You'll need to populate these temperature values from your sensors
-    // For now, I'll show how to format them - replace with actual temperature readings
    Temperature_1 = ADS7830_Measure_SingleEnded(&hadc3, 0);
    Temperature_2 = ADS7830_Measure_SingleEnded(&hadc3, 1);
    Temperature_3 = ADS7830_Measure_SingleEnded(&hadc3, 2);
@@ -961,11 +1009,11 @@ void getSystemStatusForGUI(char* status_buffer, size_t buffer_size) {
    Temperature_8 = ADS7830_Measure_SingleEnded(&hadc3, 7);

    // Format all 8 temperature variables
-    snprintf(temp_buffer, sizeof(temp_buffer),
-             "T1:%.1f|T2:%.1f|T3:%.1f|T4:%.1f|T5:%.1f|T6:%.1f|T7:%.1f|T8:%.1f|",
-             Temperature_1, Temperature_2, Temperature_3, Temperature_4,
-             Temperature_5, Temperature_6, Temperature_7, Temperature_8);
-    strcat(final_status, temp_buffer);
+    w = snprintf(status_buffer + off, rem,
+                 "T1:%.1f|T2:%.1f|T3:%.1f|T4:%.1f|T5:%.1f|T6:%.1f|T7:%.1f|T8:%.1f|",
+                 Temperature_1, Temperature_2, Temperature_3, Temperature_4,
+                 Temperature_5, Temperature_6, Temperature_7, Temperature_8);
+    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

    // RF Power Amplifier status (if enabled)
    if (PowerAmplifier) {
@@ -975,18 +1023,17 @@ void getSystemStatusForGUI(char* status_buffer, size_t buffer_size) {
        }
        avg_current /= 16.0f;

-        snprintf(temp_buffer, sizeof(temp_buffer), "PA_AvgCurrent:%.2f|PA_Enabled:%d|",
-                 avg_current, PowerAmplifier);
-        strcat(final_status, temp_buffer);
+        w = snprintf(status_buffer + off, rem, "PA_AvgCurrent:%.2f|PA_Enabled:%d|",
+                     avg_current, PowerAmplifier);
+        if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
    }

    // Radar operation status
-    snprintf(temp_buffer, sizeof(temp_buffer), "BeamPos:%d|Azimuth:%d|ChirpCount:%d|",
-             n, y, m);
-    strcat(final_status, temp_buffer);
+    w = snprintf(status_buffer + off, rem, "BeamPos:%d|Azimuth:%d|ChirpCount:%d|",
+                 n, y, m);
+    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

-    // Copy to output buffer
-    strncpy(status_buffer, final_status, buffer_size - 1);
+    // NUL termination guaranteed by snprintf, but be safe
    status_buffer[buffer_size - 1] = '\0';
 }

@@ -1008,20 +1055,7 @@ static inline void delay_ms(uint32_t ms) { HAL_Delay(ms); }



-// This custom version of delay() ensures that the gps object
-// is being "fed".
-static void smartDelay(unsigned long ms)
-{
-    uint32_t start = HAL_GetTick();
-    uint8_t ch;
-
-    do {
-        // While there is new data available in UART (non-blocking)
-        if (HAL_UART_Receive(&huart5, &ch, 1, 0) == HAL_OK) {
-            gps.encode(ch);   // Pass received byte to TinyGPS++ equivalent parser
-        }
-    } while (HAL_GetTick() - start < ms);
-}
+// smartDelay removed -- replaced by non-blocking um982_process() in main loop

 // Small helper to enable DWT cycle counter for microdelay
 static void DWT_Init(void)
@@ -1165,7 +1199,14 @@ static int configure_ad9523(void)

    // init ad9523 defaults (fills any missing pdata defaults)
    DIAG("CLK", "Calling ad9523_init() -- fills pdata defaults");
-    ad9523_init(&init_param);
+    {
+        int32_t init_ret = ad9523_init(&init_param);
+        DIAG("CLK", "ad9523_init() returned %ld", (long)init_ret);
+        if (init_ret != 0) {
+            DIAG_ERR("CLK", "ad9523_init() FAILED (ret=%ld)", (long)init_ret);
+            return -1;
+        }
+    }

    /* [Bug #2 FIXED] Removed first ad9523_setup() call that was here.
     * It wrote to the chip while still in reset — writes were lost.
@@ -1554,6 +1595,12 @@ int main(void)
    Yaw_Sensor = (180*atan2(magRawY,magRawX)/PI) - Mag_Declination;

    if(Yaw_Sensor<0)Yaw_Sensor+=360;
+
+    // Override magnetometer heading with UM982 dual-antenna heading when available
+    if (um982_is_heading_valid(&um982)) {
+        Yaw_Sensor = um982_get_heading(&um982);
+    }
+
    RxEst_0 = RxEst_1;
    RyEst_0 = RyEst_1;
    RzEst_0 = RzEst_1;
@@ -1729,14 +1776,38 @@ int main(void)
  	//////////////////////////////////////////////////////////////////////////////////////
    //////////////////////////////////////////GPS/////////////////////////////////////////
    //////////////////////////////////////////////////////////////////////////////////////
-  for(int i=0; i<10;i++){
-  smartDelay(1000);
-  RADAR_Longitude = gps.location.lng();
-  RADAR_Latitude = gps.location.lat();
+  DIAG_SECTION("GPS INIT (UM982)");
+  DIAG("GPS", "Initializing UM982 on UART5 @ 115200 (baseline=50cm, tol=3cm)");
+  if (!um982_init(&um982, &huart5, 50.0f, 3.0f)) {
+      DIAG_WARN("GPS", "UM982 init: no VERSIONA response -- module may need more time");
+      // Not fatal: module may still start sending NMEA data after boot
+  } else {
+      DIAG("GPS", "UM982 init OK -- VERSIONA received");
  }

-  //move Stepper to position 1 = 0°
-  HAL_GPIO_WritePin(STEPPER_CW_P_GPIO_Port, STEPPER_CW_P_Pin, GPIO_PIN_RESET);//Set stepper motor spinning direction to CCW
+  // Collect GPS data for a few seconds (non-blocking pump)
+  DIAG("GPS", "Pumping GPS for 5 seconds to acquire initial fix...");
+  {
+      uint32_t gps_start = HAL_GetTick();
+      while (HAL_GetTick() - gps_start < 5000) {
+          um982_process(&um982);
+          HAL_Delay(10);
+      }
+  }
+  RADAR_Longitude = um982_get_longitude(&um982);
+  RADAR_Latitude = um982_get_latitude(&um982);
+  DIAG("GPS", "Initial position: lat=%.6f lon=%.6f fix=%d sats=%d",
+       RADAR_Latitude, RADAR_Longitude,
+       um982_get_fix_quality(&um982), um982_get_num_sats(&um982));
+
+  // Re-apply heading after GPS init so the north-alignment stepper move uses
+  // UM982 dual-antenna heading when available.
+  if (um982_is_heading_valid(&um982)) {
+      Yaw_Sensor = um982_get_heading(&um982);
+  }
+
+  //move Stepper to position 1 = 0°
+  HAL_GPIO_WritePin(STEPPER_CW_P_GPIO_Port, STEPPER_CW_P_Pin, GPIO_PIN_RESET);//Set stepper motor spinning direction to CCW
  //Point Stepper to North
  for(int i= 0;i<(int)(Yaw_Sensor*Stepper_steps/360);i++){
 	  HAL_GPIO_WritePin(STEPPER_CLK_P_GPIO_Port, STEPPER_CLK_P_Pin, GPIO_PIN_SET);
@@ -1758,29 +1829,11 @@ int main(void)
      HAL_UART_Transmit(&huart3, (uint8_t*)gps_send_error, sizeof(gps_send_error) - 1, 1000);
  }

-  // Check if start flag was received and settings are ready
-  do{
-	  if (usbHandler.isStartFlagReceived() &&
-		  usbHandler.getState() == USBHandler::USBState::READY_FOR_DATA) {
-
-		  const RadarSettings& settings = usbHandler.getSettings();
-
-		  // Use the settings to configure your radar system
-		  /*
-			  settings.getSystemFrequency();
-			  settings.getChirpDuration1();
-			  settings.getChirpDuration2();
-			  settings.getChirpsPerPosition();
-			  settings.getFreqMin();
-			  settings.getFreqMax();
-			  settings.getPRF1();
-			  settings.getPRF2();
-			  settings.getMaxDistance();
-			  */
-
-
-              }
-  }while(!usbHandler.isStartFlagReceived());
+  /* [STM32-006 FIXED] Removed blocking do-while loop that waited for
+   * usbHandler.isStartFlagReceived().  The production V7 PyQt GUI does not
+   * send the legacy 4-byte start flag [23,46,158,237], so this loop hung
+   * the MCU at boot indefinitely.  The USB settings handshake (if ever
+   * re-enabled) should be handled non-blocking in the main loop. */

  /***************************************************************/
  /************RF Power Amplifier Powering up sequence************/
@@ -1995,15 +2048,28 @@ int main(void)
 	        HAL_UART_Transmit(&huart3, (uint8_t*)emergency_msg, strlen(emergency_msg), 1000);
 	        DIAG_ERR("SYS", "SAFE MODE ACTIVE -- blinking all LEDs, waiting for system_emergency_state clear");

-	        // Blink all LEDs to indicate safe mode
+	        // Blink all LEDs to indicate safe mode (500ms period, visible to operator)
 	        while (system_emergency_state) {
 	            HAL_GPIO_TogglePin(LED_1_GPIO_Port, LED_1_Pin);
 	            HAL_GPIO_TogglePin(LED_2_GPIO_Port, LED_2_Pin);
 	            HAL_GPIO_TogglePin(LED_3_GPIO_Port, LED_3_Pin);
 	            HAL_GPIO_TogglePin(LED_4_GPIO_Port, LED_4_Pin);
+	            HAL_Delay(250);
 	        }
 	        DIAG("SYS", "Exited safe mode blink loop -- system_emergency_state cleared");
 	    }
+
+	  //////////////////////////////////////////////////////////////////////////////////////
+	  ////////////////////////// GPS: Non-blocking NMEA processing ////////////////////////
+	  //////////////////////////////////////////////////////////////////////////////////////
+	  um982_process(&um982);
+
+	  // Update position globals continuously
+	  if (um982_is_position_valid(&um982)) {
+	      RADAR_Latitude = um982_get_latitude(&um982);
+	      RADAR_Longitude = um982_get_longitude(&um982);
+	  }
+
 	  //////////////////////////////////////////////////////////////////////////////////////
 	  ////////////////////////// Monitor ADF4382A lock status periodically//////////////////
 	  //////////////////////////////////////////////////////////////////////////////////////
@@ -2114,6 +2180,31 @@ int main(void)

      runRadarPulseSequence();

+      /* [AGC] Outer-loop AGC: sync enable from FPGA via DIG_6 (PD14),
+       * then read saturation flag (DIG_5 / PD13) and adjust ADAR1000 VGA
+       * common gain once per radar frame (~258 ms).
+       * FPGA register host_agc_enable is the single source of truth —
+       * DIG_6 propagates it to MCU every frame.
+       * 2-frame confirmation debounce: only change outerAgc.enabled when
+       * two consecutive frames read the same DIG_6 value. Prevents a
+       * single-sample glitch from causing a spurious AGC state transition.
+       * Added latency: 1 extra frame (~258 ms), acceptable for control plane. */
+      {
+          bool dig6_now = (HAL_GPIO_ReadPin(FPGA_DIG6_GPIO_Port,
+                                            FPGA_DIG6_Pin) == GPIO_PIN_SET);
+          static bool dig6_prev = false;  // matches boot default (AGC off)
+          if (dig6_now == dig6_prev) {
+              outerAgc.enabled = dig6_now;
+          }
+          dig6_prev = dig6_now;
+      }
+      if (outerAgc.enabled) {
+          bool sat = HAL_GPIO_ReadPin(FPGA_DIG5_SAT_GPIO_Port,
+                                      FPGA_DIG5_SAT_Pin) == GPIO_PIN_SET;
+          outerAgc.update(sat);
+          outerAgc.applyGain(adarManager);
+      }
+
      /* [GAP-3 FIX 2] Kick hardware watchdog — if we don't reach here within
       * ~4 s, the IWDG resets the MCU automatically. */
      HAL_IWDG_Refresh(&hiwdg);
@@ -2544,7 +2635,7 @@ static void MX_UART5_Init(void)

  /* USER CODE END UART5_Init 1 */
  huart5.Instance = UART5;
-  huart5.Init.BaudRate = 9600;
+  huart5.Init.BaudRate = 115200;
  huart5.Init.WordLength = UART_WORDLENGTH_8B;
  huart5.Init.StopBits = UART_STOPBITS_1;
  huart5.Init.Parity = UART_PARITY_NONE;
@@ -141,6 +141,15 @@ void Error_Handler(void);
 #define EN_DIS_RFPA_VDD_GPIO_Port GPIOD
 #define EN_DIS_COOLING_Pin GPIO_PIN_7
 #define EN_DIS_COOLING_GPIO_Port GPIOD
+
+/* FPGA digital I/O (directly connected GPIOs) */
+#define FPGA_DIG5_SAT_Pin       GPIO_PIN_13
+#define FPGA_DIG5_SAT_GPIO_Port GPIOD
+#define FPGA_DIG6_Pin           GPIO_PIN_14
+#define FPGA_DIG6_GPIO_Port     GPIOD
+#define FPGA_DIG7_Pin           GPIO_PIN_15
+#define FPGA_DIG7_GPIO_Port     GPIOD
+
 #define ADF4382_RX_CE_Pin GPIO_PIN_9
 #define ADF4382_RX_CE_GPIO_Port GPIOG
 #define ADF4382_RX_CS_Pin GPIO_PIN_10
@@ -0,0 +1,586 @@
+/*******************************************************************************
+ * um982_gps.c -- UM982 dual-antenna GNSS receiver driver implementation
+ *
+ * See um982_gps.h for API documentation.
+ * Command syntax per Unicore N4 Command Reference EN R1.14.
+ ******************************************************************************/
+#include "um982_gps.h"
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+/* ========================= Internal helpers ========================== */
+
+/**
+ * Advance to the next comma-delimited field in an NMEA sentence.
+ * Returns pointer to the start of the next field (after the comma),
+ * or NULL if no more commas found before end-of-string or '*'.
+ *
+ * Handles empty fields (consecutive commas) correctly by returning
+ * a pointer to the character after the comma (which may be another comma).
+ */
+static const char *next_field(const char *p)
+{
+    if (p == NULL) return NULL;
+    while (*p != '\0' && *p != ',' && *p != '*') {
+        p++;
+    }
+    if (*p == ',') return p + 1;
+    return NULL;  /* End of sentence or checksum marker */
+}
+
+/**
+ * Get the length of the current field (up to next comma, '*', or '\0').
+ */
+static int field_len(const char *p)
+{
+    int len = 0;
+    if (p == NULL) return 0;
+    while (p[len] != '\0' && p[len] != ',' && p[len] != '*') {
+        len++;
+    }
+    return len;
+}
+
+/**
+ * Check if a field is non-empty (has at least one character before delimiter).
+ */
+static bool field_valid(const char *p)
+{
+    return p != NULL && field_len(p) > 0;
+}
+
+/**
+ * Parse a floating-point value from a field, returning 0.0 if empty.
+ */
+static double field_to_double(const char *p)
+{
+    if (!field_valid(p)) return 0.0;
+    return strtod(p, NULL);
+}
+
+static float field_to_float(const char *p)
+{
+    return (float)field_to_double(p);
+}
+
+static int field_to_int(const char *p)
+{
+    if (!field_valid(p)) return 0;
+    return (int)strtol(p, NULL, 10);
+}
+
+/* ========================= Checksum ================================== */
+
+bool um982_verify_checksum(const char *sentence)
+{
+    if (sentence == NULL || sentence[0] != '$') return false;
+
+    const char *p = sentence + 1;  /* Skip '$' */
+    uint8_t computed = 0;
+
+    while (*p != '\0' && *p != '*') {
+        computed ^= (uint8_t)*p;
+        p++;
+    }
+
+    if (*p != '*') return false;  /* No checksum marker found */
+    p++;  /* Skip '*' */
+
+    /* Parse 2-char hex checksum */
+    if (p[0] == '\0' || p[1] == '\0') return false;
+
+    char hex_str[3] = { p[0], p[1], '\0' };
+    unsigned long expected = strtoul(hex_str, NULL, 16);
+
+    return computed == (uint8_t)expected;
+}
+
+/* ========================= Coordinate parsing ======================== */
+
+double um982_parse_coord(const char *field, char hemisphere)
+{
+    if (field == NULL || field[0] == '\0') return NAN;
+
+    /* Find the decimal point to determine degree digit count.
+     * Latitude:  ddmm.mmmm  (dot at index 4, degrees = 2)
+     * Longitude: dddmm.mmmm (dot at index 5, degrees = 3)
+     * General:   degree_digits = dot_position - 2
+     */
+    const char *dot = strchr(field, '.');
+    if (dot == NULL) return NAN;
+
+    int dot_pos = (int)(dot - field);
+    int deg_digits = dot_pos - 2;
+
+    if (deg_digits < 1 || deg_digits > 3) return NAN;
+
+    /* Extract degree portion */
+    double degrees = 0.0;
+    for (int i = 0; i < deg_digits; i++) {
+        if (field[i] < '0' || field[i] > '9') return NAN;
+        degrees = degrees * 10.0 + (field[i] - '0');
+    }
+
+    /* Extract minutes portion (everything from deg_digits onward) */
+    double minutes = strtod(field + deg_digits, NULL);
+    if (minutes < 0.0 || minutes >= 60.0) return NAN;
+
+    double result = degrees + minutes / 60.0;
+
+    /* Apply hemisphere sign */
+    if (hemisphere == 'S' || hemisphere == 'W') {
+        result = -result;
+    }
+
+    return result;
+}
+
+/* ========================= Sentence parsers ========================== */
+
+/**
+ * Identify the NMEA sentence type by skipping the 2-char talker ID
+ * and comparing the 3-letter formatter.
+ *
+ * "$GNGGA,..." -> talker="GN", formatter="GGA"
+ * "$GPTHS,..." -> talker="GP", formatter="THS"
+ *
+ * Returns pointer to the formatter (3 chars at sentence+3), or NULL
+ * if sentence is too short.
+ */
+static const char *get_formatter(const char *sentence)
+{
+    /* sentence starts with '$', followed by 2-char talker + 3-char formatter */
+    if (sentence == NULL || strlen(sentence) < 6) return NULL;
+    return sentence + 3;  /* Skip "$XX" -> points to formatter */
+}
+
+/**
+ * Parse GGA sentence — position and fix quality.
+ *
+ * Format: $--GGA,time,lat,N/S,lon,E/W,quality,numSat,hdop,alt,M,geoidSep,M,dgpsAge,refID*XX
+ *         field:  1    2   3    4   5     6      7     8    9 10    11    12   13     14
+ */
+static void parse_gga(UM982_GPS_t *gps, const char *sentence)
+{
+    /* Skip to first field (after "$XXGGA,") */
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (time) */
+
+    /* Field 1: UTC time — skip for now */
+    const char *f2 = next_field(f);   /* lat */
+    const char *f3 = next_field(f2);  /* N/S */
+    const char *f4 = next_field(f3);  /* lon */
+    const char *f5 = next_field(f4);  /* E/W */
+    const char *f6 = next_field(f5);  /* quality */
+    const char *f7 = next_field(f6);  /* numSat */
+    const char *f8 = next_field(f7);  /* hdop */
+    const char *f9 = next_field(f8);  /* altitude */
+    const char *f10 = next_field(f9); /* M */
+    const char *f11 = next_field(f10); /* geoid sep */
+
+    uint32_t now = HAL_GetTick();
+
+    /* Parse fix quality first — if 0, position is meaningless */
+    gps->fix_quality = (uint8_t)field_to_int(f6);
+
+    /* Parse coordinates */
+    if (field_valid(f2) && field_valid(f3)) {
+        char hem = field_valid(f3) ? *f3 : 'N';
+        double lat = um982_parse_coord(f2, hem);
+        if (!isnan(lat)) gps->latitude = lat;
+    }
+
+    if (field_valid(f4) && field_valid(f5)) {
+        char hem = field_valid(f5) ? *f5 : 'E';
+        double lon = um982_parse_coord(f4, hem);
+        if (!isnan(lon)) gps->longitude = lon;
+    }
+
+    /* Number of satellites */
+    gps->num_satellites = (uint8_t)field_to_int(f7);
+
+    /* HDOP */
+    if (field_valid(f8)) {
+        gps->hdop = field_to_float(f8);
+    }
+
+    /* Altitude */
+    if (field_valid(f9)) {
+        gps->altitude = field_to_float(f9);
+    }
+
+    /* Geoid separation */
+    if (field_valid(f11)) {
+        gps->geoid_sep = field_to_float(f11);
+    }
+
+    gps->last_gga_tick = now;
+    if (gps->fix_quality != UM982_FIX_NONE) {
+        gps->last_fix_tick = now;
+    }
+}
+
+/**
+ * Parse RMC sentence — recommended minimum (position, speed, date).
+ *
+ * Format: $--RMC,time,status,lat,N/S,lon,E/W,speed,course,date,magVar,E/W,mode*XX
+ *         field:  1     2      3   4   5   6    7      8     9    10    11   12
+ */
+static void parse_rmc(UM982_GPS_t *gps, const char *sentence)
+{
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (time) */
+
+    const char *f2 = next_field(f);   /* status */
+    const char *f3 = next_field(f2);  /* lat */
+    const char *f4 = next_field(f3);  /* N/S */
+    const char *f5 = next_field(f4);  /* lon */
+    const char *f6 = next_field(f5);  /* E/W */
+    const char *f7 = next_field(f6);  /* speed knots */
+    const char *f8 = next_field(f7);  /* course true */
+
+    /* Status */
+    if (field_valid(f2)) {
+        gps->rmc_status = *f2;
+    }
+
+    /* Position (only if status = A for valid) */
+    if (field_valid(f2) && *f2 == 'A') {
+        if (field_valid(f3) && field_valid(f4)) {
+            double lat = um982_parse_coord(f3, *f4);
+            if (!isnan(lat)) gps->latitude = lat;
+        }
+        if (field_valid(f5) && field_valid(f6)) {
+            double lon = um982_parse_coord(f5, *f6);
+            if (!isnan(lon)) gps->longitude = lon;
+        }
+    }
+
+    /* Speed (knots) */
+    if (field_valid(f7)) {
+        gps->speed_knots = field_to_float(f7);
+    }
+
+    /* Course */
+    if (field_valid(f8)) {
+        gps->course_true = field_to_float(f8);
+    }
+
+    gps->last_rmc_tick = HAL_GetTick();
+}
+
+/**
+ * Parse THS sentence — true heading and status (UM982-specific).
+ *
+ * Format: $--THS,heading,mode*XX
+ *         field:    1      2
+ */
+static void parse_ths(UM982_GPS_t *gps, const char *sentence)
+{
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (heading) */
+
+    const char *f2 = next_field(f);  /* mode */
+
+    /* Heading */
+    if (field_valid(f)) {
+        gps->heading = field_to_float(f);
+    } else {
+        gps->heading = NAN;
+    }
+
+    /* Mode */
+    if (field_valid(f2)) {
+        gps->heading_mode = *f2;
+    } else {
+        gps->heading_mode = 'V';  /* Not valid if missing */
+    }
+
+    gps->last_ths_tick = HAL_GetTick();
+}
+
+/**
+ * Parse VTG sentence — course and speed over ground.
+ *
+ * Format: $--VTG,courseTrue,T,courseMag,M,speedKnots,N,speedKmh,K,mode*XX
+ *         field:     1      2     3      4     5      6    7     8   9
+ */
+static void parse_vtg(UM982_GPS_t *gps, const char *sentence)
+{
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (course true) */
+
+    const char *f2 = next_field(f);   /* T */
+    const char *f3 = next_field(f2);  /* course mag */
+    const char *f4 = next_field(f3);  /* M */
+    const char *f5 = next_field(f4);  /* speed knots */
+    const char *f6 = next_field(f5);  /* N */
+    const char *f7 = next_field(f6);  /* speed km/h */
+
+    /* Course true */
+    if (field_valid(f)) {
+        gps->course_true = field_to_float(f);
+    }
+
+    /* Speed knots */
+    if (field_valid(f5)) {
+        gps->speed_knots = field_to_float(f5);
+    }
+
+    /* Speed km/h */
+    if (field_valid(f7)) {
+        gps->speed_kmh = field_to_float(f7);
+    }
+
+    gps->last_vtg_tick = HAL_GetTick();
+}
+
+/* ========================= Sentence dispatch ========================= */
+
+void um982_parse_sentence(UM982_GPS_t *gps, const char *sentence)
+{
+    if (sentence == NULL || sentence[0] != '$') return;
+
+    /* Verify checksum before parsing */
+    if (!um982_verify_checksum(sentence)) return;
+
+    /* Check for VERSIONA response (starts with '#', not '$') -- handled separately */
+    /* Actually VERSIONA starts with '#', so it won't enter here. We check in feed(). */
+
+    /* Identify sentence type */
+    const char *fmt = get_formatter(sentence);
+    if (fmt == NULL) return;
+
+    if (strncmp(fmt, "GGA", 3) == 0) {
+        gps->initialized = true;
+        parse_gga(gps, sentence);
+    } else if (strncmp(fmt, "RMC", 3) == 0) {
+        gps->initialized = true;
+        parse_rmc(gps, sentence);
+    } else if (strncmp(fmt, "THS", 3) == 0) {
+        gps->initialized = true;
+        parse_ths(gps, sentence);
+    } else if (strncmp(fmt, "VTG", 3) == 0) {
+        gps->initialized = true;
+        parse_vtg(gps, sentence);
+    }
+    /* Other sentences silently ignored */
+}
+
+/* ========================= Command interface ========================= */
+
+bool um982_send_command(UM982_GPS_t *gps, const char *cmd)
+{
+    if (gps == NULL || gps->huart == NULL || cmd == NULL) return false;
+
+    /* Build command with \r\n termination */
+    char buf[UM982_CMD_BUF_SIZE];
+    int len = snprintf(buf, sizeof(buf), "%s\r\n", cmd);
+    if (len <= 0 || (size_t)len >= sizeof(buf)) return false;
+
+    HAL_StatusTypeDef status = HAL_UART_Transmit(
+        gps->huart, (const uint8_t *)buf, (uint16_t)len, 100);
+
+    return status == HAL_OK;
+}
+
+/* ========================= Line assembly + feed ====================== */
+
+/**
+ * Process a completed line from the line buffer.
+ */
+static void process_line(UM982_GPS_t *gps, const char *line)
+{
+    if (line == NULL || line[0] == '\0') return;
+
+    /* NMEA sentence starts with '$' */
+    if (line[0] == '$') {
+        um982_parse_sentence(gps, line);
+        return;
+    }
+
+    /* Unicore proprietary response starts with '#' (e.g. #VERSIONA) */
+    if (line[0] == '#') {
+        if (strncmp(line + 1, "VERSIONA", 8) == 0) {
+            gps->version_received = true;
+            gps->initialized = true;
+        }
+        return;
+    }
+}
+
+void um982_feed(UM982_GPS_t *gps, const uint8_t *data, uint16_t len)
+{
+    if (gps == NULL || data == NULL || len == 0) return;
+
+    for (uint16_t i = 0; i < len; i++) {
+        uint8_t ch = data[i];
+
+        /* End of line: process if we have content */
+        if (ch == '\n' || ch == '\r') {
+            if (gps->line_len > 0 && !gps->line_overflow) {
+                gps->line_buf[gps->line_len] = '\0';
+                process_line(gps, gps->line_buf);
+            }
+            gps->line_len = 0;
+            gps->line_overflow = false;
+            continue;
+        }
+
+        /* Accumulate into line buffer */
+        if (gps->line_len < UM982_LINE_BUF_SIZE - 1) {
+            gps->line_buf[gps->line_len++] = (char)ch;
+        } else {
+            gps->line_overflow = true;
+        }
+    }
+}
+
+/* ========================= UART process (production) ================= */
+
+void um982_process(UM982_GPS_t *gps)
+{
+    if (gps == NULL || gps->huart == NULL) return;
+
+    /* Read all available bytes from the UART one at a time.
+     * At 115200 baud (~11.5 KB/s) and a typical main-loop period of ~10 ms,
+     * we expect ~115 bytes per call — negligible overhead on a 168 MHz STM32.
+     *
+     * Note: batch reads (HAL_UART_Receive with Size > 1 and Timeout = 0) are
+     * NOT safe here because the HAL consumes bytes from the data register as
+     * it reads them.  If fewer than Size bytes are available, the consumed
+     * bytes are lost (HAL_TIMEOUT is returned and the caller has no way to
+     * know how many bytes were actually placed into the buffer). */
+    uint8_t ch;
+    while (HAL_UART_Receive(gps->huart, &ch, 1, 0) == HAL_OK) {
+        um982_feed(gps, &ch, 1);
+    }
+}
+
+/* ========================= Validity checks =========================== */
+
+bool um982_is_heading_valid(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return false;
+    if (isnan(gps->heading)) return false;
+
+    /* Mode must be Autonomous or Differential */
+    if (gps->heading_mode != 'A' && gps->heading_mode != 'D') return false;
+
+    /* Check age */
+    uint32_t age = HAL_GetTick() - gps->last_ths_tick;
+    return age < UM982_HEADING_TIMEOUT_MS;
+}
+
+bool um982_is_position_valid(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return false;
+    if (gps->fix_quality == UM982_FIX_NONE) return false;
+
+    /* Check age of the last valid fix */
+    uint32_t age = HAL_GetTick() - gps->last_fix_tick;
+    return age < UM982_POSITION_TIMEOUT_MS;
+}
+
+uint32_t um982_heading_age(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return UINT32_MAX;
+    return HAL_GetTick() - gps->last_ths_tick;
+}
+
+uint32_t um982_position_age(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return UINT32_MAX;
+    return HAL_GetTick() - gps->last_fix_tick;
+}
+
+/* ========================= Initialization ============================ */
+
+bool um982_init(UM982_GPS_t *gps, UART_HandleTypeDef *huart,
+                float baseline_cm, float tolerance_cm)
+{
+    if (gps == NULL || huart == NULL) return false;
+
+    /* Zero-init entire structure */
+    memset(gps, 0, sizeof(UM982_GPS_t));
+
+    gps->huart = huart;
+    gps->heading = NAN;
+    gps->heading_mode = 'V';
+    gps->rmc_status = 'V';
+    gps->speed_knots = 0.0f;
+
+    /* Seed fix timestamp so position_age() returns ~0 instead of uptime.
+     * Gives the module a full 30s grace window from init to acquire a fix
+     * before the health check fires ERROR_GPS_COMM. */
+    gps->last_fix_tick = HAL_GetTick();
+    gps->speed_kmh = 0.0f;
+    gps->course_true = 0.0f;
+
+    /* Step 1: Stop all current output to get a clean slate */
+    um982_send_command(gps, "UNLOG");
+    HAL_Delay(100);
+
+    /* Step 2: Configure heading mode
+     * Per N4 Reference 4.18: CONFIG HEADING FIXLENGTH (default mode)
+     * "The distance between ANT1 and ANT2 is fixed. They move synchronously." */
+    um982_send_command(gps, "CONFIG HEADING FIXLENGTH");
+    HAL_Delay(50);
+
+    /* Step 3: Set baseline length if specified
+     * Per N4 Reference: CONFIG HEADING LENGTH <cm> <tolerance_cm>
+     * "parameter1: Fixed baseline length (cm), valid range >= 0"
+     * "parameter2: Tolerable error margin (cm), valid range > 0" */
+    if (baseline_cm > 0.0f) {
+        char cmd[64];
+        if (tolerance_cm > 0.0f) {
+            snprintf(cmd, sizeof(cmd), "CONFIG HEADING LENGTH %.0f %.0f",
+                     baseline_cm, tolerance_cm);
+        } else {
+            snprintf(cmd, sizeof(cmd), "CONFIG HEADING LENGTH %.0f",
+                     baseline_cm);
+        }
+        um982_send_command(gps, cmd);
+        HAL_Delay(50);
+    }
+
+    /* Step 4: Enable NMEA output sentences on COM2.
+     * Per N4 Reference: "When requesting NMEA messages, users should add GP
+     * before each command name"
+     *
+     * We target COM2 because the ELT0213 board (GNSS.STORE) exposes COM2
+     * (RXD2/TXD2) on its 12-pin JST connector (pins 5 & 6).  The STM32
+     * UART5 (PC12-TX, PD2-RX) connects to these pins via JP8.
+     * COM2 defaults to 115200 baud — matching our UART5 config. */
+    um982_send_command(gps, "GPGGA COM2 1");     /* GGA at 1 Hz */
+    HAL_Delay(50);
+    um982_send_command(gps, "GPRMC COM2 1");     /* RMC at 1 Hz */
+    HAL_Delay(50);
+    um982_send_command(gps, "GPTHS COM2 0.2");   /* THS at 5 Hz (heading primary) */
+    HAL_Delay(50);
+
+    /* Step 5: Skip SAVECONFIG -- NMEA config is re-sent every boot anyway.
+     * Saving to NVM on every power cycle would wear flash.  If persistent
+     * config is needed, call um982_send_command(gps, "SAVECONFIG") once
+     * during commissioning. */
+
+    /* Step 6: Query version to verify communication */
+    gps->version_received = false;
+    um982_send_command(gps, "VERSIONA");
+
+    /* Wait for VERSIONA response (non-blocking poll) */
+    uint32_t start = HAL_GetTick();
+    while (!gps->version_received &&
+           (HAL_GetTick() - start) < UM982_INIT_TIMEOUT_MS) {
+        um982_process(gps);
+        HAL_Delay(10);
+    }
+
+    gps->initialized = gps->version_received;
+    return gps->initialized;
+}
@@ -0,0 +1,213 @@
+/*******************************************************************************
+ * um982_gps.h -- UM982 dual-antenna GNSS receiver driver
+ *
+ * Parses NMEA sentences (GGA, RMC, THS, VTG) from the Unicore UM982 module
+ * and provides position, heading, and velocity data.
+ *
+ * Design principles:
+ *   - Non-blocking: process() reads available UART bytes without waiting
+ *   - Correct NMEA parsing: proper tokenizer handles empty fields
+ *   - Longitude handles 3-digit degrees (dddmm.mmmm) via decimal-point detection
+ *   - Checksum verified on every sentence
+ *   - Command syntax verified against Unicore N4 Command Reference EN R1.14
+ *
+ * Hardware: UM982 on UART5 @ 115200 baud, dual-antenna heading mode
+ ******************************************************************************/
+#ifndef UM982_GPS_H
+#define UM982_GPS_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <math.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Forward-declare the HAL UART handle type.  The real definition comes from
+ * stm32f7xx_hal.h (production) or stm32_hal_mock.h (tests). */
+#ifndef STM32_HAL_MOCK_H
+#include "stm32f7xx_hal.h"
+#else
+/* Already included via mock -- nothing to do */
+#endif
+
+/* ========================= Constants ================================= */
+
+#define UM982_RX_BUF_SIZE    512   /* Ring buffer for incoming UART bytes */
+#define UM982_LINE_BUF_SIZE   96   /* Max NMEA sentence (82 chars + margin) */
+#define UM982_CMD_BUF_SIZE   128   /* Outgoing command buffer */
+#define UM982_INIT_TIMEOUT_MS 3000 /* Timeout waiting for VERSIONA response */
+
+/* Fix quality values (from GGA field 6) */
+#define UM982_FIX_NONE       0
+#define UM982_FIX_GPS        1
+#define UM982_FIX_DGPS       2
+#define UM982_FIX_RTK_FIXED  4
+#define UM982_FIX_RTK_FLOAT  5
+
+/* Validity timeout defaults (ms) */
+#define UM982_HEADING_TIMEOUT_MS 2000
+#define UM982_POSITION_TIMEOUT_MS 5000
+
+/* ========================= Data Types ================================ */
+
+typedef struct {
+    /* Position */
+    double   latitude;       /* Decimal degrees, positive = North */
+    double   longitude;      /* Decimal degrees, positive = East */
+    float    altitude;       /* Meters above MSL */
+    float    geoid_sep;      /* Geoid separation (meters) */
+
+    /* Heading (from dual-antenna THS) */
+    float    heading;        /* True heading 0-360 degrees, NAN if invalid */
+    char     heading_mode;   /* A=autonomous, D=diff, E=est, M=manual, S=sim, V=invalid */
+
+    /* Velocity */
+    float    speed_knots;    /* Speed over ground (knots) */
+    float    speed_kmh;      /* Speed over ground (km/h) */
+    float    course_true;    /* Course over ground (degrees true) */
+
+    /* Quality */
+    uint8_t  fix_quality;    /* 0=none, 1=GPS, 2=DGPS, 4=RTK fixed, 5=RTK float */
+    uint8_t  num_satellites; /* Satellites used in fix */
+    float    hdop;           /* Horizontal dilution of precision */
+
+    /* RMC status */
+    char     rmc_status;     /* A=valid, V=warning */
+
+    /* Timestamps (HAL_GetTick() at last update) */
+    uint32_t last_fix_tick;   /* Last valid GGA fix (fix_quality > 0) */
+    uint32_t last_gga_tick;
+    uint32_t last_rmc_tick;
+    uint32_t last_ths_tick;
+    uint32_t last_vtg_tick;
+
+    /* Communication state */
+    bool     initialized;      /* VERSIONA or supported NMEA traffic seen */
+    bool     version_received; /* VERSIONA response seen */
+
+    /* ---- Internal parser state (not for external use) ---- */
+
+    /* Ring buffer */
+    uint8_t  rx_buf[UM982_RX_BUF_SIZE];
+    uint16_t rx_head;        /* Write index */
+    uint16_t rx_tail;        /* Read index */
+
+    /* Line assembler */
+    char     line_buf[UM982_LINE_BUF_SIZE];
+    uint8_t  line_len;
+    bool     line_overflow;  /* Current line exceeded buffer */
+
+    /* UART handle */
+    UART_HandleTypeDef *huart;
+
+} UM982_GPS_t;
+
+/* ========================= Public API ================================ */
+
+/**
+ * Initialize the UM982_GPS_t structure and configure the module.
+ *
+ * Sends: UNLOG, CONFIG HEADING, optional CONFIG HEADING LENGTH,
+ *        GPGGA, GPRMC, GPTHS
+ * Queries VERSIONA to verify communication.
+ *
+ * @param gps          Pointer to UM982_GPS_t instance
+ * @param huart        UART handle (e.g. &huart5)
+ * @param baseline_cm  Distance between antennas in cm (0 = use module default)
+ * @param tolerance_cm Baseline tolerance in cm (0 = use module default)
+ * @return true if VERSIONA response received within timeout
+ */
+bool um982_init(UM982_GPS_t *gps, UART_HandleTypeDef *huart,
+                float baseline_cm, float tolerance_cm);
+
+/**
+ * Process available UART data. Call from main loop — non-blocking.
+ *
+ * Reads all available bytes from UART, assembles lines, and dispatches
+ * complete NMEA sentences to the appropriate parser.
+ *
+ * @param gps  Pointer to UM982_GPS_t instance
+ */
+void um982_process(UM982_GPS_t *gps);
+
+/**
+ * Feed raw bytes directly into the parser (useful for testing).
+ * In production, um982_process() calls this internally after UART read.
+ *
+ * @param gps   Pointer to UM982_GPS_t instance
+ * @param data  Pointer to byte array
+ * @param len   Number of bytes
+ */
+void um982_feed(UM982_GPS_t *gps, const uint8_t *data, uint16_t len);
+
+/* ---- Getters ---- */
+
+static inline float    um982_get_heading(const UM982_GPS_t *gps)     { return gps->heading; }
+static inline double   um982_get_latitude(const UM982_GPS_t *gps)    { return gps->latitude; }
+static inline double   um982_get_longitude(const UM982_GPS_t *gps)   { return gps->longitude; }
+static inline float    um982_get_altitude(const UM982_GPS_t *gps)    { return gps->altitude; }
+static inline uint8_t  um982_get_fix_quality(const UM982_GPS_t *gps) { return gps->fix_quality; }
+static inline uint8_t  um982_get_num_sats(const UM982_GPS_t *gps)    { return gps->num_satellites; }
+static inline float    um982_get_hdop(const UM982_GPS_t *gps)        { return gps->hdop; }
+static inline float    um982_get_speed_knots(const UM982_GPS_t *gps) { return gps->speed_knots; }
+static inline float    um982_get_speed_kmh(const UM982_GPS_t *gps)   { return gps->speed_kmh; }
+static inline float    um982_get_course(const UM982_GPS_t *gps)      { return gps->course_true; }
+
+/**
+ * Check if heading is valid (mode A or D, and within timeout).
+ */
+bool um982_is_heading_valid(const UM982_GPS_t *gps);
+
+/**
+ * Check if position is valid (fix_quality > 0, and within timeout).
+ */
+bool um982_is_position_valid(const UM982_GPS_t *gps);
+
+/**
+ * Get age of last heading update in milliseconds.
+ */
+uint32_t um982_heading_age(const UM982_GPS_t *gps);
+
+/**
+ * Get age of the last valid position fix in milliseconds.
+ */
+uint32_t um982_position_age(const UM982_GPS_t *gps);
+
+/* ========================= Internal (exposed for testing) ============ */
+
+/**
+ * Verify NMEA checksum. Returns true if valid.
+ * Sentence must start with '$' and contain '*XX' before termination.
+ */
+bool um982_verify_checksum(const char *sentence);
+
+/**
+ * Parse a complete NMEA line (with $ prefix and *XX checksum).
+ * Dispatches to GGA/RMC/THS/VTG parsers as appropriate.
+ */
+void um982_parse_sentence(UM982_GPS_t *gps, const char *sentence);
+
+/**
+ * Parse NMEA coordinate string to decimal degrees.
+ * Works for both latitude (ddmm.mmmm) and longitude (dddmm.mmmm)
+ * by detecting the decimal point position.
+ *
+ * @param field     NMEA coordinate field (e.g. "4404.14036" or "12118.85961")
+ * @param hemisphere 'N', 'S', 'E', or 'W'
+ * @return Decimal degrees (negative for S/W), or NAN on parse error
+ */
+double um982_parse_coord(const char *field, char hemisphere);
+
+/**
+ * Send a command to the UM982. Appends \r\n automatically.
+ * @return true if UART transmit succeeded
+ */
+bool um982_send_command(UM982_GPS_t *gps, const char *cmd);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UM982_GPS_H */
@@ -3,18 +3,38 @@
 *.dSYM/

 # Test binaries (built by Makefile)
+# TESTS_WITH_REAL
 test_bug1_timed_sync_init_ordering
-test_bug2_ad9523_double_setup
 test_bug3_timed_sync_noop
 test_bug4_phase_shift_before_check
 test_bug5_fine_phase_gpio_only
+test_bug9_platform_ops_null
+test_bug10_spi_cs_not_toggled
+test_bug15_htim3_dangling_extern
+
+# TESTS_MOCK_ONLY
+test_bug2_ad9523_double_setup
 test_bug6_timer_variable_collision
 test_bug7_gpio_pin_conflict
 test_bug8_uart_commented_out
-test_bug9_platform_ops_null
-test_bug10_spi_cs_not_toggled
-test_bug11_platform_spi_transmit_only
+test_bug14_diag_section_args
+test_gap3_emergency_stop_rails
+
+# TESTS_STANDALONE
 test_bug12_pa_cal_loop_inverted
 test_bug13_dac2_adc_buffer_mismatch
-test_bug14_diag_section_args
-test_bug15_htim3_dangling_extern
+test_gap3_iwdg_config
+test_gap3_temperature_max
+test_gap3_idq_periodic_reread
+test_gap3_emergency_state_ordering
+test_gap3_overtemp_emergency_stop
+test_gap3_health_watchdog_cold_start
+
+# TESTS_WITH_PLATFORM
+test_bug11_platform_spi_transmit_only
+
+# TESTS_WITH_CXX
+test_agc_outer_loop
+
+# Manual / one-off test builds
+test_um982_gps
@@ -16,10 +16,21 @@
 ################################################################################

 CC       := cc
+CXX      := c++
 CFLAGS   := -std=c11 -Wall -Wextra -Wno-unused-parameter -g -O0
+CXXFLAGS := -std=c++17 -Wall -Wextra -Wno-unused-parameter -g -O0
 # Shim headers come FIRST so they override real headers
 INCLUDES := -Ishims -I. -I../9_1_1_C_Cpp_Libraries

+# C++ library directory (AGC, ADAR1000 Manager)
+CXX_LIB_DIR := ../9_1_1_C_Cpp_Libraries
+CXX_SRCS    := $(CXX_LIB_DIR)/ADAR1000_AGC.cpp $(CXX_LIB_DIR)/ADAR1000_Manager.cpp
+CXX_OBJS    := ADAR1000_AGC.o ADAR1000_Manager.o
+
+# GPS driver source
+GPS_SRC := ../9_1_3_C_Cpp_Code/um982_gps.c
+GPS_OBJ := um982_gps.o
+
 # Real source files compiled against mock headers
 REAL_SRC := ../9_1_1_C_Cpp_Libraries/adf4382a_manager.c

@@ -57,16 +68,25 @@ TESTS_STANDALONE := test_bug12_pa_cal_loop_inverted \
                    test_gap3_iwdg_config \
                    test_gap3_temperature_max \
                    test_gap3_idq_periodic_reread \
-                    test_gap3_emergency_state_ordering
+                    test_gap3_emergency_state_ordering \
+                    test_gap3_overtemp_emergency_stop \
+                    test_gap3_health_watchdog_cold_start

 # Tests that need platform_noos_stm32.o + mocks
 TESTS_WITH_PLATFORM := test_bug11_platform_spi_transmit_only

-ALL_TESTS := $(TESTS_WITH_REAL) $(TESTS_MOCK_ONLY) $(TESTS_STANDALONE) $(TESTS_WITH_PLATFORM)
+# C++ tests (AGC outer loop)
+TESTS_WITH_CXX := test_agc_outer_loop
+
+# GPS driver tests (need mocks + GPS source + -lm)
+TESTS_GPS := test_um982_gps
+
+ALL_TESTS := $(TESTS_WITH_REAL) $(TESTS_MOCK_ONLY) $(TESTS_STANDALONE) $(TESTS_WITH_PLATFORM) $(TESTS_WITH_CXX) $(TESTS_GPS)

 .PHONY: all build test clean \
        $(addprefix test_,bug1 bug2 bug3 bug4 bug5 bug6 bug7 bug8 bug9 bug10 bug11 bug12 bug13 bug14 bug15) \
-        test_gap3_estop test_gap3_iwdg test_gap3_temp test_gap3_idq test_gap3_order
+        test_gap3_estop test_gap3_iwdg test_gap3_temp test_gap3_idq test_gap3_order \
+        test_gap3_overtemp test_gap3_wdog

 all: build test

@@ -152,10 +172,48 @@ test_gap3_idq_periodic_reread: test_gap3_idq_periodic_reread.c
 test_gap3_emergency_state_ordering: test_gap3_emergency_state_ordering.c
 	$(CC) $(CFLAGS) $< -o $@

+test_gap3_overtemp_emergency_stop: test_gap3_overtemp_emergency_stop.c
+	$(CC) $(CFLAGS) $< -o $@
+
+test_gap3_health_watchdog_cold_start: test_gap3_health_watchdog_cold_start.c
+	$(CC) $(CFLAGS) $< -o $@
+
 # Tests that need platform_noos_stm32.o + mocks
 $(TESTS_WITH_PLATFORM): %: %.c $(MOCK_OBJS) $(PLATFORM_OBJ)
 	$(CC) $(CFLAGS) $(INCLUDES) $< $(MOCK_OBJS) $(PLATFORM_OBJ) -o $@

+# --- C++ object rules ---
+
+ADAR1000_AGC.o: $(CXX_LIB_DIR)/ADAR1000_AGC.cpp $(CXX_LIB_DIR)/ADAR1000_AGC.h
+	$(CXX) $(CXXFLAGS) $(INCLUDES) -c $< -o $@
+
+ADAR1000_Manager.o: $(CXX_LIB_DIR)/ADAR1000_Manager.cpp $(CXX_LIB_DIR)/ADAR1000_Manager.h
+	$(CXX) $(CXXFLAGS) $(INCLUDES) -c $< -o $@
+
+# --- C++ test binary rules ---
+
+test_agc_outer_loop: test_agc_outer_loop.cpp $(CXX_OBJS) $(MOCK_OBJS)
+	$(CXX) $(CXXFLAGS) $(INCLUDES) $< $(CXX_OBJS) $(MOCK_OBJS) -o $@
+
+# Convenience target
+.PHONY: test_agc
+test_agc: test_agc_outer_loop
+	./test_agc_outer_loop
+
+# --- GPS driver rules ---
+
+$(GPS_OBJ): $(GPS_SRC)
+	$(CC) $(CFLAGS) $(INCLUDES) -I../9_1_3_C_Cpp_Code -c $< -o $@
+
+# Note: test includes um982_gps.c directly for white-box testing (static fn access)
+test_um982_gps: test_um982_gps.c $(MOCK_OBJS)
+	$(CC) $(CFLAGS) $(INCLUDES) -I../9_1_3_C_Cpp_Code $< $(MOCK_OBJS) -lm -o $@
+
+# Convenience target
+.PHONY: test_gps
+test_gps: test_um982_gps
+	./test_um982_gps
+
 # --- Individual test targets ---

 test_bug1: test_bug1_timed_sync_init_ordering
@@ -218,6 +276,12 @@ test_gap3_idq: test_gap3_idq_periodic_reread
 test_gap3_order: test_gap3_emergency_state_ordering
 	./test_gap3_emergency_state_ordering

+test_gap3_overtemp: test_gap3_overtemp_emergency_stop
+	./test_gap3_overtemp_emergency_stop
+
+test_gap3_wdog: test_gap3_health_watchdog_cold_start
+	./test_gap3_health_watchdog_cold_start
+
 # --- Clean ---

 clean:
@@ -129,6 +129,14 @@ void Error_Handler(void);
 #define GYR_INT_Pin GPIO_PIN_8
 #define GYR_INT_GPIO_Port GPIOC

+/* FPGA digital I/O (directly connected GPIOs) */
+#define FPGA_DIG5_SAT_Pin       GPIO_PIN_13
+#define FPGA_DIG5_SAT_GPIO_Port GPIOD
+#define FPGA_DIG6_Pin           GPIO_PIN_14
+#define FPGA_DIG6_GPIO_Port     GPIOD
+#define FPGA_DIG7_Pin           GPIO_PIN_15
+#define FPGA_DIG7_GPIO_Port     GPIOD
+
 #ifdef __cplusplus
 }
 #endif
@@ -21,6 +21,7 @@ SPI_HandleTypeDef  hspi4 = { .id = 4 };
 I2C_HandleTypeDef  hi2c1 = { .id = 1 };
 I2C_HandleTypeDef  hi2c2 = { .id = 2 };
 UART_HandleTypeDef huart3 = { .id = 3 };
+UART_HandleTypeDef huart5 = { .id = 5 };  /* GPS UART */
 ADC_HandleTypeDef  hadc3 = { .id = 3 };
 TIM_HandleTypeDef  htim3 = { .id = 3 };

@@ -34,6 +35,26 @@ uint32_t mock_tick = 0;
 /* ========================= Printf control ========================= */
 int mock_printf_enabled = 0;

+/* ========================= Mock UART TX capture =================== */
+uint8_t  mock_uart_tx_buf[MOCK_UART_TX_BUF_SIZE];
+uint16_t mock_uart_tx_len = 0;
+
+/* ========================= Mock UART RX buffer ==================== */
+#define MOCK_UART_RX_SLOTS 8
+
+static struct {
+    uint32_t uart_id;
+    uint8_t  buf[MOCK_UART_RX_BUF_SIZE];
+    uint16_t head;
+    uint16_t tail;
+} mock_uart_rx[MOCK_UART_RX_SLOTS];
+
+void mock_uart_tx_clear(void)
+{
+    mock_uart_tx_len = 0;
+    memset(mock_uart_tx_buf, 0, sizeof(mock_uart_tx_buf));
+}
+
 /* ========================= Mock GPIO read ========================= */
 #define GPIO_READ_TABLE_SIZE 32
 static struct {
@@ -49,6 +70,9 @@ void spy_reset(void)
    mock_tick = 0;
    mock_printf_enabled = 0;
    memset(gpio_read_table, 0, sizeof(gpio_read_table));
+    memset(mock_uart_rx, 0, sizeof(mock_uart_rx));
+    mock_uart_tx_len = 0;
+    memset(mock_uart_tx_buf, 0, sizeof(mock_uart_tx_buf));
 }

 const SpyRecord *spy_get(int index)
@@ -175,7 +199,7 @@ void HAL_Delay(uint32_t Delay)
    mock_tick += Delay;
 }

-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData,
+HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData,
                                     uint16_t Size, uint32_t Timeout)
 {
    spy_push((SpyRecord){
@@ -185,6 +209,83 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData,
        .value = Timeout,
        .extra = huart
    });
+    /* Capture TX data for test inspection */
+    for (uint16_t i = 0; i < Size && mock_uart_tx_len < MOCK_UART_TX_BUF_SIZE; i++) {
+        mock_uart_tx_buf[mock_uart_tx_len++] = pData[i];
+    }
+    return HAL_OK;
+}
+
+/* ========================= Mock UART RX helpers ====================== */
+
+/* find_rx_slot, mock_uart_rx_load, etc. use the mock_uart_rx declared above */
+
+static int find_rx_slot(UART_HandleTypeDef *huart)
+{
+    if (huart == NULL) return -1;
+    /* Find existing slot */
+    for (int i = 0; i < MOCK_UART_RX_SLOTS; i++) {
+        if (mock_uart_rx[i].uart_id == huart->id && mock_uart_rx[i].head != mock_uart_rx[i].tail) {
+            return i;
+        }
+        if (mock_uart_rx[i].uart_id == huart->id) {
+            return i;
+        }
+    }
+    /* Find empty slot */
+    for (int i = 0; i < MOCK_UART_RX_SLOTS; i++) {
+        if (mock_uart_rx[i].uart_id == 0) {
+            mock_uart_rx[i].uart_id = huart->id;
+            return i;
+        }
+    }
+    return -1;
+}
+
+void mock_uart_rx_load(UART_HandleTypeDef *huart, const uint8_t *data, uint16_t len)
+{
+    int slot = find_rx_slot(huart);
+    if (slot < 0) return;
+    mock_uart_rx[slot].uart_id = huart->id;
+    for (uint16_t i = 0; i < len; i++) {
+        uint16_t next = (mock_uart_rx[slot].head + 1) % MOCK_UART_RX_BUF_SIZE;
+        if (next == mock_uart_rx[slot].tail) break;  /* Buffer full */
+        mock_uart_rx[slot].buf[mock_uart_rx[slot].head] = data[i];
+        mock_uart_rx[slot].head = next;
+    }
+}
+
+void mock_uart_rx_clear(UART_HandleTypeDef *huart)
+{
+    int slot = find_rx_slot(huart);
+    if (slot < 0) return;
+    mock_uart_rx[slot].head = 0;
+    mock_uart_rx[slot].tail = 0;
+}
+
+HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData,
+                                    uint16_t Size, uint32_t Timeout)
+{
+    (void)Timeout;
+    int slot = find_rx_slot(huart);
+    if (slot < 0) return HAL_TIMEOUT;
+
+    for (uint16_t i = 0; i < Size; i++) {
+        if (mock_uart_rx[slot].head == mock_uart_rx[slot].tail) {
+            return HAL_TIMEOUT;  /* No more data */
+        }
+        pData[i] = mock_uart_rx[slot].buf[mock_uart_rx[slot].tail];
+        mock_uart_rx[slot].tail = (mock_uart_rx[slot].tail + 1) % MOCK_UART_RX_BUF_SIZE;
+    }
+
+    spy_push((SpyRecord){
+        .type  = SPY_UART_RX,
+        .port  = NULL,
+        .pin   = Size,
+        .value = Timeout,
+        .extra = huart
+    });
+
    return HAL_OK;
 }

@@ -34,6 +34,10 @@ typedef uint32_t HAL_StatusTypeDef;

 #define HAL_MAX_DELAY 0xFFFFFFFFU

+#ifndef __NOP
+#define __NOP() ((void)0)
+#endif
+
 /* ========================= GPIO Types ============================ */

 typedef struct {
@@ -101,6 +105,7 @@ typedef struct {
 extern SPI_HandleTypeDef  hspi1, hspi4;
 extern I2C_HandleTypeDef  hi2c1, hi2c2;
 extern UART_HandleTypeDef huart3;
+extern UART_HandleTypeDef huart5;  /* GPS UART */
 extern ADC_HandleTypeDef  hadc3;
 extern TIM_HandleTypeDef  htim3;  /* Timer for DELADJ PWM */

@@ -135,6 +140,7 @@ typedef enum {
    SPY_TIM_SET_COMPARE,
    SPY_SPI_TRANSMIT_RECEIVE,
    SPY_SPI_TRANSMIT,
+    SPY_UART_RX,
 } SpyCallType;

 typedef struct {
@@ -182,7 +188,24 @@ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
 void          HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
 uint32_t      HAL_GetTick(void);
 void          HAL_Delay(uint32_t Delay);
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+
+/* ========================= Mock UART RX buffer ======================= */
+
+/* Inject bytes into the mock UART RX buffer for a specific UART handle.
+ * HAL_UART_Receive will return these bytes one at a time. */
+#define MOCK_UART_RX_BUF_SIZE 2048
+
+void mock_uart_rx_load(UART_HandleTypeDef *huart, const uint8_t *data, uint16_t len);
+void mock_uart_rx_clear(UART_HandleTypeDef *huart);
+
+/* Capture buffer for UART TX data (to verify commands sent to GPS module) */
+#define MOCK_UART_TX_BUF_SIZE 2048
+
+extern uint8_t  mock_uart_tx_buf[MOCK_UART_TX_BUF_SIZE];
+extern uint16_t mock_uart_tx_len;
+void mock_uart_tx_clear(void);

 /* ========================= SPI stubs ============================== */

@@ -0,0 +1,369 @@
+// test_agc_outer_loop.cpp -- C++ unit tests for ADAR1000_AGC outer-loop AGC
+//
+// Tests the STM32 outer-loop AGC class that adjusts ADAR1000 VGA gain based
+// on the FPGA's saturation flag.  Uses the existing HAL mock/spy framework.
+//
+// Build: c++ -std=c++17 ... (see Makefile TESTS_WITH_CXX rule)
+
+#include <cassert>
+#include <cstdio>
+#include <cstring>
+
+// Shim headers override real STM32/diag headers
+#include "stm32_hal_mock.h"
+#include "ADAR1000_AGC.h"
+#include "ADAR1000_Manager.h"
+
+// ---------------------------------------------------------------------------
+// Linker symbols required by ADAR1000_Manager.cpp (pulled in via main.h shim)
+// ---------------------------------------------------------------------------
+uint8_t GUI_start_flag_received = 0;
+uint8_t USB_Buffer[64] = {0};
+extern "C" void Error_Handler(void) {}
+
+// ---------------------------------------------------------------------------
+// Helpers
+// ---------------------------------------------------------------------------
+
+static int tests_passed = 0;
+static int tests_total  = 0;
+
+#define RUN_TEST(fn)                                                           \
+    do {                                                                        \
+        tests_total++;                                                          \
+        printf("  [%2d] %-55s ", tests_total, #fn);                            \
+        fn();                                                                   \
+        tests_passed++;                                                         \
+        printf("PASS\n");                                                       \
+    } while (0)
+
+// ---------------------------------------------------------------------------
+// Test 1: Default construction matches design spec
+// ---------------------------------------------------------------------------
+static void test_defaults()
+{
+    ADAR1000_AGC agc;
+
+    assert(agc.agc_base_gain == 30);  // kDefaultRxVgaGain
+    assert(agc.gain_step_down == 4);
+    assert(agc.gain_step_up == 1);
+    assert(agc.min_gain == 0);
+    assert(agc.max_gain == 127);
+    assert(agc.holdoff_frames == 4);
+    assert(agc.enabled == false);  // disabled by default — FPGA DIG_6 is source of truth
+    assert(agc.holdoff_counter == 0);
+    assert(agc.last_saturated == false);
+    assert(agc.saturation_event_count == 0);
+
+    // All cal offsets zero
+    for (int i = 0; i < AGC_TOTAL_CHANNELS; ++i) {
+        assert(agc.cal_offset[i] == 0);
+    }
+}
+
+// ---------------------------------------------------------------------------
+// Test 2: Saturation reduces gain by step_down
+// ---------------------------------------------------------------------------
+static void test_saturation_reduces_gain()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    uint8_t initial = agc.agc_base_gain;  // 30
+
+    agc.update(true);  // saturation
+
+    assert(agc.agc_base_gain == initial - agc.gain_step_down);  // 26
+    assert(agc.last_saturated == true);
+    assert(agc.holdoff_counter == 0);
+}
+
+// ---------------------------------------------------------------------------
+// Test 3: Holdoff prevents premature gain-up
+// ---------------------------------------------------------------------------
+static void test_holdoff_prevents_early_gain_up()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    agc.update(true);  // saturate once -> gain = 26
+    uint8_t after_sat = agc.agc_base_gain;
+
+    // Feed (holdoff_frames - 1) clear frames — should NOT increase gain
+    for (uint8_t i = 0; i < agc.holdoff_frames - 1; ++i) {
+        agc.update(false);
+        assert(agc.agc_base_gain == after_sat);
+    }
+
+    // holdoff_counter should be holdoff_frames - 1
+    assert(agc.holdoff_counter == agc.holdoff_frames - 1);
+}
+
+// ---------------------------------------------------------------------------
+// Test 4: Recovery after holdoff period
+// ---------------------------------------------------------------------------
+static void test_recovery_after_holdoff()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    agc.update(true);  // saturate -> gain = 26
+    uint8_t after_sat = agc.agc_base_gain;
+
+    // Feed exactly holdoff_frames clear frames
+    for (uint8_t i = 0; i < agc.holdoff_frames; ++i) {
+        agc.update(false);
+    }
+
+    assert(agc.agc_base_gain == after_sat + agc.gain_step_up);  // 27
+    assert(agc.holdoff_counter == 0);  // reset after recovery
+}
+
+// ---------------------------------------------------------------------------
+// Test 5: Min gain clamping
+// ---------------------------------------------------------------------------
+static void test_min_gain_clamp()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    agc.min_gain = 10;
+    agc.agc_base_gain = 12;
+    agc.gain_step_down = 4;
+
+    agc.update(true);  // 12 - 4 = 8, but min = 10
+    assert(agc.agc_base_gain == 10);
+
+    agc.update(true);  // already at min
+    assert(agc.agc_base_gain == 10);
+}
+
+// ---------------------------------------------------------------------------
+// Test 6: Max gain clamping
+// ---------------------------------------------------------------------------
+static void test_max_gain_clamp()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    agc.max_gain = 32;
+    agc.agc_base_gain = 31;
+    agc.gain_step_up = 2;
+    agc.holdoff_frames = 1;  // immediate recovery
+
+    agc.update(false);  // 31 + 2 = 33, but max = 32
+    assert(agc.agc_base_gain == 32);
+
+    agc.update(false);  // already at max
+    assert(agc.agc_base_gain == 32);
+}
+
+// ---------------------------------------------------------------------------
+// Test 7: Per-channel calibration offsets
+// ---------------------------------------------------------------------------
+static void test_calibration_offsets()
+{
+    ADAR1000_AGC agc;
+    agc.agc_base_gain = 30;
+    agc.min_gain = 0;
+    agc.max_gain = 60;
+
+    agc.cal_offset[0]  =  5;   // 30 + 5  = 35
+    agc.cal_offset[1]  = -10;  // 30 - 10 = 20
+    agc.cal_offset[15] =  40;  // 30 + 40 = 60 (clamped to max)
+
+    assert(agc.effectiveGain(0) == 35);
+    assert(agc.effectiveGain(1) == 20);
+    assert(agc.effectiveGain(15) == 60);  // clamped to max_gain
+
+    // Negative clamp
+    agc.cal_offset[2] = -50;   // 30 - 50 = -20, clamped to min_gain = 0
+    assert(agc.effectiveGain(2) == 0);
+
+    // Out-of-range index returns min_gain
+    assert(agc.effectiveGain(16) == agc.min_gain);
+}
+
+// ---------------------------------------------------------------------------
+// Test 8: Disabled AGC is a no-op
+// ---------------------------------------------------------------------------
+static void test_disabled_noop()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = false;
+    uint8_t original = agc.agc_base_gain;
+
+    agc.update(true);   // should be ignored
+    assert(agc.agc_base_gain == original);
+    assert(agc.last_saturated == false);  // not updated when disabled
+    assert(agc.saturation_event_count == 0);
+
+    agc.update(false);  // also ignored
+    assert(agc.agc_base_gain == original);
+}
+
+// ---------------------------------------------------------------------------
+// Test 9: applyGain() produces correct SPI writes
+// ---------------------------------------------------------------------------
+static void test_apply_gain_spi()
+{
+    spy_reset();
+
+    ADAR1000Manager mgr;  // creates 4 devices
+    ADAR1000_AGC agc;
+    agc.agc_base_gain = 42;
+
+    agc.applyGain(mgr);
+
+    // Each channel: adarSetRxVgaGain -> adarWrite(gain) + adarWrite(LOAD_WORKING)
+    // Each adarWrite: CS_low (GPIO_WRITE) + SPI_TRANSMIT + CS_high (GPIO_WRITE)
+    // = 3 spy records per adarWrite
+    // = 6 spy records per channel
+    // = 16 channels * 6 = 96 total spy records
+
+    // Verify SPI transmit count: 2 SPI calls per channel * 16 channels = 32
+    int spi_count = spy_count_type(SPY_SPI_TRANSMIT);
+    assert(spi_count == 32);
+
+    // Verify GPIO write count: 4 GPIO writes per channel (CS low + CS high for each of 2 adarWrite calls)
+    int gpio_writes = spy_count_type(SPY_GPIO_WRITE);
+    assert(gpio_writes == 64);  // 16 ch * 2 adarWrite * 2 GPIO each
+}
+
+// ---------------------------------------------------------------------------
+// Test 10: resetState() clears counters but preserves config
+// ---------------------------------------------------------------------------
+static void test_reset_preserves_config()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    agc.agc_base_gain = 42;
+    agc.gain_step_down = 8;
+    agc.cal_offset[3] = -5;
+
+    // Generate some state
+    agc.update(true);
+    agc.update(true);
+    assert(agc.saturation_event_count == 2);
+    assert(agc.last_saturated == true);
+
+    agc.resetState();
+
+    // State cleared
+    assert(agc.holdoff_counter == 0);
+    assert(agc.last_saturated == false);
+    assert(agc.saturation_event_count == 0);
+
+    // Config preserved
+    assert(agc.agc_base_gain == 42 - 8 - 8);  // two saturations applied before reset
+    assert(agc.gain_step_down == 8);
+    assert(agc.cal_offset[3] == -5);
+}
+
+// ---------------------------------------------------------------------------
+// Test 11: Saturation counter increments correctly
+// ---------------------------------------------------------------------------
+static void test_saturation_counter()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+
+    for (int i = 0; i < 10; ++i) {
+        agc.update(true);
+    }
+    assert(agc.saturation_event_count == 10);
+
+    // Clear frames don't increment saturation count
+    for (int i = 0; i < 5; ++i) {
+        agc.update(false);
+    }
+    assert(agc.saturation_event_count == 10);
+}
+
+// ---------------------------------------------------------------------------
+// Test 12: Mixed saturation/clear sequence
+// ---------------------------------------------------------------------------
+static void test_mixed_sequence()
+{
+    ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
+    agc.agc_base_gain = 30;
+    agc.gain_step_down = 4;
+    agc.gain_step_up = 1;
+    agc.holdoff_frames = 3;
+
+    // Saturate: 30 -> 26
+    agc.update(true);
+    assert(agc.agc_base_gain == 26);
+    assert(agc.holdoff_counter == 0);
+
+    // 2 clear frames (not enough for recovery)
+    agc.update(false);
+    agc.update(false);
+    assert(agc.agc_base_gain == 26);
+    assert(agc.holdoff_counter == 2);
+
+    // Saturate again: 26 -> 22, counter resets
+    agc.update(true);
+    assert(agc.agc_base_gain == 22);
+    assert(agc.holdoff_counter == 0);
+    assert(agc.saturation_event_count == 2);
+
+    // 3 clear frames -> recovery: 22 -> 23
+    agc.update(false);
+    agc.update(false);
+    agc.update(false);
+    assert(agc.agc_base_gain == 23);
+    assert(agc.holdoff_counter == 0);
+
+    // 3 more clear -> 23 -> 24
+    agc.update(false);
+    agc.update(false);
+    agc.update(false);
+    assert(agc.agc_base_gain == 24);
+}
+
+// ---------------------------------------------------------------------------
+// Test 13: Effective gain with edge-case base_gain values
+// ---------------------------------------------------------------------------
+static void test_effective_gain_edge_cases()
+{
+    ADAR1000_AGC agc;
+    agc.min_gain = 5;
+    agc.max_gain = 250;
+
+    // Base gain at zero with positive offset
+    agc.agc_base_gain = 0;
+    agc.cal_offset[0] = 3;
+    assert(agc.effectiveGain(0) == 5);  // 0 + 3 = 3, clamped to min_gain=5
+
+    // Base gain at max with zero offset
+    agc.agc_base_gain = 250;
+    agc.cal_offset[0] = 0;
+    assert(agc.effectiveGain(0) == 250);
+
+    // Base gain at max with positive offset -> clamped
+    agc.agc_base_gain = 250;
+    agc.cal_offset[0] = 10;
+    assert(agc.effectiveGain(0) == 250);  // clamped to max_gain
+}
+
+// ---------------------------------------------------------------------------
+// main
+// ---------------------------------------------------------------------------
+int main()
+{
+    printf("=== ADAR1000_AGC Outer-Loop Unit Tests ===\n");
+
+    RUN_TEST(test_defaults);
+    RUN_TEST(test_saturation_reduces_gain);
+    RUN_TEST(test_holdoff_prevents_early_gain_up);
+    RUN_TEST(test_recovery_after_holdoff);
+    RUN_TEST(test_min_gain_clamp);
+    RUN_TEST(test_max_gain_clamp);
+    RUN_TEST(test_calibration_offsets);
+    RUN_TEST(test_disabled_noop);
+    RUN_TEST(test_apply_gain_spi);
+    RUN_TEST(test_reset_preserves_config);
+    RUN_TEST(test_saturation_counter);
+    RUN_TEST(test_mixed_sequence);
+    RUN_TEST(test_effective_gain_edge_cases);
+
+    printf("=== Results: %d/%d passed ===\n", tests_passed, tests_total);
+    return (tests_passed == tests_total) ? 0 : 1;
+}
@@ -34,22 +34,25 @@ static void Mock_Emergency_Stop(void)
    state_was_true_when_estop_called = system_emergency_state;
 }

-/* Error codes (subset matching main.cpp) */
+/* Error codes (subset matching main.cpp SystemError_t) */
 typedef enum {
    ERROR_NONE = 0,
    ERROR_RF_PA_OVERCURRENT = 9,
    ERROR_RF_PA_BIAS = 10,
-    ERROR_STEPPER_FAULT = 11,
+    ERROR_STEPPER_MOTOR = 11,
    ERROR_FPGA_COMM = 12,
    ERROR_POWER_SUPPLY = 13,
    ERROR_TEMPERATURE_HIGH = 14,
+    ERROR_MEMORY_ALLOC = 15,
+    ERROR_WATCHDOG_TIMEOUT = 16,
 } SystemError_t;

-/* Extracted critical-error handling logic (post-fix ordering) */
+/* Extracted critical-error handling logic (matches post-fix main.cpp predicate) */
 static void simulate_handleSystemError_critical(SystemError_t error)
 {
-    /* Only critical errors (PA overcurrent through power supply) trigger e-stop */
-    if (error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) {
+    if ((error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) ||
+        error == ERROR_TEMPERATURE_HIGH ||
+        error == ERROR_WATCHDOG_TIMEOUT) {
        /* FIX 5: set flag BEFORE calling Emergency_Stop */
        system_emergency_state = true;
        Mock_Emergency_Stop();
@@ -93,17 +96,39 @@ int main(void)
    assert(state_was_true_when_estop_called == true);
    printf("PASS\n");

-    /* Test 4: Non-critical error → no e-stop, flag stays false */
-    printf("  Test 4: Non-critical error (no e-stop)... ");
+    /* Test 4: Overtemp → MUST trigger e-stop (was incorrectly non-critical before fix) */
+    printf("  Test 4: Overtemp triggers e-stop... ");
    system_emergency_state = false;
    emergency_stop_called = false;
+    state_was_true_when_estop_called = false;
    simulate_handleSystemError_critical(ERROR_TEMPERATURE_HIGH);
+    assert(emergency_stop_called == true);
+    assert(system_emergency_state == true);
+    assert(state_was_true_when_estop_called == true);
+    printf("PASS\n");
+
+    /* Test 5: Watchdog timeout → MUST trigger e-stop */
+    printf("  Test 5: Watchdog timeout triggers e-stop... ");
+    system_emergency_state = false;
+    emergency_stop_called = false;
+    state_was_true_when_estop_called = false;
+    simulate_handleSystemError_critical(ERROR_WATCHDOG_TIMEOUT);
+    assert(emergency_stop_called == true);
+    assert(system_emergency_state == true);
+    assert(state_was_true_when_estop_called == true);
+    printf("PASS\n");
+
+    /* Test 6: Non-critical error (memory alloc) → no e-stop */
+    printf("  Test 6: Non-critical error (no e-stop)... ");
+    system_emergency_state = false;
+    emergency_stop_called = false;
+    simulate_handleSystemError_critical(ERROR_MEMORY_ALLOC);
    assert(emergency_stop_called == false);
    assert(system_emergency_state == false);
    printf("PASS\n");

-    /* Test 5: ERROR_NONE → no e-stop */
-    printf("  Test 5: ERROR_NONE (no action)... ");
+    /* Test 7: ERROR_NONE → no e-stop */
+    printf("  Test 7: ERROR_NONE (no action)... ");
    system_emergency_state = false;
    emergency_stop_called = false;
    simulate_handleSystemError_critical(ERROR_NONE);
@@ -111,6 +136,6 @@ int main(void)
    assert(system_emergency_state == false);
    printf("PASS\n");

-    printf("\n=== Gap-3 Fix 5: ALL TESTS PASSED ===\n\n");
+    printf("\n=== Gap-3 Fix 5: ALL 7 TESTS PASSED ===\n\n");
    return 0;
 }
@@ -0,0 +1,132 @@
+/*******************************************************************************
+ * test_gap3_health_watchdog_cold_start.c
+ *
+ * Safety bug: checkSystemHealth()'s internal watchdog (step 9, pre-fix) had two
+ * linked defects that, once ERROR_WATCHDOG_TIMEOUT was escalated to
+ * Emergency_Stop() by the overtemp/watchdog PR, would false-latch the radar:
+ *
+ *   (1) Cold-start false trip:
+ *         static uint32_t last_health_check = 0;
+ *         if (HAL_GetTick() - last_health_check > 60000) { ... }
+ *       On the very first call, last_health_check == 0, so once the MCU has
+ *       been up >60 s (which is typical after the ADAR1000 / AD9523 / ADF4382
+ *       init sequence) the subtraction `now - 0` exceeds 60 000 ms and the
+ *       watchdog trips spuriously.
+ *
+ *   (2) Stale-timestamp after early returns:
+ *         last_health_check = HAL_GetTick();   // at END of function
+ *       Every earlier sub-check (IMU, BMP180, GPS, PA Idq, temperature) has an
+ *       `if (fault) return current_error;` path that skips the update. After a
+ *       cumulative 60 s of transient faults, the next clean call compares
+ *       `now` against the long-stale `last_health_check` and trips.
+ *
+ * After fix:  Watchdog logic moved to function ENTRY. A dedicated cold-start
+ *             branch seeds the timestamp on the first call without checking.
+ *             On every subsequent call, the elapsed delta is captured FIRST
+ *             and last_health_check is updated BEFORE any sub-check runs, so
+ *             early returns no longer leave a stale value.
+ *
+ * Test strategy:
+ *   Extract the post-fix watchdog predicate into a standalone function that
+ *   takes a simulated HAL_GetTick() value and returns whether the watchdog
+ *   should trip. Walk through boot + fault sequences that would have tripped
+ *   the pre-fix code and assert the post-fix code does NOT trip.
+ ******************************************************************************/
+#include <assert.h>
+#include <stdint.h>
+#include <stdio.h>
+
+/* --- Post-fix watchdog state + predicate, extracted verbatim --- */
+static uint32_t last_health_check = 0;
+
+/* Returns 1 iff this call should raise ERROR_WATCHDOG_TIMEOUT.
+   Updates last_health_check BEFORE returning (matches post-fix behaviour). */
+static int health_watchdog_step(uint32_t now_tick)
+{
+    if (last_health_check == 0) {
+        last_health_check = now_tick;   /* cold start: seed only, never trip */
+        return 0;
+    }
+    uint32_t elapsed = now_tick - last_health_check;
+    last_health_check = now_tick;       /* update BEFORE any early return */
+    return (elapsed > 60000) ? 1 : 0;
+}
+
+/* Test helper: reset the static state between scenarios. */
+static void reset_state(void) { last_health_check = 0; }
+
+int main(void)
+{
+    printf("=== Safety fix: checkSystemHealth() watchdog cold-start + stale-ts ===\n");
+
+    /* ---------- Scenario 1: cold-start after 60 s of init must NOT trip ---- */
+    printf("  Test 1: first call at t=75000 ms (post-init) does not trip... ");
+    reset_state();
+    assert(health_watchdog_step(75000) == 0);
+    printf("PASS\n");
+
+    /* ---------- Scenario 2: first call far beyond 60 s (PRE-FIX BUG) ------- */
+    printf("  Test 2: first call at t=600000 ms still does not trip... ");
+    reset_state();
+    assert(health_watchdog_step(600000) == 0);
+    printf("PASS\n");
+
+    /* ---------- Scenario 3: healthy main-loop pacing (10 ms period) -------- */
+    printf("  Test 3: 1000 calls at 10 ms intervals never trip... ");
+    reset_state();
+    (void)health_watchdog_step(1000);  /* seed */
+    for (int i = 1; i <= 1000; i++) {
+        assert(health_watchdog_step(1000 + i * 10) == 0);
+    }
+    printf("PASS\n");
+
+    /* ---------- Scenario 4: stale-timestamp after a burst of early returns -
+       Pre-fix bug: many early returns skipped the timestamp update, so a
+       later clean call would compare `now` against a 60+ s old value. Post-fix,
+       every call (including ones that would have early-returned in the real
+       function) updates the timestamp at the top, so this scenario is modelled
+       by calling health_watchdog_step() on every iteration of the main loop. */
+    printf("  Test 4: 70 s of 100 ms-spaced calls after seed do not trip... ");
+    reset_state();
+    (void)health_watchdog_step(50000);   /* seed mid-run */
+    for (int i = 1; i <= 700; i++) {     /* 70 s @ 100 ms */
+        int tripped = health_watchdog_step(50000 + i * 100);
+        assert(tripped == 0);
+    }
+    printf("PASS\n");
+
+    /* ---------- Scenario 5: genuine stall MUST trip ------------------------ */
+    printf("  Test 5: real 60+ s gap between calls does trip... ");
+    reset_state();
+    (void)health_watchdog_step(10000);              /* seed */
+    assert(health_watchdog_step(10000 + 60001) == 1);
+    printf("PASS\n");
+
+    /* ---------- Scenario 6: exactly 60 s gap is the boundary -- do NOT trip
+       Post-fix predicate uses strict >60000, matching the pre-fix comparator. */
+    printf("  Test 6: exactly 60000 ms gap does not trip (boundary)... ");
+    reset_state();
+    (void)health_watchdog_step(10000);
+    assert(health_watchdog_step(10000 + 60000) == 0);
+    printf("PASS\n");
+
+    /* ---------- Scenario 7: trip, then recover on next paced call ---------- */
+    printf("  Test 7: after a genuine stall+trip, next paced call does not re-trip... ");
+    reset_state();
+    (void)health_watchdog_step(5000);                      /* seed */
+    assert(health_watchdog_step(5000 + 70000) == 1);       /* stall -> trip */
+    assert(health_watchdog_step(5000 + 70000 + 10) == 0);  /* resume paced */
+    printf("PASS\n");
+
+    /* ---------- Scenario 8: HAL_GetTick() 32-bit wrap (~49.7 days) ---------
+       Because we subtract unsigned 32-bit values, wrap is handled correctly as
+       long as the true elapsed time is < 2^32 ms. */
+    printf("  Test 8: tick wrap from 0xFFFFFF00 -> 0x00000064 (200 ms span) does not trip... ");
+    reset_state();
+    (void)health_watchdog_step(0xFFFFFF00u);
+    assert(health_watchdog_step(0x00000064u) == 0);  /* elapsed = 0x164 = 356 ms */
+    printf("PASS\n");
+
+    printf("\n=== Safety fix: ALL TESTS PASSED ===\n\n");
+    return 0;
+}
@@ -0,0 +1,119 @@
+/*******************************************************************************
+ * test_gap3_overtemp_emergency_stop.c
+ *
+ * Safety bug: handleSystemError() did not escalate ERROR_TEMPERATURE_HIGH
+ * (or ERROR_WATCHDOG_TIMEOUT) to Emergency_Stop().
+ *
+ * Before fix:  The critical-error gate was
+ *                if (error >= ERROR_RF_PA_OVERCURRENT &&
+ *                    error <= ERROR_POWER_SUPPLY) { Emergency_Stop(); }
+ *              So overtemp (code 14) and watchdog timeout (code 16) fell
+ *              through to attemptErrorRecovery()'s default branch (log and
+ *              continue), leaving the 10 W GaN PAs biased at >75 °C.
+ *
+ * After fix:   The gate also matches ERROR_TEMPERATURE_HIGH and
+ *              ERROR_WATCHDOG_TIMEOUT, so thermal and watchdog faults
+ *              latch Emergency_Stop() exactly like PA overcurrent.
+ *
+ * Test strategy:
+ *   Replicate the critical-error predicate and assert that every error
+ *   enum value which threatens RF/power safety is accepted, and that the
+ *   non-critical ones (comm, sensor, memory) are not.
+ ******************************************************************************/
+#include <assert.h>
+#include <stdio.h>
+
+/* Mirror of SystemError_t from main.cpp (keep in lockstep). */
+typedef enum {
+    ERROR_NONE = 0,
+    ERROR_AD9523_CLOCK,
+    ERROR_ADF4382_TX_UNLOCK,
+    ERROR_ADF4382_RX_UNLOCK,
+    ERROR_ADAR1000_COMM,
+    ERROR_ADAR1000_TEMP,
+    ERROR_IMU_COMM,
+    ERROR_BMP180_COMM,
+    ERROR_GPS_COMM,
+    ERROR_RF_PA_OVERCURRENT,
+    ERROR_RF_PA_BIAS,
+    ERROR_STEPPER_MOTOR,
+    ERROR_FPGA_COMM,
+    ERROR_POWER_SUPPLY,
+    ERROR_TEMPERATURE_HIGH,
+    ERROR_MEMORY_ALLOC,
+    ERROR_WATCHDOG_TIMEOUT
+} SystemError_t;
+
+/* Extracted post-fix predicate: returns 1 when Emergency_Stop() must fire. */
+static int triggers_emergency_stop(SystemError_t e)
+{
+    return ((e >= ERROR_RF_PA_OVERCURRENT && e <= ERROR_POWER_SUPPLY) ||
+            e == ERROR_TEMPERATURE_HIGH ||
+            e == ERROR_WATCHDOG_TIMEOUT);
+}
+
+int main(void)
+{
+    printf("=== Safety fix: overtemp / watchdog -> Emergency_Stop() ===\n");
+
+    /* --- Errors that MUST latch Emergency_Stop --- */
+    printf("  Test 1: ERROR_RF_PA_OVERCURRENT triggers... ");
+    assert(triggers_emergency_stop(ERROR_RF_PA_OVERCURRENT));
+    printf("PASS\n");
+
+    printf("  Test 2: ERROR_RF_PA_BIAS triggers... ");
+    assert(triggers_emergency_stop(ERROR_RF_PA_BIAS));
+    printf("PASS\n");
+
+    printf("  Test 3: ERROR_STEPPER_MOTOR triggers... ");
+    assert(triggers_emergency_stop(ERROR_STEPPER_MOTOR));
+    printf("PASS\n");
+
+    printf("  Test 4: ERROR_FPGA_COMM triggers... ");
+    assert(triggers_emergency_stop(ERROR_FPGA_COMM));
+    printf("PASS\n");
+
+    printf("  Test 5: ERROR_POWER_SUPPLY triggers... ");
+    assert(triggers_emergency_stop(ERROR_POWER_SUPPLY));
+    printf("PASS\n");
+
+    printf("  Test 6: ERROR_TEMPERATURE_HIGH triggers (regression)... ");
+    assert(triggers_emergency_stop(ERROR_TEMPERATURE_HIGH));
+    printf("PASS\n");
+
+    printf("  Test 7: ERROR_WATCHDOG_TIMEOUT triggers (regression)... ");
+    assert(triggers_emergency_stop(ERROR_WATCHDOG_TIMEOUT));
+    printf("PASS\n");
+
+    /* --- Errors that MUST NOT escalate (recoverable / informational) --- */
+    printf("  Test 8: ERROR_NONE does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_NONE));
+    printf("PASS\n");
+
+    printf("  Test 9: ERROR_AD9523_CLOCK does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_AD9523_CLOCK));
+    printf("PASS\n");
+
+    printf("  Test 10: ERROR_ADF4382_TX_UNLOCK does not trigger (recoverable)... ");
+    assert(!triggers_emergency_stop(ERROR_ADF4382_TX_UNLOCK));
+    printf("PASS\n");
+
+    printf("  Test 11: ERROR_ADAR1000_COMM does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_ADAR1000_COMM));
+    printf("PASS\n");
+
+    printf("  Test 12: ERROR_IMU_COMM does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_IMU_COMM));
+    printf("PASS\n");
+
+    printf("  Test 13: ERROR_GPS_COMM does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_GPS_COMM));
+    printf("PASS\n");
+
+    printf("  Test 14: ERROR_MEMORY_ALLOC does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_MEMORY_ALLOC));
+    printf("PASS\n");
+
+    printf("\n=== Safety fix: ALL TESTS PASSED ===\n\n");
+    return 0;
+}
@@ -0,0 +1,853 @@
+/*******************************************************************************
+ * test_um982_gps.c -- Unit tests for UM982 GPS driver
+ *
+ * Tests NMEA parsing, checksum validation, coordinate parsing, init sequence,
+ * and validity tracking. Uses the mock HAL infrastructure for UART.
+ *
+ * Build: see Makefile target test_um982_gps
+ * Run:   ./test_um982_gps
+ ******************************************************************************/
+#include "stm32_hal_mock.h"
+#include "../9_1_3_C_Cpp_Code/um982_gps.h"
+#include "../9_1_3_C_Cpp_Code/um982_gps.c"  /* Include .c directly for white-box testing */
+
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+#include <math.h>
+
+/* ========================= Test helpers ============================== */
+
+static int tests_passed = 0;
+static int tests_failed = 0;
+
+#define TEST(name) \
+    do { printf("  [TEST] %-55s ", name); } while(0)
+
+#define PASS() \
+    do { printf("PASS\n"); tests_passed++; } while(0)
+
+#define FAIL(msg) \
+    do { printf("FAIL: %s\n", msg); tests_failed++; } while(0)
+
+#define ASSERT_TRUE(expr, msg) \
+    do { if (!(expr)) { FAIL(msg); return; } } while(0)
+
+#define ASSERT_FALSE(expr, msg) \
+    do { if (expr) { FAIL(msg); return; } } while(0)
+
+#define ASSERT_EQ_INT(a, b, msg) \
+    do { if ((a) != (b)) { \
+        char _buf[256]; \
+        snprintf(_buf, sizeof(_buf), "%s (got %d, expected %d)", msg, (int)(a), (int)(b)); \
+        FAIL(_buf); return; \
+    } } while(0)
+
+#define ASSERT_NEAR(a, b, tol, msg) \
+    do { if (fabs((double)(a) - (double)(b)) > (tol)) { \
+        char _buf[256]; \
+        snprintf(_buf, sizeof(_buf), "%s (got %.8f, expected %.8f)", msg, (double)(a), (double)(b)); \
+        FAIL(_buf); return; \
+    } } while(0)
+
+#define ASSERT_NAN(val, msg) \
+    do { if (!isnan(val)) { FAIL(msg); return; } } while(0)
+
+static UM982_GPS_t gps;
+
+static void reset_gps(void)
+{
+    spy_reset();
+    memset(&gps, 0, sizeof(gps));
+    gps.huart = &huart5;
+    gps.heading = NAN;
+    gps.heading_mode = 'V';
+    gps.rmc_status = 'V';
+}
+
+/* ========================= Checksum tests ============================ */
+
+static void test_checksum_valid(void)
+{
+    TEST("checksum: valid GGA");
+    ASSERT_TRUE(um982_verify_checksum(
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47"),
+        "should be valid");
+    PASS();
+}
+
+static void test_checksum_valid_ths(void)
+{
+    TEST("checksum: valid THS");
+    ASSERT_TRUE(um982_verify_checksum("$GNTHS,341.3344,A*1F"),
+        "should be valid");
+    PASS();
+}
+
+static void test_checksum_invalid(void)
+{
+    TEST("checksum: invalid (wrong value)");
+    ASSERT_FALSE(um982_verify_checksum("$GNTHS,341.3344,A*FF"),
+        "should be invalid");
+    PASS();
+}
+
+static void test_checksum_missing_star(void)
+{
+    TEST("checksum: missing * marker");
+    ASSERT_FALSE(um982_verify_checksum("$GNTHS,341.3344,A"),
+        "should be invalid");
+    PASS();
+}
+
+static void test_checksum_null(void)
+{
+    TEST("checksum: NULL input");
+    ASSERT_FALSE(um982_verify_checksum(NULL), "should be false");
+    PASS();
+}
+
+static void test_checksum_no_dollar(void)
+{
+    TEST("checksum: missing $ prefix");
+    ASSERT_FALSE(um982_verify_checksum("GNTHS,341.3344,A*1F"),
+        "should be invalid without $");
+    PASS();
+}
+
+/* ========================= Coordinate parsing tests ================== */
+
+static void test_coord_latitude_north(void)
+{
+    TEST("coord: latitude 4404.14036 N");
+    double lat = um982_parse_coord("4404.14036", 'N');
+    /* 44 + 04.14036/60 = 44.069006 */
+    ASSERT_NEAR(lat, 44.069006, 0.000001, "latitude");
+    PASS();
+}
+
+static void test_coord_latitude_south(void)
+{
+    TEST("coord: latitude 3358.92500 S (negative)");
+    double lat = um982_parse_coord("3358.92500", 'S');
+    ASSERT_TRUE(lat < 0.0, "should be negative for S");
+    ASSERT_NEAR(lat, -(33.0 + 58.925/60.0), 0.000001, "latitude");
+    PASS();
+}
+
+static void test_coord_longitude_3digit(void)
+{
+    TEST("coord: longitude 12118.85961 W (3-digit degrees)");
+    double lon = um982_parse_coord("12118.85961", 'W');
+    /* 121 + 18.85961/60 = 121.314327 */
+    ASSERT_TRUE(lon < 0.0, "should be negative for W");
+    ASSERT_NEAR(lon, -(121.0 + 18.85961/60.0), 0.000001, "longitude");
+    PASS();
+}
+
+static void test_coord_longitude_east(void)
+{
+    TEST("coord: longitude 11614.19729 E");
+    double lon = um982_parse_coord("11614.19729", 'E');
+    ASSERT_TRUE(lon > 0.0, "should be positive for E");
+    ASSERT_NEAR(lon, 116.0 + 14.19729/60.0, 0.000001, "longitude");
+    PASS();
+}
+
+static void test_coord_empty(void)
+{
+    TEST("coord: empty string returns NAN");
+    ASSERT_NAN(um982_parse_coord("", 'N'), "should be NAN");
+    PASS();
+}
+
+static void test_coord_null(void)
+{
+    TEST("coord: NULL returns NAN");
+    ASSERT_NAN(um982_parse_coord(NULL, 'N'), "should be NAN");
+    PASS();
+}
+
+static void test_coord_no_dot(void)
+{
+    TEST("coord: no decimal point returns NAN");
+    ASSERT_NAN(um982_parse_coord("440414036", 'N'), "should be NAN");
+    PASS();
+}
+
+/* ========================= GGA parsing tests ========================= */
+
+static void test_parse_gga_full(void)
+{
+    TEST("GGA: full sentence with all fields");
+    reset_gps();
+    mock_set_tick(1000);
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_NEAR(gps.latitude, 44.069006, 0.0001, "latitude");
+    ASSERT_NEAR(gps.longitude, -(121.0 + 18.85961/60.0), 0.0001, "longitude");
+    ASSERT_EQ_INT(gps.fix_quality, 1, "fix quality");
+    ASSERT_EQ_INT(gps.num_satellites, 12, "num sats");
+    ASSERT_NEAR(gps.hdop, 0.98, 0.01, "hdop");
+    ASSERT_NEAR(gps.altitude, 1113.0, 0.1, "altitude");
+    ASSERT_NEAR(gps.geoid_sep, -21.3, 0.1, "geoid sep");
+    PASS();
+}
+
+static void test_parse_gga_rtk_fixed(void)
+{
+    TEST("GGA: RTK fixed (quality=4)");
+    reset_gps();
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,023634.00,4004.73871635,N,11614.19729418,E,4,28,0.7,61.0988,M,-8.4923,M,,*5D");
+
+    ASSERT_EQ_INT(gps.fix_quality, 4, "RTK fixed");
+    ASSERT_EQ_INT(gps.num_satellites, 28, "num sats");
+    ASSERT_NEAR(gps.latitude, 40.0 + 4.73871635/60.0, 0.0000001, "latitude");
+    ASSERT_NEAR(gps.longitude, 116.0 + 14.19729418/60.0, 0.0000001, "longitude");
+    PASS();
+}
+
+static void test_parse_gga_no_fix(void)
+{
+    TEST("GGA: no fix (quality=0)");
+    reset_gps();
+
+    /* Compute checksum for this sentence */
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    ASSERT_EQ_INT(gps.fix_quality, 0, "no fix");
+    PASS();
+}
+
+/* ========================= RMC parsing tests ========================= */
+
+static void test_parse_rmc_valid(void)
+{
+    TEST("RMC: valid position and speed");
+    reset_gps();
+    mock_set_tick(2000);
+
+    um982_parse_sentence(&gps,
+        "$GNRMC,001031.00,A,4404.13993,N,12118.86023,W,0.146,,100117,,,A*7B");
+
+    ASSERT_EQ_INT(gps.rmc_status, 'A', "status");
+    ASSERT_NEAR(gps.latitude, 44.0 + 4.13993/60.0, 0.0001, "latitude");
+    ASSERT_NEAR(gps.longitude, -(121.0 + 18.86023/60.0), 0.0001, "longitude");
+    ASSERT_NEAR(gps.speed_knots, 0.146, 0.001, "speed");
+    PASS();
+}
+
+static void test_parse_rmc_void(void)
+{
+    TEST("RMC: void status (no valid fix)");
+    reset_gps();
+    gps.latitude = 12.34;  /* Pre-set to check it doesn't get overwritten */
+
+    um982_parse_sentence(&gps,
+        "$GNRMC,235959.00,V,,,,,,,100117,,,N*64");
+
+    ASSERT_EQ_INT(gps.rmc_status, 'V', "void status");
+    ASSERT_NEAR(gps.latitude, 12.34, 0.001, "lat should not change on void");
+    PASS();
+}
+
+/* ========================= THS parsing tests ========================= */
+
+static void test_parse_ths_autonomous(void)
+{
+    TEST("THS: autonomous heading 341.3344");
+    reset_gps();
+    mock_set_tick(3000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    ASSERT_NEAR(gps.heading, 341.3344, 0.001, "heading");
+    ASSERT_EQ_INT(gps.heading_mode, 'A', "mode");
+    PASS();
+}
+
+static void test_parse_ths_not_valid(void)
+{
+    TEST("THS: not valid mode");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GNTHS,,V*10");
+
+    ASSERT_NAN(gps.heading, "heading should be NAN when empty");
+    ASSERT_EQ_INT(gps.heading_mode, 'V', "mode V");
+    PASS();
+}
+
+static void test_parse_ths_zero(void)
+{
+    TEST("THS: heading exactly 0.0000");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GNTHS,0.0000,A*19");
+
+    ASSERT_NEAR(gps.heading, 0.0, 0.001, "heading zero");
+    ASSERT_EQ_INT(gps.heading_mode, 'A', "mode A");
+    PASS();
+}
+
+static void test_parse_ths_360_boundary(void)
+{
+    TEST("THS: heading near 360");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GNTHS,359.9999,D*13");
+
+    ASSERT_NEAR(gps.heading, 359.9999, 0.001, "heading near 360");
+    ASSERT_EQ_INT(gps.heading_mode, 'D', "mode D");
+    PASS();
+}
+
+/* ========================= VTG parsing tests ========================= */
+
+static void test_parse_vtg(void)
+{
+    TEST("VTG: course and speed");
+    reset_gps();
+
+    um982_parse_sentence(&gps,
+        "$GPVTG,220.86,T,,M,2.550,N,4.724,K,A*34");
+
+    ASSERT_NEAR(gps.course_true, 220.86, 0.01, "course");
+    ASSERT_NEAR(gps.speed_knots, 2.550, 0.001, "speed knots");
+    ASSERT_NEAR(gps.speed_kmh, 4.724, 0.001, "speed kmh");
+    PASS();
+}
+
+/* ========================= Talker ID tests =========================== */
+
+static void test_talker_gp(void)
+{
+    TEST("talker: GP prefix parses correctly");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GPTHS,123.4567,A*07");
+
+    ASSERT_NEAR(gps.heading, 123.4567, 0.001, "heading with GP");
+    PASS();
+}
+
+static void test_talker_gl(void)
+{
+    TEST("talker: GL prefix parses correctly");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GLTHS,123.4567,A*1B");
+
+    ASSERT_NEAR(gps.heading, 123.4567, 0.001, "heading with GL");
+    PASS();
+}
+
+/* ========================= Feed / line assembly tests ================ */
+
+static void test_feed_single_sentence(void)
+{
+    TEST("feed: single complete sentence with CRLF");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *data = "$GNTHS,341.3344,A*1F\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_NEAR(gps.heading, 341.3344, 0.001, "heading");
+    PASS();
+}
+
+static void test_feed_multiple_sentences(void)
+{
+    TEST("feed: multiple sentences in one chunk");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *data =
+        "$GNTHS,100.0000,A*18\r\n"
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_NEAR(gps.heading, 100.0, 0.01, "heading from THS");
+    ASSERT_EQ_INT(gps.fix_quality, 1, "fix from GGA");
+    PASS();
+}
+
+static void test_feed_partial_then_complete(void)
+{
+    TEST("feed: partial bytes then complete");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *part1 = "$GNTHS,200.";
+    const char *part2 = "5000,A*1E\r\n";
+    um982_feed(&gps, (const uint8_t *)part1, (uint16_t)strlen(part1));
+    /* Heading should not be set yet */
+    ASSERT_NAN(gps.heading, "should be NAN before complete");
+
+    um982_feed(&gps, (const uint8_t *)part2, (uint16_t)strlen(part2));
+    ASSERT_NEAR(gps.heading, 200.5, 0.01, "heading after complete");
+    PASS();
+}
+
+static void test_feed_bad_checksum_rejected(void)
+{
+    TEST("feed: bad checksum sentence is rejected");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *data = "$GNTHS,999.0000,A*FF\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_NAN(gps.heading, "heading should remain NAN");
+    PASS();
+}
+
+static void test_feed_versiona_response(void)
+{
+    TEST("feed: VERSIONA response sets flag");
+    reset_gps();
+
+    const char *data = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_TRUE(gps.version_received, "version_received should be true");
+    ASSERT_TRUE(gps.initialized, "VERSIONA should mark communication alive");
+    PASS();
+}
+
+/* ========================= Validity / age tests ====================== */
+
+static void test_heading_valid_within_timeout(void)
+{
+    TEST("validity: heading valid within timeout");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    /* Still at tick 10000 */
+    ASSERT_TRUE(um982_is_heading_valid(&gps), "should be valid");
+    PASS();
+}
+
+static void test_heading_invalid_after_timeout(void)
+{
+    TEST("validity: heading invalid after 2s timeout");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    /* Advance past timeout */
+    mock_set_tick(12500);
+    ASSERT_FALSE(um982_is_heading_valid(&gps), "should be invalid after 2.5s");
+    PASS();
+}
+
+static void test_heading_invalid_mode_v(void)
+{
+    TEST("validity: heading invalid with mode V");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,,V*10");
+
+    ASSERT_FALSE(um982_is_heading_valid(&gps), "mode V is invalid");
+    PASS();
+}
+
+static void test_position_valid(void)
+{
+    TEST("validity: position valid with fix quality 1");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_TRUE(um982_is_position_valid(&gps), "should be valid");
+    PASS();
+}
+
+static void test_position_invalid_no_fix(void)
+{
+    TEST("validity: position invalid with no fix");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    ASSERT_FALSE(um982_is_position_valid(&gps), "no fix = invalid");
+    PASS();
+}
+
+static void test_position_age_uses_last_valid_fix(void)
+{
+    TEST("age: position age uses last valid fix, not no-fix GGA");
+    reset_gps();
+
+    mock_set_tick(10000);
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    mock_set_tick(12000);
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    mock_set_tick(12500);
+    ASSERT_EQ_INT(um982_position_age(&gps), 2500, "age should still be from last valid fix");
+    ASSERT_FALSE(um982_is_position_valid(&gps), "latest no-fix GGA should invalidate position");
+    PASS();
+}
+
+static void test_heading_age(void)
+{
+    TEST("age: heading age computed correctly");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    mock_set_tick(10500);
+    uint32_t age = um982_heading_age(&gps);
+    ASSERT_EQ_INT(age, 500, "age should be 500ms");
+    PASS();
+}
+
+/* ========================= Send command tests ======================== */
+
+static void test_send_command_appends_crlf(void)
+{
+    TEST("send_command: appends \\r\\n");
+    reset_gps();
+
+    um982_send_command(&gps, "GPGGA COM2 1");
+
+    /* Check that TX buffer contains "GPGGA COM2 1\r\n" */
+    const char *expected = "GPGGA COM2 1\r\n";
+    ASSERT_TRUE(mock_uart_tx_len == strlen(expected), "TX length");
+    ASSERT_TRUE(memcmp(mock_uart_tx_buf, expected, strlen(expected)) == 0,
+        "TX content should be 'GPGGA COM2 1\\r\\n'");
+    PASS();
+}
+
+static void test_send_command_null_safety(void)
+{
+    TEST("send_command: NULL gps returns false");
+    ASSERT_FALSE(um982_send_command(NULL, "RESET"), "should return false");
+    PASS();
+}
+
+/* ========================= Init sequence tests ======================= */
+
+static void test_init_sends_correct_commands(void)
+{
+    TEST("init: sends correct command sequence");
+    spy_reset();
+    mock_uart_tx_clear();
+
+    /* Pre-load VERSIONA response so init succeeds */
+    const char *ver_resp = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
+    mock_uart_rx_load(&huart5, (const uint8_t *)ver_resp, (uint16_t)strlen(ver_resp));
+
+    UM982_GPS_t init_gps;
+    bool ok = um982_init(&init_gps, &huart5, 50.0f, 3.0f);
+
+    ASSERT_TRUE(ok, "init should succeed");
+    ASSERT_TRUE(init_gps.initialized, "should be initialized");
+
+    /* Verify TX buffer contains expected commands */
+    const char *tx = (const char *)mock_uart_tx_buf;
+    ASSERT_TRUE(strstr(tx, "UNLOG\r\n") != NULL, "should send UNLOG");
+    ASSERT_TRUE(strstr(tx, "CONFIG HEADING FIXLENGTH\r\n") != NULL, "should send CONFIG HEADING");
+    ASSERT_TRUE(strstr(tx, "CONFIG HEADING LENGTH 50 3\r\n") != NULL, "should send LENGTH");
+    ASSERT_TRUE(strstr(tx, "GPGGA COM2 1\r\n") != NULL, "should enable GGA");
+    ASSERT_TRUE(strstr(tx, "GPRMC COM2 1\r\n") != NULL, "should enable RMC");
+    ASSERT_TRUE(strstr(tx, "GPTHS COM2 0.2\r\n") != NULL, "should enable THS at 5Hz");
+    ASSERT_TRUE(strstr(tx, "SAVECONFIG\r\n") == NULL, "should NOT save config (NVM wear)");
+    ASSERT_TRUE(strstr(tx, "VERSIONA\r\n") != NULL, "should query version");
+
+    /* Verify command order: UNLOG should come before GPGGA */
+    const char *unlog_pos = strstr(tx, "UNLOG\r\n");
+    const char *gpgga_pos = strstr(tx, "GPGGA COM2 1\r\n");
+    ASSERT_TRUE(unlog_pos < gpgga_pos, "UNLOG should precede GPGGA");
+
+    PASS();
+}
+
+static void test_init_no_baseline(void)
+{
+    TEST("init: baseline=0 skips LENGTH command");
+    spy_reset();
+    mock_uart_tx_clear();
+
+    const char *ver_resp = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
+    mock_uart_rx_load(&huart5, (const uint8_t *)ver_resp, (uint16_t)strlen(ver_resp));
+
+    UM982_GPS_t init_gps;
+    um982_init(&init_gps, &huart5, 0.0f, 0.0f);
+
+    const char *tx = (const char *)mock_uart_tx_buf;
+    ASSERT_TRUE(strstr(tx, "CONFIG HEADING LENGTH") == NULL, "should NOT send LENGTH");
+    PASS();
+}
+
+static void test_init_fails_no_version(void)
+{
+    TEST("init: fails if no VERSIONA response");
+    spy_reset();
+    mock_uart_tx_clear();
+
+    /* Don't load any RX data — init should timeout */
+    UM982_GPS_t init_gps;
+    bool ok = um982_init(&init_gps, &huart5, 50.0f, 3.0f);
+
+    ASSERT_FALSE(ok, "init should fail without version response");
+    ASSERT_FALSE(init_gps.initialized, "should not be initialized");
+    PASS();
+}
+
+static void test_nmea_traffic_sets_initialized_without_versiona(void)
+{
+    TEST("init state: supported NMEA traffic sets initialized");
+    reset_gps();
+
+    ASSERT_FALSE(gps.initialized, "should start uninitialized");
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+    ASSERT_TRUE(gps.initialized, "supported NMEA should mark communication alive");
+    PASS();
+}
+
+/* ========================= Edge case tests =========================== */
+
+static void test_empty_fields_handled(void)
+{
+    TEST("edge: GGA with empty lat/lon fields");
+    reset_gps();
+    gps.latitude = 99.99;
+    gps.longitude = 99.99;
+
+    /* GGA with empty position fields (no fix) */
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    ASSERT_EQ_INT(gps.fix_quality, 0, "no fix");
+    /* Latitude/longitude should not be updated (fields are empty) */
+    ASSERT_NEAR(gps.latitude, 99.99, 0.01, "lat unchanged");
+    ASSERT_NEAR(gps.longitude, 99.99, 0.01, "lon unchanged");
+    PASS();
+}
+
+static void test_sentence_too_short(void)
+{
+    TEST("edge: sentence too short to have formatter");
+    reset_gps();
+    /* Should not crash */
+    um982_parse_sentence(&gps, "$GN");
+    um982_parse_sentence(&gps, "$");
+    um982_parse_sentence(&gps, "");
+    um982_parse_sentence(&gps, NULL);
+    PASS();
+}
+
+static void test_line_overflow(void)
+{
+    TEST("edge: oversized line is dropped");
+    reset_gps();
+
+    /* Create a line longer than UM982_LINE_BUF_SIZE */
+    char big[200];
+    memset(big, 'X', sizeof(big));
+    big[0] = '$';
+    big[198] = '\n';
+    big[199] = '\0';
+
+    um982_feed(&gps, (const uint8_t *)big, 199);
+    /* Should not crash, heading should still be NAN */
+    ASSERT_NAN(gps.heading, "no valid data from overflow");
+    PASS();
+}
+
+static void test_process_via_mock_uart(void)
+{
+    TEST("process: reads from mock UART RX buffer");
+    reset_gps();
+    mock_set_tick(5000);
+
+    /* Load data into mock UART RX */
+    const char *data = "$GNTHS,275.1234,D*18\r\n";
+    mock_uart_rx_load(&huart5, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    /* Call process() which reads from UART */
+    um982_process(&gps);
+
+    ASSERT_NEAR(gps.heading, 275.1234, 0.001, "heading via process()");
+    ASSERT_EQ_INT(gps.heading_mode, 'D', "mode D");
+    PASS();
+}
+
+/* ========================= PR #68 bug regression tests =============== */
+
+/* These tests specifically verify the bugs found in the reverted PR #68 */
+
+static void test_regression_sentence_id_with_gn_prefix(void)
+{
+    TEST("regression: GN-prefixed GGA is correctly identified");
+    reset_gps();
+
+    /* PR #68 bug: strncmp(sentence, "GGA", 3) compared "GNG" vs "GGA" — never matched.
+     * Our fix: skip 2-char talker ID, compare at sentence+3. */
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_EQ_INT(gps.fix_quality, 1, "GGA should parse with GN prefix");
+    ASSERT_NEAR(gps.latitude, 44.069006, 0.001, "latitude should be parsed");
+    PASS();
+}
+
+static void test_regression_longitude_3digit_degrees(void)
+{
+    TEST("regression: 3-digit longitude degrees parsed correctly");
+    reset_gps();
+
+    /* PR #68 bug: hardcoded 2-digit degrees for longitude.
+     * 12118.85961 should be 121° 18.85961' = 121.314327° */
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_NEAR(gps.longitude, -(121.0 + 18.85961/60.0), 0.0001,
+        "longitude 121° should not be parsed as 12°");
+    ASSERT_TRUE(gps.longitude < -100.0, "longitude should be > 100 degrees");
+    PASS();
+}
+
+static void test_regression_hemisphere_no_ptr_corrupt(void)
+{
+    TEST("regression: hemisphere parsing doesn't corrupt field pointer");
+    reset_gps();
+
+    /* PR #68 bug: GGA/RMC hemisphere cases manually advanced ptr,
+     * desynchronizing from field counter. Our parser uses proper tokenizer. */
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    /* After lat/lon, remaining fields should be correct */
+    ASSERT_EQ_INT(gps.num_satellites, 12, "sats after hemisphere");
+    ASSERT_NEAR(gps.hdop, 0.98, 0.01, "hdop after hemisphere");
+    ASSERT_NEAR(gps.altitude, 1113.0, 0.1, "altitude after hemisphere");
+    PASS();
+}
+
+static void test_regression_rmc_also_parsed(void)
+{
+    TEST("regression: RMC sentence is actually parsed (not dead code)");
+    reset_gps();
+
+    /* PR #68 bug: identifySentence never matched GGA/RMC, so position
+     * parsing was dead code. */
+    um982_parse_sentence(&gps,
+        "$GNRMC,001031.00,A,4404.13993,N,12118.86023,W,0.146,,100117,,,A*7B");
+
+    ASSERT_TRUE(gps.latitude > 44.0, "RMC lat should be parsed");
+    ASSERT_TRUE(gps.longitude < -121.0, "RMC lon should be parsed");
+    ASSERT_NEAR(gps.speed_knots, 0.146, 0.001, "RMC speed");
+    PASS();
+}
+
+/* ========================= Main ====================================== */
+
+int main(void)
+{
+    printf("=== UM982 GPS Driver Tests ===\n\n");
+
+    printf("--- Checksum ---\n");
+    test_checksum_valid();
+    test_checksum_valid_ths();
+    test_checksum_invalid();
+    test_checksum_missing_star();
+    test_checksum_null();
+    test_checksum_no_dollar();
+
+    printf("\n--- Coordinate Parsing ---\n");
+    test_coord_latitude_north();
+    test_coord_latitude_south();
+    test_coord_longitude_3digit();
+    test_coord_longitude_east();
+    test_coord_empty();
+    test_coord_null();
+    test_coord_no_dot();
+
+    printf("\n--- GGA Parsing ---\n");
+    test_parse_gga_full();
+    test_parse_gga_rtk_fixed();
+    test_parse_gga_no_fix();
+
+    printf("\n--- RMC Parsing ---\n");
+    test_parse_rmc_valid();
+    test_parse_rmc_void();
+
+    printf("\n--- THS Parsing ---\n");
+    test_parse_ths_autonomous();
+    test_parse_ths_not_valid();
+    test_parse_ths_zero();
+    test_parse_ths_360_boundary();
+
+    printf("\n--- VTG Parsing ---\n");
+    test_parse_vtg();
+
+    printf("\n--- Talker IDs ---\n");
+    test_talker_gp();
+    test_talker_gl();
+
+    printf("\n--- Feed / Line Assembly ---\n");
+    test_feed_single_sentence();
+    test_feed_multiple_sentences();
+    test_feed_partial_then_complete();
+    test_feed_bad_checksum_rejected();
+    test_feed_versiona_response();
+
+    printf("\n--- Validity / Age ---\n");
+    test_heading_valid_within_timeout();
+    test_heading_invalid_after_timeout();
+    test_heading_invalid_mode_v();
+    test_position_valid();
+    test_position_invalid_no_fix();
+    test_position_age_uses_last_valid_fix();
+    test_heading_age();
+
+    printf("\n--- Send Command ---\n");
+    test_send_command_appends_crlf();
+    test_send_command_null_safety();
+
+    printf("\n--- Init Sequence ---\n");
+    test_init_sends_correct_commands();
+    test_init_no_baseline();
+    test_init_fails_no_version();
+    test_nmea_traffic_sets_initialized_without_versiona();
+
+    printf("\n--- Edge Cases ---\n");
+    test_empty_fields_handled();
+    test_sentence_too_short();
+    test_line_overflow();
+    test_process_via_mock_uart();
+
+    printf("\n--- PR #68 Regression ---\n");
+    test_regression_sentence_id_with_gn_prefix();
+    test_regression_longitude_3digit_degrees();
+    test_regression_hemisphere_no_ptr_corrupt();
+    test_regression_rmc_also_parsed();
+
+    printf("\n===============================================\n");
+    printf("  Results: %d passed, %d failed (of %d total)\n",
+           tests_passed, tests_failed, tests_passed + tests_failed);
+    printf("===============================================\n");
+
+    return tests_failed > 0 ? 1 : 0;
+}
@@ -212,6 +212,11 @@ BUFG bufg_feedback (

 // ---- Output BUFG ----
 // Routes the jitter-cleaned 400 MHz CLKOUT0 onto a global clock network.
+// DONT_TOUCH prevents phys_opt_design AggressiveExplore from replicating this
+// BUFG into a cascaded chain (4 BUFGs in series observed in Build 26), which
+// added ~243ps of clock insertion delay and caused -187ps clock skew on the
+// NCO→DSP mixer critical path.
+(* DONT_TOUCH = "TRUE" *)
 BUFG bufg_clk400m (
    .I(clk_mmcm_out0),
    .O(clk_400m_out)
@@ -66,13 +66,13 @@ reg signed [COMB_WIDTH-1:0] comb_delay [0:STAGES-1][0:COMB_DELAY-1];
 // Pipeline valid for comb stages 1-4: delayed by 1 cycle vs comb_pipe to
 // account for CREG+AREG+BREG pipeline inside comb_0_dsp (explicit DSP48E1).
 // Comb[0] result appears 1 cycle after data_valid_comb_pipe.
-(* keep = "true", max_fanout = 4 *) reg data_valid_comb_0_out;
+(* keep = "true", max_fanout = 16 *) reg data_valid_comb_0_out;

 // Enhanced control and monitoring
 reg [1:0] decimation_counter;
-(* keep = "true", max_fanout = 4 *) reg data_valid_delayed;
-(* keep = "true", max_fanout = 4 *) reg data_valid_comb;
-(* keep = "true", max_fanout = 4 *) reg data_valid_comb_pipe;
+(* keep = "true", max_fanout = 16 *) reg data_valid_delayed;
+(* keep = "true", max_fanout = 16 *) reg data_valid_comb;
+(* keep = "true", max_fanout = 16 *) reg data_valid_comb_pipe;
 reg [7:0] output_counter;
 reg [ACC_WIDTH-1:0] max_integrator_value;
 reg overflow_detected;
@@ -4,19 +4,19 @@

 | File | Device | Package | Purpose |
 |------|--------|---------|---------|
-| `xc7a50t_ftg256.xdc` | XC7A50T-2FTG256I | FTG256 (256-ball BGA) | Upstream author's board (copy of `cntrt.xdc`) |
-| `xc7a200t_fbg484.xdc` | XC7A200T-2FBG484I | FBG484 (484-ball BGA) | Production board (new PCB design) |
+| `xc7a50t_ftg256.xdc` | XC7A50T-2FTG256I | FTG256 (256-ball BGA) | 50T production board |
+| `xc7a200t_fbg484.xdc` | XC7A200T-2FBG484I | FBG484 (484-ball BGA) | 200T premium dev board |
 | `te0712_te0701_minimal.xdc` | XC7A200T-2FBG484I | FBG484 (484-ball BGA) | Trenz dev split target (minimal clock/reset + LEDs/status) |
 | `te0713_te0701_minimal.xdc` | XC7A200T-2FBG484C | FBG484 (484-ball BGA) | Trenz alternate SoM target (minimal clock + FMC status outputs) |

 ## Why Four Files

-The upstream prototype uses a smaller XC7A50T in an FTG256 package. The production
-AERIS-10 radar migrates to the XC7A200T for more logic, BRAM, and DSP resources.
-The two devices have completely different packages and pin names, so each needs its
-own constraint file.
+The 50T production board uses an XC7A50T in an FTG256 package. The 200T premium
+dev board uses an XC7A200T for more logic, BRAM, and DSP resources. The two
+devices have completely different packages and pin names, so each needs its own
+constraint file.

-The Trenz TE0712/TE0701 path uses the same FPGA part as production but different board
+The Trenz TE0712/TE0701 path uses the same FPGA part as the 200T but different board
 pinout and peripherals. The dev target is split into its own top wrapper
 (`radar_system_top_te0712_dev.v`) and minimal constraints file to avoid accidental mixing
 of production pin assignments during bring-up.
@@ -25,9 +25,83 @@ The Trenz TE0713/TE0701 path supports situations where TE0712 lead time is prohi
 TE0713 uses XC7A200T-2FBG484C (commercial temp grade) and requires separate clock mapping,
 so it has its own dev top and XDC.

+## USB Interface Architecture (USB_MODE)
+
+The radar system supports two USB data interfaces, selected at **compile time** via
+the `USB_MODE` parameter in `radar_system_top.v`:
+
+| USB_MODE | Interface | Bus Width | Speed | Board Target |
+|----------|-----------|-----------|-------|--------------|
+| 0 (default) | FT601 (USB 3.0) | 32-bit | 100 MHz | 200T premium dev board |
+| 1 | FT2232H (USB 2.0) | 8-bit | 60 MHz | 50T production board |
+
+### How USB_MODE Works
+
+`radar_system_top.v` contains a Verilog `generate` block that instantiates exactly
+one USB interface module based on the `USB_MODE` parameter:
+
+```
+generate
+if (USB_MODE == 0) begin : gen_ft601
+    usb_data_interface usb_inst (...)          // FT601, 32-bit
+    // FT2232H ports tied off to inactive
+end else begin : gen_ft2232h
+    usb_data_interface_ft2232h usb_inst (...)  // FT2232H, 8-bit
+    // FT601 ports tied off to inactive
+end
+endgenerate
+```
+
+Both interfaces share the same internal radar data bus and host command interface.
+The unused interface's I/O pins are tied to safe inactive states (active-low
+signals high, active-high signals low, bidirectional buses high-Z).
+
+### How USB_MODE Is Passed Per Board Target
+
+The parameter is set via a **wrapper module** that overrides the default:
+
+- **50T production**: `radar_system_top_50t.v` instantiates the core with
+  `.USB_MODE(1)` and maps the FT2232H's 60 MHz `CLKOUT` to the shared
+  `ft601_clk_in` port. FT601 inputs are tied inactive; outputs go to `_nc` wires.
+
+  ```verilog
+  // In radar_system_top_50t.v:
+  radar_system_top #(
+      .USB_MODE(1)
+  ) u_core ( ... );
+  ```
+
+- **200T dev board**: `radar_system_top` is used directly as the top module.
+  `USB_MODE` defaults to `0` (FT601). No wrapper needed.
+
+### RTL Files by USB Interface
+
+| File | Purpose |
+|------|---------|
+| `usb_data_interface.v` | FT601 USB 3.0 module (32-bit, USB_MODE=0) |
+| `usb_data_interface_ft2232h.v` | FT2232H USB 2.0 module (8-bit, USB_MODE=1) |
+| `radar_system_top.v` | Core module with USB_MODE generate block |
+| `radar_system_top_50t.v` | 50T wrapper: sets USB_MODE=1, ties off FT601 |
+
+### FT2232H Pin Map (50T, Bank 35, VCCO=3.3V)
+
+All connections are direct between U6 (FT2232HQ) and U42 (XC7A50T). Only
+Channel A is used (245 Synchronous FIFO mode). Channel B is unconnected.
+
+| Signal | FT2232H Pin | FPGA Ball | Direction |
+|--------|-------------|-----------|-----------|
+| FT_D[7:0] | ADBUS[7:0] | K1,J3,H3,G4,F2,D1,C3,C1 | Bidirectional |
+| FT_RXF# | ACBUS0 | A2 | Input (FIFO not empty) |
+| FT_TXE# | ACBUS1 | B2 | Input (FIFO not full) |
+| FT_RD# | ACBUS2 | A3 | Output (read strobe) |
+| FT_WR# | ACBUS3 | A4 | Output (write strobe) |
+| FT_SIWUA | ACBUS4 | A5 | Output (send immediate) |
+| FT_CLKOUT | ACBUS5 | C4 (MRCC) | Input (60 MHz clock) |
+| FT_OE# | ACBUS6 | B7 | Output (bus direction) |
+
 ## Bank Voltage Assignments

-### XC7A50T-FTG256 (Upstream)
+### XC7A50T-FTG256 (50T Production)

 | Bank | VCCO | Signals |
 |------|------|---------|
@@ -35,9 +109,9 @@ so it has its own dev top and XDC.
 | 14 | 3.3V | ADC LVDS (LVDS_33), SPI flash |
 | 15 | 3.3V | DAC, clocks, STM32 3.3V SPI, DIG bus |
 | 34 | 1.8V | ADAR1000 control, SPI 1.8V side |
-| 35 | 3.3V | Unused (no signal connections) |
+| 35 | 3.3V | FT2232H USB 2.0 (8-bit data + control, 15 signals) |

-### XC7A200T-FBG484 (Production)
+### XC7A200T-FBG484 (200T Premium Dev Board)

 | Bank | VCCO | Used/Avail | Signals |
 |------|------|------------|---------|
@@ -50,15 +124,43 @@ so it has its own dev top and XDC.

 ## Signal Differences Between Targets

-| Signal | Upstream (FTG256) | Production (FBG484) |
-|--------|-------------------|---------------------|
-| FT601 USB | Unwired (chip placed, no nets) | Fully wired, Bank 16 |
+| Signal | 50T Production (FTG256) | 200T Dev (FBG484) |
+|--------|-------------------------|-------------------|
+| USB interface | FT2232H USB 2.0 (8-bit, Bank 35) | FT601 USB 3.0 (32-bit, Bank 16) |
+| USB_MODE | 1 (via `radar_system_top_50t` wrapper) | 0 (default in `radar_system_top`) |
+| USB clock | 60 MHz from FT2232H CLKOUT | 100 MHz from FT601 |
 | `dac_clk` | Not connected (DAC clocked by AD9523 directly) | Routed, FPGA drives DAC |
-| `ft601_be` width | `[1:0]` in upstream RTL | `[3:0]` (RTL updated) |
+| `ft601_be` width | N/A (FT601 unused, tied off) | `[3:0]` (RTL updated) |
 | ADC LVDS standard | LVDS_33 (3.3V bank) | LVDS_25 (2.5V bank, better quality) |
 | Status/debug outputs | No physical pins (commented out) | All routed to Banks 35 + 13 |

-## How to Select in Vivado
+## How to Build
+
+### Quick Reference
+
+```bash
+# From the FPGA source directory (9_Firmware/9_2_FPGA):
+
+# 50T production build (FT2232H, USB_MODE=1):
+vivado -mode batch -source scripts/50t/build_50t.tcl 2>&1 | tee build_50t/vivado.log
+
+# 200T dev build (FT601, USB_MODE=0):
+vivado -mode batch -source scripts/200t/build_200t.tcl \
+  -log build/build.log -journal build/build.jou
+```
+
+The build scripts automatically select the correct top module and constraints:
+
+| Build Script | Top Module | Constraints | USB_MODE |
+|--------------|------------|-------------|----------|
+| `scripts/50t/build_50t.tcl` | `radar_system_top_50t` | `xc7a50t_ftg256.xdc` | 1 (FT2232H) |
+| `scripts/200t/build_200t.tcl` | `radar_system_top` | `xc7a200t_fbg484.xdc` | 0 (FT601) |
+
+You do NOT need to set `USB_MODE` manually. The top module selection handles it:
+- `radar_system_top_50t` forces `USB_MODE=1` internally
+- `radar_system_top` defaults to `USB_MODE=0`
+
+## How to Select Constraints in Vivado

 In the Vivado project, only one target XDC should be active at a time:

@@ -85,12 +187,12 @@ read_xdc constraints/te0713_te0701_minimal.xdc

 ## Top Modules by Target

-| Target | Top module | Notes |
-|--------|------------|-------|
-| Upstream FTG256 | `radar_system_top` | Legacy board support |
-| Production FBG484 | `radar_system_top` | Main AERIS-10 board |
-| Trenz TE0712/TE0701 | `radar_system_top_te0712_dev` | Minimal bring-up wrapper while pinout/peripherals are migrated |
-| Trenz TE0713/TE0701 | `radar_system_top_te0713_dev` | Alternate SoM wrapper (TE0713 clock mapping) |
+| Target | Top module | USB_MODE | USB Interface | Notes |
+|--------|------------|----------|---------------|-------|
+| 50T Production (FTG256) | `radar_system_top_50t` | 1 | FT2232H (8-bit) | Wrapper sets USB_MODE=1, ties off FT601 |
+| 200T Dev (FBG484) | `radar_system_top` | 0 (default) | FT601 (32-bit) | No wrapper needed |
+| Trenz TE0712/TE0701 | `radar_system_top_te0712_dev` | 0 (default) | FT601 (32-bit) | Minimal bring-up wrapper |
+| Trenz TE0713/TE0701 | `radar_system_top_te0713_dev` | 0 (default) | FT601 (32-bit) | Alternate SoM wrapper |

 ## Trenz Split Status

@@ -142,11 +244,19 @@ TE0713 outputs:

 ## Notes

- The production XDC pin assignments are **recommended** for the new PCB.
+- **USB_MODE is compile-time only.** You cannot switch USB interfaces at runtime.
+  Each board target has exactly one USB chip physically connected.
+- The 50T production build must use `radar_system_top_50t` as top module. Using
+  `radar_system_top` directly will default to FT601 (USB_MODE=0), which has no
+  physical connection on the 50T board.
+- The 200T XDC pin assignments are **recommended** for the new PCB.
  The PCB designer should follow this allocation.
- Bank 16 (FT601) is fully utilized at 50/50 pins. No room for expansion
+- Bank 16 on the 200T (FT601) is fully utilized at 50/50 pins. No room for expansion
  on that bank.
- Bank 35 (status/debug) is also at capacity (50/50). Additional debug
+- Bank 35 on the 200T (status/debug) is also at capacity (50/50). Additional debug
  signals should use Bank 13 spare pins (18 remaining).
+- Bank 35 on the 50T is used for FT2232H (15 signals). Remaining pins are available
+  for future expansion.
 - Clock inputs are placed on MRCC (Multi-Region Clock Capable) pins to
-  ensure proper clock tree access.
+  ensure proper clock tree access. The FT2232H CLKOUT (60 MHz) is on
+  pin C4 (`IO_L12N_T1_MRCC_35`).
@@ -83,3 +83,13 @@ set_false_path -through [get_pins rx_inst/adc/mmcm_inst/mmcm_adc_400m/LOCKED]
 # Waiving hold on these 8 paths (adc_d_p[0..7] → IDDR) is standard practice
 # for source-synchronous LVDS ADC interfaces using BUFIO capture.
 set_false_path -hold -from [get_ports {adc_d_p[*]}] -to [get_clocks adc_dco_p]
+
+# --------------------------------------------------------------------------
+# Timing margin for 400 MHz critical paths
+# --------------------------------------------------------------------------
+# Extra setup uncertainty forces Vivado to leave margin for temperature/voltage/
+# aging variation. Reduced from 200 ps to 100 ps after NCO→mixer pipeline
+# register fix eliminated the dominant timing bottleneck (WNS went from +0.002ns
+# to comfortable margin). 100 ps still provides ~4% guardband on the 2.5ns period.
+# This is additive to the existing jitter-based uncertainty (~53 ps).
+set_clock_uncertainty -setup -add 0.100 [get_clocks clk_mmcm_out0]
@@ -222,8 +222,16 @@ set_property IOSTANDARD LVCMOS33 [get_ports {stm32_new_*}]
 set_property IOSTANDARD LVCMOS33 [get_ports {stm32_mixers_enable}]
 # reset_n is DIG_4 (PD12) — constrained above in the RESET section

-# DIG_5 = H11, DIG_6 = G12, DIG_7 = H12 — available for FPGA→STM32 status
-# Currently unused in RTL. Could be connected to status outputs if needed.
+# DIG_5 = H11, DIG_6 = G12, DIG_7 = H12 — FPGA→STM32 status outputs
+# DIG_5: AGC saturation flag (PD13 on STM32)
+# DIG_6: AGC enable flag (PD14) — mirrors FPGA host_agc_enable to STM32
+# DIG_7: reserved (PD15)
+set_property PACKAGE_PIN H11 [get_ports {gpio_dig5}]
+set_property PACKAGE_PIN G12 [get_ports {gpio_dig6}]
+set_property PACKAGE_PIN H12 [get_ports {gpio_dig7}]
+set_property IOSTANDARD LVCMOS33 [get_ports {gpio_dig*}]
+set_property DRIVE 8 [get_ports {gpio_dig*}]
+set_property SLEW SLOW [get_ports {gpio_dig*}]

 # ============================================================================
 # ADC INTERFACE (LVDS — Bank 14, VCCO=3.3V)
@@ -102,14 +102,19 @@ wire signed [17:0] debug_mixed_q_trunc;
 reg [7:0] signal_power_i, signal_power_q;

 // Internal mixing signals
-// DSP48E1 with AREG=1, BREG=1, MREG=1, PREG=1 handles all internal pipelining
-// Latency: 4 cycles (1 for AREG/BREG, 1 for MREG, 1 for PREG, 1 for post-DSP retiming)
+// Pipeline: NCO fabric reg (1) + DSP48E1 AREG/BREG (1) + MREG (1) + PREG (1) + retiming (1) = 5 cycles
+// The NCO fabric pipeline register was added to break the long NCO→DSP B-port route
+// (1.505ns routing in Build 26, WNS=+0.002ns). With BREG=1 still active inside the DSP,
+// total latency increases by 1 cycle (2.5ns at 400MHz — negligible for radar).
 wire signed [MIXER_WIDTH-1:0] adc_signed_w;
 reg signed [MIXER_WIDTH + NCO_WIDTH -1:0] mixed_i, mixed_q;
 reg mixed_valid;
 reg mixer_overflow_i, mixer_overflow_q;
-// Pipeline valid tracking: 4-stage shift register (3 for DSP48E1 + 1 for post-DSP retiming)
-reg [3:0] dsp_valid_pipe;
+// Pipeline valid tracking: 5-stage shift register (1 NCO pipe + 3 DSP48E1 + 1 retiming)
+reg [4:0] dsp_valid_pipe;
+// NCO→DSP pipeline registers — breaks the long NCO sin/cos → DSP48E1 B-port route
+// DONT_TOUCH prevents Vivado from absorbing these into the DSP or optimizing away
+(* DONT_TOUCH = "TRUE" *) reg signed [15:0] cos_nco_pipe, sin_nco_pipe;
 // Post-DSP retiming registers — breaks DSP48E1 CLK→P to fabric timing path
 // This extra pipeline stage absorbs the 1.866ns DSP output prop delay + routing,
 // ensuring WNS > 0 at 400 MHz regardless of placement seed
@@ -210,11 +215,11 @@ nco_400m_enhanced nco_core (
 //
 // Architecture:
 //   ADC data → sign-extend to 18b → DSP48E1 A-port (AREG=1 pipelines it)
-//   NCO cos/sin → sign-extend to 18b → DSP48E1 B-port (BREG=1 pipelines it)
+//   NCO cos/sin → fabric pipeline reg → DSP48E1 B-port (BREG=1 pipelines it)
 //   Multiply result captured by MREG=1, then output registered by PREG=1
 //   force_saturation override applied AFTER DSP48E1 output (not on input path)
 //
-// Latency: 3 clock cycles (AREG/BREG + MREG + PREG)
+// Latency: 4 clock cycles (1 NCO pipe + 1 AREG/BREG + 1 MREG + 1 PREG) + 1 retiming = 5 total
 // PREG=1 absorbs DSP48E1 CLK→P delay internally, preventing fabric timing violations
 // In simulation (Icarus), uses behavioral equivalent since DSP48E1 is Xilinx-only
 // ============================================================================
@@ -223,24 +228,35 @@ nco_400m_enhanced nco_core (
 assign adc_signed_w = {1'b0, adc_data, {(MIXER_WIDTH-ADC_WIDTH-1){1'b0}}} - 
                      {1'b0, {ADC_WIDTH{1'b1}}, {(MIXER_WIDTH-ADC_WIDTH-1){1'b0}}} / 2;

-// Valid pipeline: 4-stage shift register (3 for DSP48E1 AREG+MREG+PREG + 1 for retiming)
+// Valid pipeline: 5-stage shift register (1 NCO pipe + 3 DSP48E1 AREG+MREG+PREG + 1 retiming)
 always @(posedge clk_400m or negedge reset_n_400m) begin
    if (!reset_n_400m) begin
-        dsp_valid_pipe <= 4'b0000;
+        dsp_valid_pipe <= 5'b00000;
    end else begin
-        dsp_valid_pipe <= {dsp_valid_pipe[2:0], (nco_ready && adc_data_valid_i && adc_data_valid_q)};
+        dsp_valid_pipe <= {dsp_valid_pipe[3:0], (nco_ready && adc_data_valid_i && adc_data_valid_q)};
    end
 end

 `ifdef SIMULATION
 // ---- Behavioral model for Icarus Verilog simulation ----
-// Mimics DSP48E1 with AREG=1, BREG=1, MREG=1, PREG=1 (3-cycle latency)
+// Mimics NCO pipeline + DSP48E1 with AREG=1, BREG=1, MREG=1, PREG=1 (4-cycle DSP + 1 NCO pipe)
 reg signed [MIXER_WIDTH-1:0] adc_signed_reg;     // Models AREG
 reg signed [15:0] cos_pipe_reg, sin_pipe_reg;     // Models BREG
 reg signed [MIXER_WIDTH+NCO_WIDTH-1:0] mult_i_internal, mult_q_internal;  // Models MREG
 reg signed [MIXER_WIDTH+NCO_WIDTH-1:0] mult_i_reg, mult_q_reg;            // Models PREG

-// Stage 1: AREG/BREG equivalent
+// Stage 0: NCO pipeline — breaks long NCO→DSP route (matches synthesis fabric registers)
+always @(posedge clk_400m or negedge reset_n_400m) begin
+    if (!reset_n_400m) begin
+        cos_nco_pipe <= 0;
+        sin_nco_pipe <= 0;
+    end else begin
+        cos_nco_pipe <= cos_out;
+        sin_nco_pipe <= sin_out;
+    end
+end
+
+// Stage 1: AREG/BREG equivalent (uses pipelined NCO outputs)
 always @(posedge clk_400m or negedge reset_n_400m) begin
    if (!reset_n_400m) begin
        adc_signed_reg <= 0;
@@ -248,8 +264,8 @@ always @(posedge clk_400m or negedge reset_n_400m) begin
        sin_pipe_reg <= 0;
    end else begin
        adc_signed_reg <= adc_signed_w;
-        cos_pipe_reg <= cos_out;
-        sin_pipe_reg <= sin_out;
+        cos_pipe_reg <= cos_nco_pipe;
+        sin_pipe_reg <= sin_nco_pipe;
    end
 end

@@ -291,6 +307,20 @@ end
 // This guarantees AREG/BREG/MREG are used, achieving timing closure at 400 MHz
 wire [47:0] dsp_p_i, dsp_p_q;

+// NCO pipeline stage — breaks the long NCO sin/cos → DSP48E1 B-port route
+// (1.505ns routing observed in Build 26). These fabric registers are placed
+// near the DSP by the placer, splitting the route into two shorter segments.
+// DONT_TOUCH on the reg declaration (above) prevents absorption/retiming.
+always @(posedge clk_400m or negedge reset_n_400m) begin
+    if (!reset_n_400m) begin
+        cos_nco_pipe <= 0;
+        sin_nco_pipe <= 0;
+    end else begin
+        cos_nco_pipe <= cos_out;
+        sin_nco_pipe <= sin_out;
+    end
+end
+
 // DSP48E1 for I-channel mixer (adc_signed * cos_out)
 DSP48E1 #(
    // Feature control attributes
@@ -350,7 +380,7 @@ DSP48E1 #(
    .CEINMODE(1'b0),
    // Data ports
    .A({{12{adc_signed_w[MIXER_WIDTH-1]}}, adc_signed_w}),   // Sign-extend 18b to 30b
-    .B({{2{cos_out[15]}}, cos_out}),                          // Sign-extend 16b to 18b
+    .B({{2{cos_nco_pipe[15]}}, cos_nco_pipe}),                // Sign-extend 16b to 18b (pipelined)
    .C(48'b0),
    .D(25'b0),
    .CARRYIN(1'b0),
@@ -432,7 +462,7 @@ DSP48E1 #(
    .CED(1'b0),
    .CEINMODE(1'b0),
    .A({{12{adc_signed_w[MIXER_WIDTH-1]}}, adc_signed_w}),
-    .B({{2{sin_out[15]}}, sin_out}),
+    .B({{2{sin_nco_pipe[15]}}, sin_nco_pipe}),
    .C(48'b0),
    .D(25'b0),
    .CARRYIN(1'b0),
@@ -492,7 +522,7 @@ always @(posedge clk_400m or negedge reset_n_400m) begin
        mixer_overflow_q <= 0;
        saturation_count <= 0;
        overflow_detected <= 0;
-    end else if (dsp_valid_pipe[3]) begin
+    end else if (dsp_valid_pipe[4]) begin
        // Force saturation for testing (applied after DSP output, not on input path)
        if (force_saturation_sync) begin
            mixed_i <= 34'h1FFFFFFFF;
@@ -296,7 +296,7 @@ always @(posedge clk or negedge reset_n) begin
                    state           <= ST_DONE;
                end
            end
-            // Timeout: if no ADC data after 10000 cycles, FAIL
+            // Timeout: if no ADC data after 1000 cycles (10 us @ 100 MHz), FAIL
            step_cnt <= step_cnt + 1;
            if (step_cnt >= 10'd1000 && adc_cap_cnt == 0) begin
                result_flags[4] <= 1'b0;
@@ -11,8 +11,10 @@ module radar_receiver_final (
    input wire adc_dco_n,            // Data Clock Output N (400MHz LVDS)
 	 output wire adc_pwdn,
    
-    // Chirp counter from transmitter (for frame sync and matched filter)
+    // Chirp counter from transmitter (for matched filter indexing)
    input wire [5:0] chirp_counter,
+    // Frame-start pulse from transmitter (CDC-synchronized, 1 clk_100m cycle)
+    input wire tx_frame_start,
    
    output wire [31:0] doppler_output,
    output wire doppler_valid,
@@ -42,6 +44,13 @@ module radar_receiver_final (
    // [2:0]=shift amount: 0..7 bits. Default 0 = pass-through.
    input wire [3:0] host_gain_shift,

+    // AGC configuration (opcodes 0x28-0x2C, active only when agc_enable=1)
+    input wire        host_agc_enable,      // 0x28: 0=manual, 1=auto AGC
+    input wire [7:0]  host_agc_target,      // 0x29: target peak magnitude
+    input wire [3:0]  host_agc_attack,      // 0x2A: gain-down step on clipping
+    input wire [3:0]  host_agc_decay,       // 0x2B: gain-up step when weak
+    input wire [3:0]  host_agc_holdoff,     // 0x2C: frames before gain-up
+
    // STM32 toggle signals for mode 00 (STM32-driven) pass-through.
    // These are CDC-synchronized in radar_system_top.v / radar_transmitter.v
    // before reaching this module. In mode 00, the RX mode controller uses
@@ -60,7 +69,12 @@ module radar_receiver_final (
    // ADC raw data tap (clk_100m domain, post-DDC, for self-test / debug)
    output wire [15:0] dbg_adc_i,            // DDC output I (16-bit signed, 100 MHz)
    output wire [15:0] dbg_adc_q,            // DDC output Q (16-bit signed, 100 MHz)
-    output wire        dbg_adc_valid         // DDC output valid (100 MHz)
+    output wire        dbg_adc_valid,        // DDC output valid (100 MHz)
+
+    // AGC status outputs (for status readback / STM32 outer loop)
+    output wire [7:0]  agc_saturation_count, // Per-frame clipped sample count
+    output wire [7:0]  agc_peak_magnitude,   // Per-frame peak (upper 8 bits)
+    output wire [3:0]  agc_current_gain      // Effective gain_shift encoding
 );

 // ========== INTERNAL SIGNALS ==========
@@ -86,7 +100,9 @@ wire adc_valid_sync;
 // Gain-controlled signals (between DDC output and matched filter)
 wire signed [15:0] gc_i, gc_q;
 wire gc_valid;
-wire [7:0] gc_saturation_count;  // Diagnostic: clipped sample counter
+wire [7:0] gc_saturation_count;  // Diagnostic: per-frame clipped sample counter
+wire [7:0] gc_peak_magnitude;    // Diagnostic: per-frame peak magnitude
+wire [3:0] gc_current_gain;      // Diagnostic: effective gain_shift

 // Reference signals for the processing chain
 wire [15:0] long_chirp_real, long_chirp_imag;
@@ -160,7 +176,7 @@ wire clk_400m;
 // the buffered 400MHz DCO clock via adc_dco_bufg, avoiding duplicate
 // IBUFDS instantiations on the same LVDS clock pair.

-// 1. ADC + CDC + AGC
+// 1. ADC + CDC + Digital Gain

 // CMOS Output Interface (400MHz Domain)
 wire [7:0] adc_data_cmos;  // 8-bit ADC data (CMOS, from ad9484_interface_400m)
@@ -222,9 +238,10 @@ ddc_input_interface ddc_if (
    .data_sync_error()
 );

-// 2b. Digital Gain Control (Fix 3)
+// 2b. Digital Gain Control with AGC
 // Host-configurable power-of-2 shift between DDC output and matched filter.
-// Default gain_shift=0 → pass-through (no behavioral change from baseline).
+// Default gain_shift=0, agc_enable=0 → pass-through (no behavioral change).
+// When agc_enable=1: auto-adjusts gain per frame based on peak/saturation.
 rx_gain_control gain_ctrl (
    .clk(clk),
    .reset_n(reset_n),
@@ -232,10 +249,21 @@ rx_gain_control gain_ctrl (
    .data_q_in(adc_q_scaled),
    .valid_in(adc_valid_sync),
    .gain_shift(host_gain_shift),
+    // AGC configuration
+    .agc_enable(host_agc_enable),
+    .agc_target(host_agc_target),
+    .agc_attack(host_agc_attack),
+    .agc_decay(host_agc_decay),
+    .agc_holdoff(host_agc_holdoff),
+    // Frame boundary from Doppler processor
+    .frame_boundary(doppler_frame_done),
+    // Outputs
    .data_i_out(gc_i),
    .data_q_out(gc_q),
    .valid_out(gc_valid),
-    .saturation_count(gc_saturation_count)
+    .saturation_count(gc_saturation_count),
+    .peak_magnitude(gc_peak_magnitude),
+    .current_gain(gc_current_gain)
 );

 // 3. Dual Chirp Memory Loader
@@ -366,32 +394,31 @@ mti_canceller #(
    .mti_first_chirp(mti_first_chirp)
 );

-// ========== FRAME SYNC USING chirp_counter ==========
-reg [5:0] chirp_counter_prev;
+// ========== FRAME SYNC FROM TRANSMITTER ==========
+// [FPGA-001 FIXED] Use the authoritative new_chirp_frame signal from the
+// transmitter (via plfm_chirp_controller_enhanced), CDC-synchronized to
+// clk_100m in radar_system_top.  Previous code tried to derive frame
+// boundaries from chirp_counter == 0, but that counter comes from the
+// transmitter path (plfm_chirp_controller_enhanced) which does NOT wrap
+// at chirps_per_elev — it overflows to N and only wraps at 6-bit rollover
+// (64).  This caused frame pulses at half the expected rate for N=32.
+reg tx_frame_start_prev;
 reg new_frame_pulse;

 always @(posedge clk or negedge reset_n) begin
    if (!reset_n) begin
-        chirp_counter_prev <= 6'd0;
+        tx_frame_start_prev <= 1'b0;
        new_frame_pulse <= 1'b0;
    end else begin
-        // Default: no pulse
        new_frame_pulse <= 1'b0;
        
-        // Dynamic frame detection using host_chirps_per_elev.
-        // Detect frame boundary when chirp_counter changes AND is a
-        // multiple of host_chirps_per_elev (0, N, 2N, 3N, ...).
-        // Uses a modulo counter that resets at host_chirps_per_elev.
-        if (chirp_counter != chirp_counter_prev) begin
-            if (chirp_counter == 6'd0 ||
-                chirp_counter == host_chirps_per_elev ||
-                chirp_counter == {host_chirps_per_elev, 1'b0}) begin
-                new_frame_pulse <= 1'b1;
-            end
+        // Edge detect: tx_frame_start is a toggle-CDC derived pulse that
+        // may be 1 clock wide.  Capture rising edge for clean 1-cycle pulse.
+        if (tx_frame_start && !tx_frame_start_prev) begin
+            new_frame_pulse <= 1'b1;
        end
        
-        // Store previous value
-        chirp_counter_prev <= chirp_counter;
+        tx_frame_start_prev <= tx_frame_start;
    end
 end

@@ -457,14 +484,6 @@ always @(posedge clk or negedge reset_n) begin
            `endif
            chirps_in_current_frame <= 0;
        end
-        
-        // Monitor chirp counter pattern
-        if (chirp_counter != chirp_counter_prev) begin
-            `ifdef SIMULATION
-            $display("[TOP] chirp_counter: %0d ? %0d", 
-                     chirp_counter_prev, chirp_counter);
-            `endif
-        end
    end
 end

@@ -474,4 +493,9 @@ assign dbg_adc_i     = adc_i_scaled;
 assign dbg_adc_q     = adc_q_scaled;
 assign dbg_adc_valid = adc_valid_sync;

+// ========== AGC STATUS OUTPUTS ==========
+assign agc_saturation_count = gc_saturation_count;
+assign agc_peak_magnitude   = gc_peak_magnitude;
+assign agc_current_gain     = gc_current_gain;
+
 endmodule
@@ -125,7 +125,13 @@ module radar_system_top (
    output wire [5:0] dbg_range_bin,
    
    // System status
-    output wire [3:0] system_status
+    output wire [3:0] system_status,
+
+    // FPGA→STM32 GPIO outputs (DIG_5..DIG_7 on 50T board)
+    // Used by STM32 outer AGC loop to read saturation state without USB polling.
+    output wire gpio_dig5,          // DIG_5 (H11→PD13): AGC saturation flag (1=clipping detected)
+    output wire gpio_dig6,          // DIG_6 (G12→PD14): AGC enable flag (mirrors host_agc_enable)
+    output wire gpio_dig7           // DIG_7 (H12→PD15): reserved (tied low)
 );

 // ============================================================================
@@ -187,6 +193,11 @@ wire [15:0] rx_dbg_adc_i;
 wire [15:0] rx_dbg_adc_q;
 wire        rx_dbg_adc_valid;

+// AGC status from receiver (for status readback and GPIO)
+wire [7:0]  rx_agc_saturation_count;
+wire [7:0]  rx_agc_peak_magnitude;
+wire [3:0]  rx_agc_current_gain;
+
 // Data packing for USB
 wire [31:0] usb_range_profile;
 wire usb_range_valid;
@@ -259,6 +270,13 @@ reg        host_cfar_enable;      // Opcode 0x25: 1=CFAR, 0=simple threshold
 reg        host_mti_enable;       // Opcode 0x26: 1=MTI active, 0=pass-through
 reg [2:0]  host_dc_notch_width;   // Opcode 0x27: DC notch ±width bins (0=off, 1..7)

+// AGC configuration registers (host-configurable via USB, opcodes 0x28-0x2C)
+reg        host_agc_enable;       // Opcode 0x28: 0=manual gain, 1=auto AGC
+reg [7:0]  host_agc_target;       // Opcode 0x29: target peak magnitude (default 200)
+reg [3:0]  host_agc_attack;       // Opcode 0x2A: gain-down step on clipping (default 1)
+reg [3:0]  host_agc_decay;        // Opcode 0x2B: gain-up step when weak (default 1)
+reg [3:0]  host_agc_holdoff;      // Opcode 0x2C: frames to wait before gain-up (default 4)
+
 // Board bring-up self-test registers (opcode 0x30 trigger, 0x31 readback)
 reg        host_self_test_trigger;  // Opcode 0x30: self-clearing pulse
 wire       self_test_busy;
@@ -487,6 +505,8 @@ radar_receiver_final rx_inst (
    
    // Chirp counter from transmitter (CDC-synchronized from 120 MHz domain)
    .chirp_counter(tx_current_chirp_sync),
+    // Frame-start pulse from transmitter (CDC-synchronized toggle→pulse)
+    .tx_frame_start(tx_new_chirp_frame_sync),
    
    // ADC Physical Interface
    .adc_d_p(adc_d_p),
@@ -518,6 +538,12 @@ radar_receiver_final rx_inst (
    .host_chirps_per_elev(host_chirps_per_elev),
    // Fix 3: digital gain control
    .host_gain_shift(host_gain_shift),
+    // AGC configuration (opcodes 0x28-0x2C)
+    .host_agc_enable(host_agc_enable),
+    .host_agc_target(host_agc_target),
+    .host_agc_attack(host_agc_attack),
+    .host_agc_decay(host_agc_decay),
+    .host_agc_holdoff(host_agc_holdoff),
    // STM32 toggle signals for RX mode controller (mode 00 pass-through).
    // These are the raw GPIO inputs — the RX mode controller's edge detectors
    // (inside radar_mode_controller) handle debouncing/edge detection.
@@ -532,7 +558,11 @@ radar_receiver_final rx_inst (
    // ADC debug tap (for self-test / bring-up)
    .dbg_adc_i(rx_dbg_adc_i),
    .dbg_adc_q(rx_dbg_adc_q),
-    .dbg_adc_valid(rx_dbg_adc_valid)
+    .dbg_adc_valid(rx_dbg_adc_valid),
+    // AGC status outputs
+    .agc_saturation_count(rx_agc_saturation_count),
+    .agc_peak_magnitude(rx_agc_peak_magnitude),
+    .agc_current_gain(rx_agc_current_gain)
 );

 // ============================================================================
@@ -744,7 +774,13 @@ if (USB_MODE == 0) begin : gen_ft601
        // Self-test status readback
        .status_self_test_flags(self_test_flags_latched),
        .status_self_test_detail(self_test_detail_latched),
-        .status_self_test_busy(self_test_busy)
+        .status_self_test_busy(self_test_busy),
+
+        // AGC status readback
+        .status_agc_current_gain(rx_agc_current_gain),
+        .status_agc_peak_magnitude(rx_agc_peak_magnitude),
+        .status_agc_saturation_count(rx_agc_saturation_count),
+        .status_agc_enable(host_agc_enable)
    );

    // FT2232H ports unused in FT601 mode — tie off
@@ -805,7 +841,13 @@ end else begin : gen_ft2232h
        // Self-test status readback
        .status_self_test_flags(self_test_flags_latched),
        .status_self_test_detail(self_test_detail_latched),
-        .status_self_test_busy(self_test_busy)
+        .status_self_test_busy(self_test_busy),
+
+        // AGC status readback
+        .status_agc_current_gain(rx_agc_current_gain),
+        .status_agc_peak_magnitude(rx_agc_peak_magnitude),
+        .status_agc_saturation_count(rx_agc_saturation_count),
+        .status_agc_enable(host_agc_enable)
    );

    // FT601 ports unused in FT2232H mode — tie off
@@ -892,6 +934,12 @@ always @(posedge clk_100m_buf or negedge sys_reset_n) begin
        // Ground clutter removal defaults (disabled — backward-compatible)
        host_mti_enable         <= 1'b0;      // MTI off
        host_dc_notch_width     <= 3'd0;      // DC notch off
+        // AGC defaults (disabled — backward-compatible with manual gain)
+        host_agc_enable         <= 1'b0;      // AGC off (manual gain)
+        host_agc_target         <= 8'd200;    // Target peak magnitude
+        host_agc_attack         <= 4'd1;      // 1-step gain-down on clipping
+        host_agc_decay          <= 4'd1;      // 1-step gain-up when weak
+        host_agc_holdoff        <= 4'd4;      // 4 frames before gain-up
        // Self-test defaults
        host_self_test_trigger  <= 1'b0;      // Self-test idle
    end else begin
@@ -936,6 +984,12 @@ always @(posedge clk_100m_buf or negedge sys_reset_n) begin
                // Ground clutter removal opcodes
                8'h26: host_mti_enable         <= usb_cmd_value[0];
                8'h27: host_dc_notch_width     <= usb_cmd_value[2:0];
+                // AGC configuration opcodes
+                8'h28: host_agc_enable         <= usb_cmd_value[0];
+                8'h29: host_agc_target         <= usb_cmd_value[7:0];
+                8'h2A: host_agc_attack         <= usb_cmd_value[3:0];
+                8'h2B: host_agc_decay          <= usb_cmd_value[3:0];
+                8'h2C: host_agc_holdoff        <= usb_cmd_value[3:0];
                // Board bring-up self-test opcodes
                8'h30: host_self_test_trigger  <= 1'b1;  // Trigger self-test
                8'h31: host_status_request     <= 1'b1;  // Self-test readback (status alias)
@@ -978,6 +1032,18 @@ end

 assign system_status = status_reg;

+// ============================================================================
+// FPGA→STM32 GPIO OUTPUTS (DIG_5, DIG_6, DIG_7)
+// ============================================================================
+// DIG_5: AGC saturation flag — high when per-frame saturation_count > 0.
+//        STM32 reads PD13 to detect clipping and adjust ADAR1000 VGA gain.
+// DIG_6: AGC enable flag — mirrors host_agc_enable so STM32 outer-loop AGC
+//        tracks the FPGA register as single source of truth.
+// DIG_7: Reserved (tied low for future use).
+assign gpio_dig5 = (rx_agc_saturation_count != 8'd0);
+assign gpio_dig6 = host_agc_enable;
+assign gpio_dig7 = 1'b0;
+
 // ============================================================================
 // DEBUG AND VERIFICATION
 // ============================================================================
@@ -76,7 +76,12 @@ module radar_system_top_50t (
    output wire ft_rd_n,              // Read strobe (active low)
    output wire ft_wr_n,              // Write strobe (active low)
    output wire ft_oe_n,              // Output enable / bus direction
-    output wire ft_siwu               // Send Immediate / WakeUp
+    output wire ft_siwu,              // Send Immediate / WakeUp
+
+    // ===== FPGA→STM32 GPIO (Bank 15: 3.3V) =====
+    output wire gpio_dig5,            // DIG_5 (H11→PD13): AGC saturation flag
+    output wire gpio_dig6,            // DIG_6 (G12→PD14): reserved
+    output wire gpio_dig7             // DIG_7 (H12→PD15): reserved
 );

    // ===== Tie-off wires for unconstrained FT601 inputs (inactive with USB_MODE=1) =====
@@ -207,7 +212,12 @@ module radar_system_top_50t (
        .dbg_doppler_valid      (dbg_doppler_valid_nc),
        .dbg_doppler_bin        (dbg_doppler_bin_nc),
        .dbg_range_bin          (dbg_range_bin_nc),
-        .system_status          (system_status_nc)
+        .system_status          (system_status_nc),
+
+        // ----- FPGA→STM32 GPIO (DIG_5..DIG_7) -----
+        .gpio_dig5              (gpio_dig5),
+        .gpio_dig6              (gpio_dig6),
+        .gpio_dig7              (gpio_dig7)
    );

 endmodule
@@ -403,6 +403,18 @@ run_test "DDC Chain (NCO→CIC→FIR)" \
    tb/tb_ddc_cosim.v ddc_400m.v nco_400m_enhanced.v \
    cic_decimator_4x_enhanced.v fir_lowpass.v cdc_modules.v

+# Real-data co-simulation: committed golden hex vs RTL (exact match required).
+# These catch architecture mismatches (e.g. 32-pt → dual 16-pt Doppler FFT)
+# that self-blessing golden-generate/compare tests cannot detect.
+run_test "Doppler Real-Data (ADI CN0566, exact match)" \
+    tb/tb_doppler_realdata.vvp \
+    tb/tb_doppler_realdata.v doppler_processor.v xfft_16.v fft_engine.v
+
+run_test "Full-Chain Real-Data (decim→Doppler, exact match)" \
+    tb/tb_fullchain_realdata.vvp \
+    tb/tb_fullchain_realdata.v range_bin_decimator.v \
+    doppler_processor.v xfft_16.v fft_engine.v
+
 if [[ "$QUICK" -eq 0 ]]; then
    # Golden generate
    run_test "Receiver (golden generate)" \
@@ -3,19 +3,32 @@
 /**
 * rx_gain_control.v
 *
- * Host-configurable digital gain control for the receive path.
- * Placed between DDC output (ddc_input_interface) and matched filter input.
+ * Digital gain control with optional per-frame automatic gain control (AGC)
+ * for the receive path. Placed between DDC output and matched filter input.
 *
- * Features:
- *   - Bidirectional power-of-2 gain shift (arithmetic shift)
+ * Manual mode (agc_enable=0):
+ *   - Uses host_gain_shift directly (backward-compatible, no behavioral change)
 *   - gain_shift[3]   = direction: 0 = left shift (amplify), 1 = right shift (attenuate)
 *   - gain_shift[2:0] = amount: 0..7 bits
- *   - Symmetric saturation to ±32767 on overflow (left shift only)
- *   - Saturation counter: 8-bit, counts samples that clipped (wraps at 255)
- *   - 1-cycle latency, valid-in/valid-out pipeline
- *   - Zero-overhead pass-through when gain_shift == 0
+ *   - Symmetric saturation to ±32767 on overflow
 *
- * Intended insertion point in radar_receiver_final.v:
+ * AGC mode (agc_enable=1):
+ *   - Per-frame automatic gain adjustment based on peak/saturation metrics
+ *   - Internal signed gain: -7 (max attenuation) to +7 (max amplification)
+ *   - On frame_boundary:
+ *       * If saturation detected: gain -= agc_attack (fast, immediate)
+ *       * Else if peak < target after holdoff frames: gain += agc_decay (slow)
+ *       * Else: hold current gain
+ *   - host_gain_shift serves as initial gain when AGC first enabled
+ *
+ * Status outputs (for readback via status_words):
+ *   - current_gain[3:0]: effective gain_shift encoding (manual or AGC)
+ *   - peak_magnitude[7:0]: per-frame peak |sample| (upper 8 bits of 15-bit value)
+ *   - saturation_count[7:0]: per-frame clipped sample count (capped at 255)
+ *
+ * Timing: 1-cycle data latency, valid-in/valid-out pipeline.
+ *
+ * Insertion point in radar_receiver_final.v:
 *   ddc_input_interface → rx_gain_control → matched_filter_multi_segment
 */

@@ -28,27 +41,75 @@ module rx_gain_control (
    input  wire signed [15:0] data_q_in,
    input  wire               valid_in,

-    // Gain configuration (from host via USB command)
-    // [3]   = direction: 0=amplify (left shift), 1=attenuate (right shift)
-    // [2:0] = shift amount: 0..7 bits
+    // Host gain configuration (from USB command opcode 0x16)
+    // [3]=direction: 0=amplify (left shift), 1=attenuate (right shift)
+    // [2:0]=shift amount: 0..7 bits. Default 0x00 = pass-through.
+    // In AGC mode: serves as initial gain on AGC enable transition.
    input  wire [3:0]  gain_shift,

+    // AGC configuration inputs (from host via USB, opcodes 0x28-0x2C)
+    input  wire        agc_enable,     // 0x28: 0=manual gain, 1=auto AGC
+    input  wire [7:0]  agc_target,     // 0x29: target peak magnitude (unsigned, default 200)
+    input  wire [3:0]  agc_attack,     // 0x2A: attenuation step on clipping (default 1)
+    input  wire [3:0]  agc_decay,      // 0x2B: amplification step when weak (default 1)
+    input  wire [3:0]  agc_holdoff,    // 0x2C: frames to wait before gain-up (default 4)
+
+    // Frame boundary pulse (1 clk cycle, from Doppler frame_complete)
+    input  wire        frame_boundary,
+
    // Data output (to matched filter)
    output reg  signed [15:0] data_i_out,
    output reg  signed [15:0] data_q_out,
    output reg                valid_out,

-    // Diagnostics
-    output reg  [7:0]  saturation_count  // Number of clipped samples (wraps at 255)
+    // Diagnostics / status readback
+    output reg  [7:0]  saturation_count,  // Per-frame clipped sample count (capped at 255)
+    output reg  [7:0]  peak_magnitude,    // Per-frame peak |sample| (upper 8 bits of 15-bit)
+    output reg  [3:0]  current_gain       // Current effective gain_shift (for status readback)
 );

-// Decompose gain_shift
-wire       shift_right = gain_shift[3];
-wire [2:0] shift_amt   = gain_shift[2:0];
+// =========================================================================
+// INTERNAL AGC STATE
+// =========================================================================

-// -------------------------------------------------------------------------
-// Combinational shift + saturation
-// -------------------------------------------------------------------------
+// Signed internal gain: -7 (max attenuation) to +7 (max amplification)
+// Stored as 4-bit signed (range -8..+7, clamped to -7..+7)
+reg signed [3:0] agc_gain;
+
+// Holdoff counter: counts frames without saturation before allowing gain-up
+reg [3:0] holdoff_counter;
+
+// Per-frame accumulators (running, reset on frame_boundary)
+reg [7:0]  frame_sat_count;    // Clipped samples this frame
+reg [14:0] frame_peak;         // Peak |sample| this frame (15-bit unsigned)
+
+// Previous AGC enable state (for detecting 0→1 transition)
+reg agc_enable_prev;
+
+// Combinational helpers for inclusive frame-boundary snapshot
+// (used when valid_in and frame_boundary coincide)
+reg wire_frame_sat_incr;
+reg wire_frame_peak_update;
+
+// =========================================================================
+// EFFECTIVE GAIN SELECTION
+// =========================================================================
+
+// Convert between signed internal gain and the gain_shift[3:0] encoding.
+//   gain_shift[3]=0, [2:0]=N → amplify by N bits (internal gain = +N)
+//   gain_shift[3]=1, [2:0]=N → attenuate by N bits (internal gain = -N)
+
+// Effective gain_shift used for the actual shift operation
+wire [3:0] effective_gain;
+assign effective_gain = agc_enable ? current_gain : gain_shift;
+
+// Decompose effective gain for shift logic
+wire       shift_right = effective_gain[3];
+wire [2:0] shift_amt   = effective_gain[2:0];
+
+// =========================================================================
+// COMBINATIONAL SHIFT + SATURATION
+// =========================================================================
 // Use wider intermediates to detect overflow on left shift.
 // 24 bits is enough: 16 + 7 shift = 23 significant bits max.

@@ -69,26 +130,153 @@ wire signed [15:0] sat_i = overflow_i ? (shifted_i[23] ? -16'sd32768 : 16'sd3276
 wire signed [15:0] sat_q = overflow_q ? (shifted_q[23] ? -16'sd32768 : 16'sd32767)
                                      : shifted_q[15:0];

-// -------------------------------------------------------------------------
-// Registered output stage (1-cycle latency)
-// -------------------------------------------------------------------------
+// =========================================================================
+// PEAK MAGNITUDE TRACKING (combinational)
+// =========================================================================
+// Absolute value of signed 16-bit: flip sign bit if negative.
+// Result is 15-bit unsigned [0, 32767]. (We ignore -32768 → 32767 edge case.)
+wire [14:0] abs_i = data_i_in[15] ? (~data_i_in[14:0] + 15'd1) : data_i_in[14:0];
+wire [14:0] abs_q = data_q_in[15] ? (~data_q_in[14:0] + 15'd1) : data_q_in[14:0];
+wire [14:0] max_iq = (abs_i > abs_q) ? abs_i : abs_q;
+
+// =========================================================================
+// SIGNED GAIN ↔ GAIN_SHIFT ENCODING CONVERSION
+// =========================================================================
+// Convert signed agc_gain to gain_shift[3:0] encoding
+function [3:0] signed_to_encoding;
+    input signed [3:0] g;
+    begin
+        if (g >= 0)
+            signed_to_encoding = {1'b0, g[2:0]};       // amplify
+        else
+            signed_to_encoding = {1'b1, (~g[2:0]) + 3'd1}; // attenuate: -g
+    end
+endfunction
+
+// Convert gain_shift[3:0] encoding to signed gain
+function signed [3:0] encoding_to_signed;
+    input [3:0] enc;
+    begin
+        if (enc[3] == 1'b0)
+            encoding_to_signed = {1'b0, enc[2:0]};     // +0..+7
+        else
+            encoding_to_signed = -$signed({1'b0, enc[2:0]}); // -1..-7
+    end
+endfunction
+
+// =========================================================================
+// CLAMPING HELPER
+// =========================================================================
+// Clamp a wider signed value to [-7, +7]
+function signed [3:0] clamp_gain;
+    input signed [4:0] val;  // 5-bit to handle overflow from add
+    begin
+        if (val > 5'sd7)
+            clamp_gain = 4'sd7;
+        else if (val < -5'sd7)
+            clamp_gain = -4'sd7;
+        else
+            clamp_gain = val[3:0];
+    end
+endfunction
+
+// =========================================================================
+// REGISTERED OUTPUT + AGC STATE MACHINE
+// =========================================================================
 always @(posedge clk or negedge reset_n) begin
    if (!reset_n) begin
+        // Data path
        data_i_out       <= 16'sd0;
        data_q_out       <= 16'sd0;
        valid_out        <= 1'b0;
+        // Status outputs
        saturation_count <= 8'd0;
+        peak_magnitude   <= 8'd0;
+        current_gain     <= 4'd0;
+        // AGC internal state
+        agc_gain         <= 4'sd0;
+        holdoff_counter  <= 4'd0;
+        frame_sat_count  <= 8'd0;
+        frame_peak       <= 15'd0;
+        agc_enable_prev  <= 1'b0;
    end else begin
-        valid_out <= valid_in;
+        // Track AGC enable transitions
+        agc_enable_prev <= agc_enable;

+        // Compute inclusive metrics: if valid_in fires this cycle,
+        // include current sample in the snapshot taken at frame_boundary.
+        // This avoids losing the last sample when valid_in and
+        // frame_boundary coincide (NBA last-write-wins would otherwise
+        // snapshot stale values then reset, dropping the sample entirely).
+        wire_frame_sat_incr = (valid_in && (overflow_i || overflow_q)
+                               && (frame_sat_count != 8'hFF));
+        wire_frame_peak_update = (valid_in && (max_iq > frame_peak));
+
+        // ---- Data pipeline (1-cycle latency) ----
+        valid_out <= valid_in;
        if (valid_in) begin
            data_i_out <= sat_i;
            data_q_out <= sat_q;

-            // Count clipped samples (either channel clipping counts as 1)
-            if ((overflow_i || overflow_q) && (saturation_count != 8'hFF))
-                saturation_count <= saturation_count + 8'd1;
+            // Per-frame saturation counting
+            if ((overflow_i || overflow_q) && (frame_sat_count != 8'hFF))
+                frame_sat_count <= frame_sat_count + 8'd1;
+
+            // Per-frame peak tracking (pre-gain, measures input signal level)
+            if (max_iq > frame_peak)
+                frame_peak <= max_iq;
        end
+
+        // ---- Frame boundary: AGC update + metric snapshot ----
+        if (frame_boundary) begin
+            // Snapshot per-frame metrics INCLUDING current sample if valid_in
+            saturation_count <= wire_frame_sat_incr
+                                ? (frame_sat_count + 8'd1)
+                                : frame_sat_count;
+            peak_magnitude   <= wire_frame_peak_update
+                                ? max_iq[14:7]
+                                : frame_peak[14:7];
+
+            // Reset per-frame accumulators for next frame
+            frame_sat_count <= 8'd0;
+            frame_peak      <= 15'd0;
+
+            if (agc_enable) begin
+                // AGC auto-adjustment at frame boundary
+                // Use inclusive counts/peaks (accounting for simultaneous valid_in)
+                if (wire_frame_sat_incr || frame_sat_count > 8'd0) begin
+                    // Clipping detected: reduce gain immediately (attack)
+                    agc_gain <= clamp_gain($signed({agc_gain[3], agc_gain}) -
+                                           $signed({1'b0, agc_attack}));
+                    holdoff_counter <= agc_holdoff;  // Reset holdoff
+                end else if ((wire_frame_peak_update ? max_iq[14:7] : frame_peak[14:7])
+                             < agc_target) begin
+                    // Signal too weak: increase gain after holdoff expires
+                    if (holdoff_counter == 4'd0) begin
+                        agc_gain <= clamp_gain($signed({agc_gain[3], agc_gain}) +
+                                               $signed({1'b0, agc_decay}));
+                    end else begin
+                        holdoff_counter <= holdoff_counter - 4'd1;
+                    end
+                end else begin
+                    // Signal in good range, no saturation: hold gain
+                    // Reset holdoff so next weak frame has to wait again
+                    holdoff_counter <= agc_holdoff;
+                end
+            end
+        end
+
+        // ---- AGC enable transition: initialize from host gain ----
+        if (agc_enable && !agc_enable_prev) begin
+            agc_gain        <= encoding_to_signed(gain_shift);
+            holdoff_counter <= agc_holdoff;
+        end
+
+        // ---- Update current_gain output ----
+        if (agc_enable)
+            current_gain <= signed_to_encoding(agc_gain);
+        else
+            current_gain <= gain_shift;
    end
 end

@@ -120,9 +120,10 @@ set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {ft_clkout_IBUF}]

 # ---- Run implementation steps ----
 opt_design -directive Explore
-place_design -directive Explore
+place_design -directive ExtraNetDelay_high
+phys_opt_design -directive AggressiveExplore
+route_design -directive AggressiveExplore
 phys_opt_design -directive AggressiveExplore
-route_design -directive Explore
 phys_opt_design -directive AggressiveExplore

 set impl_elapsed [expr {[clock seconds] - $impl_start}]
@@ -29,7 +29,7 @@ import sys
 # Add this directory to path for imports
 sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))

-from fpga_model import SignalChain, sign_extend
+from fpga_model import SignalChain


 # =============================================================================
@@ -93,7 +93,7 @@ SCENARIOS = {
 def load_adc_hex(filepath):
    """Load 8-bit unsigned ADC samples from hex file."""
    samples = []
-    with open(filepath, 'r') as f:
+    with open(filepath) as f:
        for line in f:
            line = line.strip()
            if not line or line.startswith('//'):
@@ -106,8 +106,8 @@ def load_rtl_csv(filepath):
    """Load RTL baseband output CSV (sample_idx, baseband_i, baseband_q)."""
    bb_i = []
    bb_q = []
-    with open(filepath, 'r') as f:
-        header = f.readline()  # Skip header
+    with open(filepath) as f:
+        f.readline()  # Skip header
        for line in f:
            line = line.strip()
            if not line:
@@ -125,7 +125,6 @@ def run_python_model(adc_samples):
    because the RTL testbench captures the FIR output directly
    (baseband_i_reg <= fir_i_out in ddc_400m.v).
    """
-    print("  Running Python model...")

    chain = SignalChain()
    result = chain.process_adc_block(adc_samples)
@@ -135,7 +134,6 @@ def run_python_model(adc_samples):
    bb_i = result['fir_i_raw']
    bb_q = result['fir_q_raw']

-    print(f"  Python model: {len(bb_i)} baseband I, {len(bb_q)} baseband Q outputs")
    return bb_i, bb_q


@@ -145,7 +143,7 @@ def compute_rms_error(a, b):
        raise ValueError(f"Length mismatch: {len(a)} vs {len(b)}")
    if len(a) == 0:
        return 0.0
-    sum_sq = sum((x - y) ** 2 for x, y in zip(a, b))
+    sum_sq = sum((x - y) ** 2 for x, y in zip(a, b, strict=False))
    return math.sqrt(sum_sq / len(a))


@@ -153,7 +151,7 @@ def compute_max_abs_error(a, b):
    """Compute maximum absolute error between two equal-length lists."""
    if len(a) != len(b) or len(a) == 0:
        return 0
-    return max(abs(x - y) for x, y in zip(a, b))
+    return max(abs(x - y) for x, y in zip(a, b, strict=False))


 def compute_correlation(a, b):
@@ -235,44 +233,29 @@ def compute_signal_stats(samples):
 def compare_scenario(scenario_name):
    """Run comparison for one scenario. Returns True if passed."""
    if scenario_name not in SCENARIOS:
-        print(f"ERROR: Unknown scenario '{scenario_name}'")
-        print(f"Available: {', '.join(SCENARIOS.keys())}")
        return False

    cfg = SCENARIOS[scenario_name]
    base_dir = os.path.dirname(os.path.abspath(__file__))

-    print("=" * 60)
-    print(f"Co-simulation Comparison: {cfg['description']}")
-    print(f"Scenario: {scenario_name}")
-    print("=" * 60)

    # ---- Load ADC data ----
    adc_path = os.path.join(base_dir, cfg['adc_hex'])
    if not os.path.exists(adc_path):
-        print(f"ERROR: ADC hex file not found: {adc_path}")
-        print("Run radar_scene.py first to generate test vectors.")
        return False
    adc_samples = load_adc_hex(adc_path)
-    print(f"\nADC samples loaded: {len(adc_samples)}")

    # ---- Load RTL output ----
    rtl_path = os.path.join(base_dir, cfg['rtl_csv'])
    if not os.path.exists(rtl_path):
-        print(f"ERROR: RTL CSV not found: {rtl_path}")
-        print("Run the RTL simulation first:")
-        print(f"  iverilog -g2001 -DSIMULATION -DSCENARIO_{scenario_name.upper()} ...")
        return False
    rtl_i, rtl_q = load_rtl_csv(rtl_path)
-    print(f"RTL outputs loaded: {len(rtl_i)} I, {len(rtl_q)} Q samples")

    # ---- Run Python model ----
    py_i, py_q = run_python_model(adc_samples)

    # ---- Length comparison ----
-    print(f"\nOutput lengths: RTL={len(rtl_i)}, Python={len(py_i)}")
    len_diff = abs(len(rtl_i) - len(py_i))
-    print(f"Length difference: {len_diff} samples")

    # ---- Signal statistics ----
    rtl_i_stats = compute_signal_stats(rtl_i)
@@ -280,20 +263,10 @@ def compare_scenario(scenario_name):
    py_i_stats = compute_signal_stats(py_i)
    py_q_stats = compute_signal_stats(py_q)

-    print(f"\nSignal Statistics:")
-    print(f"  RTL I: mean={rtl_i_stats['mean']:.1f}, rms={rtl_i_stats['rms']:.1f}, "
-          f"range=[{rtl_i_stats['min']}, {rtl_i_stats['max']}]")
-    print(f"  RTL Q: mean={rtl_q_stats['mean']:.1f}, rms={rtl_q_stats['rms']:.1f}, "
-          f"range=[{rtl_q_stats['min']}, {rtl_q_stats['max']}]")
-    print(f"  Py  I: mean={py_i_stats['mean']:.1f}, rms={py_i_stats['rms']:.1f}, "
-          f"range=[{py_i_stats['min']}, {py_i_stats['max']}]")
-    print(f"  Py  Q: mean={py_q_stats['mean']:.1f}, rms={py_q_stats['rms']:.1f}, "
-          f"range=[{py_q_stats['min']}, {py_q_stats['max']}]")

    # ---- Trim to common length ----
    common_len = min(len(rtl_i), len(py_i))
    if common_len < 10:
-        print(f"ERROR: Too few common samples ({common_len})")
        return False

    rtl_i_trim = rtl_i[:common_len]
@@ -302,18 +275,14 @@ def compare_scenario(scenario_name):
    py_q_trim = py_q[:common_len]

    # ---- Cross-correlation to find latency offset ----
-    print(f"\nLatency alignment (cross-correlation, max lag=±{MAX_LATENCY_DRIFT}):")
-    lag_i, corr_i = cross_correlate_lag(rtl_i_trim, py_i_trim,
+    lag_i, _corr_i = cross_correlate_lag(rtl_i_trim, py_i_trim,
                                        max_lag=MAX_LATENCY_DRIFT)
-    lag_q, corr_q = cross_correlate_lag(rtl_q_trim, py_q_trim,
+    lag_q, _corr_q = cross_correlate_lag(rtl_q_trim, py_q_trim,
                                        max_lag=MAX_LATENCY_DRIFT)
-    print(f"  I-channel: best lag={lag_i}, correlation={corr_i:.6f}")
-    print(f"  Q-channel: best lag={lag_q}, correlation={corr_q:.6f}")

    # ---- Apply latency correction ----
    best_lag = lag_i  # Use I-channel lag (should be same as Q)
    if abs(lag_i - lag_q) > 1:
-        print(f"  WARNING: I and Q latency offsets differ ({lag_i} vs {lag_q})")
        # Use the average
        best_lag = (lag_i + lag_q) // 2

@@ -341,29 +310,20 @@ def compare_scenario(scenario_name):
    aligned_py_i = aligned_py_i[:aligned_len]
    aligned_py_q = aligned_py_q[:aligned_len]

-    print(f"  Applied lag correction: {best_lag} samples")
-    print(f"  Aligned length: {aligned_len} samples")

    # ---- Error metrics (after alignment) ----
    rms_i = compute_rms_error(aligned_rtl_i, aligned_py_i)
    rms_q = compute_rms_error(aligned_rtl_q, aligned_py_q)
-    max_err_i = compute_max_abs_error(aligned_rtl_i, aligned_py_i)
-    max_err_q = compute_max_abs_error(aligned_rtl_q, aligned_py_q)
+    compute_max_abs_error(aligned_rtl_i, aligned_py_i)
+    compute_max_abs_error(aligned_rtl_q, aligned_py_q)
    corr_i_aligned = compute_correlation(aligned_rtl_i, aligned_py_i)
    corr_q_aligned = compute_correlation(aligned_rtl_q, aligned_py_q)

-    print(f"\nError Metrics (after alignment):")
-    print(f"  I-channel: RMS={rms_i:.2f} LSB, max={max_err_i} LSB, corr={corr_i_aligned:.6f}")
-    print(f"  Q-channel: RMS={rms_q:.2f} LSB, max={max_err_q} LSB, corr={corr_q_aligned:.6f}")

    # ---- First/last sample comparison ----
-    print(f"\nFirst 10 samples (after alignment):")
-    print(f"  {'idx':>4s}  {'RTL_I':>8s}  {'Py_I':>8s}  {'Err_I':>6s}  {'RTL_Q':>8s}  {'Py_Q':>8s}  {'Err_Q':>6s}")
    for k in range(min(10, aligned_len)):
        ei = aligned_rtl_i[k] - aligned_py_i[k]
        eq = aligned_rtl_q[k] - aligned_py_q[k]
-        print(f"  {k:4d}  {aligned_rtl_i[k]:8d}  {aligned_py_i[k]:8d}  {ei:6d}  "
-              f"{aligned_rtl_q[k]:8d}  {aligned_py_q[k]:8d}  {eq:6d}")

    # ---- Write detailed comparison CSV ----
    compare_csv_path = os.path.join(base_dir, f"compare_{scenario_name}.csv")
@@ -374,7 +334,6 @@ def compare_scenario(scenario_name):
            eq = aligned_rtl_q[k] - aligned_py_q[k]
            f.write(f"{k},{aligned_rtl_i[k]},{aligned_py_i[k]},{ei},"
                    f"{aligned_rtl_q[k]},{aligned_py_q[k]},{eq}\n")
-    print(f"\nDetailed comparison written to: {compare_csv_path}")

    # ---- Pass/Fail ----
    max_rms = cfg.get('max_rms', MAX_RMS_ERROR_LSB)
@@ -440,22 +399,15 @@ def compare_scenario(scenario_name):
                     f"|{best_lag}| <= {MAX_LATENCY_DRIFT}"))

    # ---- Report ----
-    print(f"\n{'─' * 60}")
-    print("PASS/FAIL Results:")
    all_pass = True
-    for name, ok, detail in results:
-        status = "PASS" if ok else "FAIL"
-        mark = "[PASS]" if ok else "[FAIL]"
-        print(f"  {mark} {name}: {detail}")
+    for _name, ok, _detail in results:
        if not ok:
            all_pass = False

-    print(f"\n{'=' * 60}")
    if all_pass:
-        print(f"SCENARIO {scenario_name.upper()}: ALL CHECKS PASSED")
+        pass
    else:
-        print(f"SCENARIO {scenario_name.upper()}: SOME CHECKS FAILED")
-    print(f"{'=' * 60}")
+        pass

    return all_pass

@@ -479,25 +431,18 @@ def main():
                        pass_count += 1
                    else:
                        overall_pass = False
-                    print()
                else:
-                    print(f"Skipping {name}: RTL CSV not found ({cfg['rtl_csv']})")
+                    pass

-            print("=" * 60)
-            print(f"OVERALL: {pass_count}/{run_count} scenarios passed")
            if overall_pass:
-                print("ALL SCENARIOS PASSED")
+                pass
            else:
-                print("SOME SCENARIOS FAILED")
-            print("=" * 60)
+                pass
            return 0 if overall_pass else 1
-        else:
-            ok = compare_scenario(scenario)
-            return 0 if ok else 1
-    else:
-        # Default: DC
-        ok = compare_scenario('dc')
+        ok = compare_scenario(scenario)
        return 0 if ok else 1
+    ok = compare_scenario('dc')
+    return 0 if ok else 1


 if __name__ == '__main__':
@@ -4085,4 +4085,3 @@ idx,rtl_i,py_i,err_i,rtl_q,py_q,err_q
 4083,21,20,1,-6,-6,0
 4084,20,21,-1,-6,-6,0
 4085,20,20,0,-5,-6,1
-4086,20,20,0,-5,-5,0
@@ -73,8 +73,8 @@ def load_doppler_csv(filepath):
    Returns dict: {rbin: [(dbin, i, q), ...]}
    """
    data = {}
-    with open(filepath, 'r') as f:
-        header = f.readline()
+    with open(filepath) as f:
+        f.readline()  # Skip header
        for line in f:
            line = line.strip()
            if not line:
@@ -117,7 +117,7 @@ def pearson_correlation(a, b):

 def magnitude_l1(i_arr, q_arr):
    """L1 magnitude: |I| + |Q|."""
-    return [abs(i) + abs(q) for i, q in zip(i_arr, q_arr)]
+    return [abs(i) + abs(q) for i, q in zip(i_arr, q_arr, strict=False)]


 def find_peak_bin(i_arr, q_arr):
@@ -143,7 +143,7 @@ def total_energy(data_dict):
    """Sum of I^2 + Q^2 across all range bins and Doppler bins."""
    total = 0
    for rbin in data_dict:
-        for (dbin, i_val, q_val) in data_dict[rbin]:
+        for (_dbin, i_val, q_val) in data_dict[rbin]:
            total += i_val * i_val + q_val * q_val
    return total

@@ -154,44 +154,30 @@ def total_energy(data_dict):

 def compare_scenario(name, config, base_dir):
    """Compare one Doppler scenario. Returns (passed, result_dict)."""
-    print(f"\n{'='*60}")
-    print(f"Scenario: {name} — {config['description']}")
-    print(f"{'='*60}")

    golden_path = os.path.join(base_dir, config['golden_csv'])
    rtl_path = os.path.join(base_dir, config['rtl_csv'])

    if not os.path.exists(golden_path):
-        print(f"  ERROR: Golden CSV not found: {golden_path}")
-        print(f"  Run: python3 gen_doppler_golden.py")
        return False, {}
    if not os.path.exists(rtl_path):
-        print(f"  ERROR: RTL CSV not found: {rtl_path}")
-        print(f"  Run the Verilog testbench first")
        return False, {}

    py_data = load_doppler_csv(golden_path)
    rtl_data = load_doppler_csv(rtl_path)

-    py_rbins = sorted(py_data.keys())
-    rtl_rbins = sorted(rtl_data.keys())
+    sorted(py_data.keys())
+    sorted(rtl_data.keys())

-    print(f"  Python: {len(py_rbins)} range bins, "
-          f"{sum(len(v) for v in py_data.values())} total samples")
-    print(f"  RTL:    {len(rtl_rbins)} range bins, "
-          f"{sum(len(v) for v in rtl_data.values())} total samples")

    # ---- Check 1: Both have data ----
    py_total = sum(len(v) for v in py_data.values())
    rtl_total = sum(len(v) for v in rtl_data.values())
    if py_total == 0 or rtl_total == 0:
-        print("  ERROR: One or both outputs are empty")
        return False, {}

    # ---- Check 2: Output count ----
    count_ok = (rtl_total == TOTAL_OUTPUTS)
-    print(f"\n  Output count: RTL={rtl_total}, expected={TOTAL_OUTPUTS} "
-          f"{'OK' if count_ok else 'MISMATCH'}")

    # ---- Check 3: Global energy ----
    py_energy = total_energy(py_data)
@@ -201,10 +187,6 @@ def compare_scenario(name, config, base_dir):
    else:
        energy_ratio = 1.0 if rtl_energy == 0 else float('inf')

-    print(f"\n  Global energy:")
-    print(f"    Python: {py_energy}")
-    print(f"    RTL:    {rtl_energy}")
-    print(f"    Ratio:  {energy_ratio:.4f}")

    # ---- Check 4: Per-range-bin analysis ----
    peak_agreements = 0
@@ -236,8 +218,8 @@ def compare_scenario(name, config, base_dir):
        i_correlations.append(corr_i)
        q_correlations.append(corr_q)

-        py_rbin_energy = sum(i*i + q*q for i, q in zip(py_i, py_q))
-        rtl_rbin_energy = sum(i*i + q*q for i, q in zip(rtl_i, rtl_q))
+        py_rbin_energy = sum(i*i + q*q for i, q in zip(py_i, py_q, strict=False))
+        rtl_rbin_energy = sum(i*i + q*q for i, q in zip(rtl_i, rtl_q, strict=False))

        peak_details.append({
            'rbin': rbin,
@@ -255,20 +237,11 @@ def compare_scenario(name, config, base_dir):
    avg_corr_i = sum(i_correlations) / len(i_correlations)
    avg_corr_q = sum(q_correlations) / len(q_correlations)

-    print(f"\n  Per-range-bin metrics:")
-    print(f"    Peak Doppler bin agreement (+/-1 within sub-frame): {peak_agreements}/{RANGE_BINS} "
-          f"({peak_agreement_frac:.0%})")
-    print(f"    Avg magnitude correlation: {avg_mag_corr:.4f}")
-    print(f"    Avg I-channel correlation: {avg_corr_i:.4f}")
-    print(f"    Avg Q-channel correlation: {avg_corr_q:.4f}")

    # Show top 5 range bins by Python energy
-    print(f"\n  Top 5 range bins by Python energy:")
    top_rbins = sorted(peak_details, key=lambda x: -x['py_energy'])[:5]
-    for d in top_rbins:
-        print(f"    rbin={d['rbin']:2d}: py_peak={d['py_peak']:2d}, "
-              f"rtl_peak={d['rtl_peak']:2d}, mag_corr={d['mag_corr']:.3f}, "
-              f"I_corr={d['corr_i']:.3f}, Q_corr={d['corr_q']:.3f}")
+    for _d in top_rbins:
+        pass

    # ---- Pass/Fail ----
    checks = []
@@ -291,11 +264,8 @@ def compare_scenario(name, config, base_dir):
        checks.append((f'High-energy rbin avg mag_corr >= {MAG_CORR_MIN:.2f} '
                        f'(actual={he_mag_corr:.3f})', he_ok))

-    print(f"\n  Pass/Fail Checks:")
    all_pass = True
-    for check_name, passed in checks:
-        status = "PASS" if passed else "FAIL"
-        print(f"    [{status}] {check_name}")
+    for _check_name, passed in checks:
        if not passed:
            all_pass = False

@@ -310,7 +280,6 @@ def compare_scenario(name, config, base_dir):
                f.write(f'{rbin},{dbin},{py_i[dbin]},{py_q[dbin]},'
                        f'{rtl_i[dbin]},{rtl_q[dbin]},'
                        f'{rtl_i[dbin]-py_i[dbin]},{rtl_q[dbin]-py_q[dbin]}\n')
-    print(f"\n  Detailed comparison: {compare_csv}")

    result = {
        'scenario': name,
@@ -333,25 +302,15 @@ def compare_scenario(name, config, base_dir):
 def main():
    base_dir = os.path.dirname(os.path.abspath(__file__))

-    if len(sys.argv) > 1:
-        arg = sys.argv[1].lower()
-    else:
-        arg = 'stationary'
+    arg = sys.argv[1].lower() if len(sys.argv) > 1 else 'stationary'

    if arg == 'all':
        run_scenarios = list(SCENARIOS.keys())
    elif arg in SCENARIOS:
        run_scenarios = [arg]
    else:
-        print(f"Unknown scenario: {arg}")
-        print(f"Valid: {', '.join(SCENARIOS.keys())}, all")
        sys.exit(1)

-    print("=" * 60)
-    print("Doppler Processor Co-Simulation Comparison")
-    print("RTL vs Python model (clean, no pipeline bug replication)")
-    print(f"Scenarios: {', '.join(run_scenarios)}")
-    print("=" * 60)

    results = []
    for name in run_scenarios:
@@ -359,37 +318,20 @@ def main():
        results.append((name, passed, result))

    # Summary
-    print(f"\n{'='*60}")
-    print("SUMMARY")
-    print(f"{'='*60}")

-    print(f"\n  {'Scenario':<15} {'Energy Ratio':>13} {'Mag Corr':>10} "
-          f"{'Peak Agree':>11} {'I Corr':>8} {'Q Corr':>8} {'Status':>8}")
-    print(f"  {'-'*15} {'-'*13} {'-'*10} {'-'*11} {'-'*8} {'-'*8} {'-'*8}")

    all_pass = True
-    for name, passed, result in results:
+    for _name, passed, result in results:
        if not result:
-            print(f"  {name:<15} {'ERROR':>13} {'—':>10} {'—':>11} "
-                  f"{'—':>8} {'—':>8} {'FAIL':>8}")
            all_pass = False
        else:
-            status = "PASS" if passed else "FAIL"
-            print(f"  {name:<15} {result['energy_ratio']:>13.4f} "
-                  f"{result['avg_mag_corr']:>10.4f} "
-                  f"{result['peak_agreement']:>10.0%} "
-                  f"{result['avg_corr_i']:>8.4f} "
-                  f"{result['avg_corr_q']:>8.4f} "
-                  f"{status:>8}")
            if not passed:
                all_pass = False

-    print()
    if all_pass:
-        print("ALL TESTS PASSED")
+        pass
    else:
-        print("SOME TESTS FAILED")
-    print(f"{'='*60}")
+        pass

    sys.exit(0 if all_pass else 1)

@@ -79,8 +79,8 @@ def load_csv(filepath):
    """Load CSV with columns (bin, out_i/range_profile_i, out_q/range_profile_q)."""
    vals_i = []
    vals_q = []
-    with open(filepath, 'r') as f:
-        header = f.readline()
+    with open(filepath) as f:
+        f.readline()  # Skip header
        for line in f:
            line = line.strip()
            if not line:
@@ -93,17 +93,17 @@ def load_csv(filepath):

 def magnitude_spectrum(vals_i, vals_q):
    """Compute magnitude = |I| + |Q| for each bin (L1 norm, matches RTL)."""
-    return [abs(i) + abs(q) for i, q in zip(vals_i, vals_q)]
+    return [abs(i) + abs(q) for i, q in zip(vals_i, vals_q, strict=False)]


 def magnitude_l2(vals_i, vals_q):
    """Compute magnitude = sqrt(I^2 + Q^2) for each bin."""
-    return [math.sqrt(i*i + q*q) for i, q in zip(vals_i, vals_q)]
+    return [math.sqrt(i*i + q*q) for i, q in zip(vals_i, vals_q, strict=False)]


 def total_energy(vals_i, vals_q):
    """Compute total energy (sum of I^2 + Q^2)."""
-    return sum(i*i + q*q for i, q in zip(vals_i, vals_q))
+    return sum(i*i + q*q for i, q in zip(vals_i, vals_q, strict=False))


 def rms_magnitude(vals_i, vals_q):
@@ -111,7 +111,7 @@ def rms_magnitude(vals_i, vals_q):
    n = len(vals_i)
    if n == 0:
        return 0.0
-    return math.sqrt(sum(i*i + q*q for i, q in zip(vals_i, vals_q)) / n)
+    return math.sqrt(sum(i*i + q*q for i, q in zip(vals_i, vals_q, strict=False)) / n)


 def pearson_correlation(a, b):
@@ -144,7 +144,7 @@ def find_peak(vals_i, vals_q):
 def top_n_peaks(mags, n=10):
    """Find the top-N peak bins by magnitude. Returns set of bin indices."""
    indexed = sorted(enumerate(mags), key=lambda x: -x[1])
-    return set(idx for idx, _ in indexed[:n])
+    return {idx for idx, _ in indexed[:n]}


 def spectral_peak_overlap(mags_a, mags_b, n=10):
@@ -163,30 +163,20 @@ def spectral_peak_overlap(mags_a, mags_b, n=10):

 def compare_scenario(scenario_name, config, base_dir):
    """Compare one scenario. Returns (pass/fail, result_dict)."""
-    print(f"\n{'='*60}")
-    print(f"Scenario: {scenario_name} — {config['description']}")
-    print(f"{'='*60}")

    golden_path = os.path.join(base_dir, config['golden_csv'])
    rtl_path = os.path.join(base_dir, config['rtl_csv'])

    if not os.path.exists(golden_path):
-        print(f"  ERROR: Golden CSV not found: {golden_path}")
-        print(f"  Run: python3 gen_mf_cosim_golden.py")
        return False, {}
    if not os.path.exists(rtl_path):
-        print(f"  ERROR: RTL CSV not found: {rtl_path}")
-        print(f"  Run the RTL testbench first")
        return False, {}

    py_i, py_q = load_csv(golden_path)
    rtl_i, rtl_q = load_csv(rtl_path)

-    print(f"  Python model: {len(py_i)} samples")
-    print(f"  RTL output:   {len(rtl_i)} samples")

    if len(py_i) != FFT_SIZE or len(rtl_i) != FFT_SIZE:
-        print(f"  ERROR: Expected {FFT_SIZE} samples from each")
        return False, {}

    # ---- Metric 1: Energy ----
@@ -205,28 +195,17 @@ def compare_scenario(scenario_name, config, base_dir):
        energy_ratio = float('inf') if py_energy == 0 else 0.0
        rms_ratio = float('inf') if py_rms == 0 else 0.0

-    print(f"\n  Energy:")
-    print(f"    Python total energy:  {py_energy}")
-    print(f"    RTL total energy:     {rtl_energy}")
-    print(f"    Energy ratio (RTL/Py): {energy_ratio:.4f}")
-    print(f"    Python RMS:           {py_rms:.2f}")
-    print(f"    RTL RMS:              {rtl_rms:.2f}")
-    print(f"    RMS ratio (RTL/Py):   {rms_ratio:.4f}")

    # ---- Metric 2: Peak location ----
-    py_peak_bin, py_peak_mag = find_peak(py_i, py_q)
-    rtl_peak_bin, rtl_peak_mag = find_peak(rtl_i, rtl_q)
+    py_peak_bin, _py_peak_mag = find_peak(py_i, py_q)
+    rtl_peak_bin, _rtl_peak_mag = find_peak(rtl_i, rtl_q)

-    print(f"\n  Peak location:")
-    print(f"    Python: bin={py_peak_bin}, mag={py_peak_mag}")
-    print(f"    RTL:    bin={rtl_peak_bin}, mag={rtl_peak_mag}")

    # ---- Metric 3: Magnitude spectrum correlation ----
    py_mag = magnitude_l2(py_i, py_q)
    rtl_mag = magnitude_l2(rtl_i, rtl_q)
    mag_corr = pearson_correlation(py_mag, rtl_mag)

-    print(f"\n  Magnitude spectrum correlation: {mag_corr:.6f}")

    # ---- Metric 4: Top-N peak overlap ----
    # Use L1 magnitudes for peak finding (matches RTL)
@@ -235,16 +214,11 @@ def compare_scenario(scenario_name, config, base_dir):
    peak_overlap_10 = spectral_peak_overlap(py_mag_l1, rtl_mag_l1, n=10)
    peak_overlap_20 = spectral_peak_overlap(py_mag_l1, rtl_mag_l1, n=20)

-    print(f"  Top-10 peak overlap:   {peak_overlap_10:.2%}")
-    print(f"  Top-20 peak overlap:   {peak_overlap_20:.2%}")

    # ---- Metric 5: I and Q channel correlation ----
    corr_i = pearson_correlation(py_i, rtl_i)
    corr_q = pearson_correlation(py_q, rtl_q)

-    print(f"\n  Channel correlation:")
-    print(f"    I-channel: {corr_i:.6f}")
-    print(f"    Q-channel: {corr_q:.6f}")

    # ---- Pass/Fail Decision ----
    # The SIMULATION branch uses floating-point twiddles ($cos/$sin) while
@@ -278,11 +252,8 @@ def compare_scenario(scenario_name, config, base_dir):
                    energy_ok))

    # Print checks
-    print(f"\n  Pass/Fail Checks:")
    all_pass = True
-    for name, passed in checks:
-        status = "PASS" if passed else "FAIL"
-        print(f"    [{status}] {name}")
+    for _name, passed in checks:
        if not passed:
            all_pass = False

@@ -310,7 +281,6 @@ def compare_scenario(scenario_name, config, base_dir):
            f.write(f'{k},{py_i[k]},{py_q[k]},{rtl_i[k]},{rtl_q[k]},'
                    f'{py_mag_l1[k]},{rtl_mag_l1[k]},'
                    f'{rtl_i[k]-py_i[k]},{rtl_q[k]-py_q[k]}\n')
-    print(f"\n  Detailed comparison: {compare_csv}")

    return all_pass, result

@@ -322,25 +292,15 @@ def compare_scenario(scenario_name, config, base_dir):
 def main():
    base_dir = os.path.dirname(os.path.abspath(__file__))

-    if len(sys.argv) > 1:
-        arg = sys.argv[1].lower()
-    else:
-        arg = 'chirp'
+    arg = sys.argv[1].lower() if len(sys.argv) > 1 else 'chirp'

    if arg == 'all':
        run_scenarios = list(SCENARIOS.keys())
    elif arg in SCENARIOS:
        run_scenarios = [arg]
    else:
-        print(f"Unknown scenario: {arg}")
-        print(f"Valid: {', '.join(SCENARIOS.keys())}, all")
        sys.exit(1)

-    print("=" * 60)
-    print("Matched Filter Co-Simulation Comparison")
-    print("RTL (synthesis branch) vs Python model (bit-accurate)")
-    print(f"Scenarios: {', '.join(run_scenarios)}")
-    print("=" * 60)

    results = []
    for name in run_scenarios:
@@ -348,37 +308,20 @@ def main():
        results.append((name, passed, result))

    # Summary
-    print(f"\n{'='*60}")
-    print("SUMMARY")
-    print(f"{'='*60}")

-    print(f"\n  {'Scenario':<12} {'Energy Ratio':>13} {'Mag Corr':>10} "
-          f"{'Peak Ovlp':>10} {'Py Peak':>8} {'RTL Peak':>9} {'Status':>8}")
-    print(f"  {'-'*12} {'-'*13} {'-'*10} {'-'*10} {'-'*8} {'-'*9} {'-'*8}")

    all_pass = True
-    for name, passed, result in results:
+    for _name, passed, result in results:
        if not result:
-            print(f"  {name:<12} {'ERROR':>13} {'—':>10} {'—':>10} "
-                  f"{'—':>8} {'—':>9} {'FAIL':>8}")
            all_pass = False
        else:
-            status = "PASS" if passed else "FAIL"
-            print(f"  {name:<12} {result['energy_ratio']:>13.4f} "
-                  f"{result['mag_corr']:>10.4f} "
-                  f"{result['peak_overlap_10']:>9.0%} "
-                  f"{result['py_peak_bin']:>8d} "
-                  f"{result['rtl_peak_bin']:>9d} "
-                  f"{status:>8}")
            if not passed:
                all_pass = False

-    print()
    if all_pass:
-        print("ALL TESTS PASSED")
+        pass
    else:
-        print("SOME TESTS FAILED")
-    print(f"{'='*60}")
+        pass

    sys.exit(0 if all_pass else 1)

@@ -19,7 +19,6 @@ Author: Phase 0.5 co-simulation suite for PLFM_RADAR
 """

 import os
-import struct

 # =============================================================================
 # Fixed-point utility functions
@@ -51,7 +50,7 @@ def saturate(value, bits):
    return value


-def arith_rshift(value, shift, width=None):
+def arith_rshift(value, shift, _width=None):
    """Arithmetic right shift. Python >> on signed int is already arithmetic."""
    return value >> shift

@@ -130,10 +129,7 @@ class NCO:
        raw_index = lut_address & 0x3F

        # RTL: lut_index = (quadrant[0] ^ quadrant[1]) ? ~lut_address[5:0] : lut_address[5:0]
-        if (quadrant & 1) ^ ((quadrant >> 1) & 1):
-            lut_index = (~raw_index) & 0x3F
-        else:
-            lut_index = raw_index
+        lut_index = ~raw_index & 63 if quadrant & 1 ^ quadrant >> 1 & 1 else raw_index

        return quadrant, lut_index

@@ -176,7 +172,7 @@ class NCO:
            # OLD phase_accum_reg (the value from the PREVIOUS call).
            # We stored self.phase_accum_reg at the start of this call as the
            # value from last cycle. So:
-            pass  # phase_with_offset computed below from OLD values
+            # phase_with_offset computed below from OLD values

        # Compute all NBA assignments from OLD state:
        # Save old state for NBA evaluation
@@ -196,18 +192,13 @@ class NCO:

        if phase_valid:
            # Stage 1 NBA: phase_accum_reg <= phase_accumulator (old value)
-            new_phase_accum_reg = (self.phase_accumulator - ftw) & 0xFFFFFFFF  # old accum before add
+            _new_phase_accum_reg = (self.phase_accumulator - ftw) & 0xFFFFFFFF
            # Wait - let me re-derive. The Verilog is:
-            #   phase_accumulator <= phase_accumulator + frequency_tuning_word;
-            #   phase_accum_reg   <= phase_accumulator;  // OLD value (NBA)
-            #   phase_with_offset <= phase_accum_reg + {phase_offset, 16'b0};  // OLD phase_accum_reg
-            # Since all are NBA (<=), they all read the values from BEFORE this edge.
-            # So: new_phase_accumulator = old_phase_accumulator + ftw
-            #     new_phase_accum_reg   = old_phase_accumulator
-            #     new_phase_with_offset = old_phase_accum_reg + offset
            old_phase_accumulator = (self.phase_accumulator - ftw) & 0xFFFFFFFF  # reconstruct
            self.phase_accum_reg = old_phase_accumulator
-            self.phase_with_offset = (old_phase_accum_reg + ((phase_offset << 16) & 0xFFFFFFFF)) & 0xFFFFFFFF
+            self.phase_with_offset = (
+                old_phase_accum_reg + ((phase_offset << 16) & 0xFFFFFFFF)
+            ) & 0xFFFFFFFF
            # phase_accumulator was already updated above

        # ---- Stage 3a: Register LUT address + quadrant ----
@@ -300,9 +291,12 @@ class Mixer:
        Convert 8-bit unsigned ADC to 18-bit signed.
        RTL: adc_signed_w = {1'b0, adc_data, {9{1'b0}}} -
                            {1'b0, {8{1'b1}}, {9{1'b0}}} / 2
-        = (adc_data << 9) - (0xFF << 9) / 2
-        = (adc_data << 9) - (0xFF << 8)  [integer division]
-        = (adc_data << 9) - 0x7F80
+
+        Verilog '/' binds tighter than '-', so the division applies
+        only to the second concatenation:
+            {1'b0, 8'hFF, 9'b0} = 0x1FE00
+            0x1FE00 / 2 = 0xFF00 = 65280
+        Result: (adc_data << 9) - 0xFF00
        """
        adc_data_8bit = adc_data_8bit & 0xFF
        # {1'b0, adc_data, 9'b0} = adc_data << 9, zero-padded to 18 bits
@@ -608,8 +602,14 @@ class FIRFilter:
        if (old_valid_pipe >> 0) & 1:
            for i in range(16):
                # Sign-extend products to ACCUM_WIDTH
-                a = sign_extend(mult_results[2*i] & ((1 << self.PRODUCT_WIDTH) - 1), self.PRODUCT_WIDTH)
-                b = sign_extend(mult_results[2*i+1] & ((1 << self.PRODUCT_WIDTH) - 1), self.PRODUCT_WIDTH)
+                a = sign_extend(
+                    mult_results[2 * i] & ((1 << self.PRODUCT_WIDTH) - 1),
+                    self.PRODUCT_WIDTH,
+                )
+                b = sign_extend(
+                    mult_results[2 * i + 1] & ((1 << self.PRODUCT_WIDTH) - 1),
+                    self.PRODUCT_WIDTH,
+                )
                self.add_l0[i] = a + b

        # ---- Stage 2 (Level 1): 8 pairwise sums ----
@@ -698,7 +698,6 @@ class DDCInputInterface:
        if old_valid_sync:
            ddc_i = sign_extend(ddc_i_18 & 0x3FFFF, 18)
            ddc_q = sign_extend(ddc_q_18 & 0x3FFFF, 18)
-            # adc_i = ddc_i[17:2] + ddc_i[1]  (rounding)
            trunc_i = (ddc_i >> 2) & 0xFFFF  # bits [17:2]
            round_i = (ddc_i >> 1) & 1       # bit [1]
            trunc_q = (ddc_q >> 2) & 0xFFFF
@@ -724,7 +723,7 @@ def load_twiddle_rom(filepath=None):
        filepath = os.path.join(base, '..', '..', 'fft_twiddle_1024.mem')

    values = []
-    with open(filepath, 'r') as f:
+    with open(filepath) as f:
        for line in f:
            line = line.strip()
            if not line or line.startswith('//'):
@@ -752,12 +751,11 @@ def _twiddle_lookup(k, n, cos_rom):

    if k == 0:
        return cos_rom[0], 0
-    elif k == n4:
+    if k == n4:
        return 0, cos_rom[0]
-    elif k < n4:
+    if k < n4:
        return cos_rom[k], cos_rom[n4 - k]
-    else:
-        return sign_extend((-cos_rom[n2 - k]) & 0xFFFF, 16), cos_rom[k - n4]
+    return sign_extend((-cos_rom[n2 - k]) & 0xFFFF, 16), cos_rom[k - n4]


 class FFTEngine:
@@ -812,7 +810,6 @@ class FFTEngine:
        # COMPUTE: LOG2N stages of butterflies
        for stage in range(log2n):
            half = 1 << stage
-            span = half << 1
            tw_stride = (n >> 1) >> stage

            for bfly in range(n // 2):
@@ -833,11 +830,9 @@ class FFTEngine:

                # Multiply (49-bit products)
                if not inverse:
-                    # Forward: t = b * (cos + j*sin)
                    prod_re = b_re * tw_cos + b_im * tw_sin
                    prod_im = b_im * tw_cos - b_re * tw_sin
                else:
-                    # Inverse: t = b * (cos - j*sin)
                    prod_re = b_re * tw_cos - b_im * tw_sin
                    prod_im = b_im * tw_cos + b_re * tw_sin

@@ -916,10 +911,9 @@ class FreqMatchedFilter:
            # Saturation check
            if rounded > 0x3FFF8000:
                return 0x7FFF
-            elif rounded < -0x3FFF8000:
+            if rounded < -0x3FFF8000:
                return sign_extend(0x8000, 16)
-            else:
-                return sign_extend((rounded >> 15) & 0xFFFF, 16)
+            return sign_extend((rounded >> 15) & 0xFFFF, 16)

        out_re = round_sat_extract(real_sum)
        out_im = round_sat_extract(imag_sum)
@@ -1054,7 +1048,6 @@ class RangeBinDecimator:
                out_im.append(best_im)

            elif mode == 2:
-                # Averaging: sum >> 4
                sum_re = 0
                sum_im = 0
                for s in range(df):
@@ -1344,66 +1337,48 @@ def _self_test():
    """Quick sanity checks for each module."""
    import math

-    print("=" * 60)
-    print("FPGA Model Self-Test")
-    print("=" * 60)

    # --- NCO test ---
-    print("\n--- NCO Test ---")
    nco = NCO()
    ftw = 0x4CCCCCCD  # 120 MHz at 400 MSPS
    # Run 20 cycles to fill pipeline
    results = []
-    for i in range(20):
+    for _ in range(20):
        s, c, ready = nco.step(ftw)
        if ready:
            results.append((s, c))

    if results:
-        print(f"  First valid output: sin={results[0][0]}, cos={results[0][1]}")
-        print(f"  Got {len(results)} valid outputs from 20 cycles")
        # Check quadrature: sin^2 + cos^2 should be approximately 32767^2
        s, c = results[-1]
        mag_sq = s * s + c * c
        expected = 32767 * 32767
-        error_pct = abs(mag_sq - expected) / expected * 100
-        print(f"  Quadrature check: sin^2+cos^2={mag_sq}, expected~{expected}, error={error_pct:.2f}%")
-    print("  NCO: OK")
+        abs(mag_sq - expected) / expected * 100

    # --- Mixer test ---
-    print("\n--- Mixer Test ---")
    mixer = Mixer()
    # Test with mid-scale ADC (128) and known cos/sin
-    for i in range(5):
-        mi, mq, mv = mixer.step(128, 0x7FFF, 0, True, True)
-    print(f"  Mixer with adc=128, cos=max, sin=0: I={mi}, Q={mq}, valid={mv}")
-    print("  Mixer: OK")
+    for _ in range(5):
+        _mi, _mq, _mv = mixer.step(128, 0x7FFF, 0, True, True)

    # --- CIC test ---
-    print("\n--- CIC Test ---")
    cic = CICDecimator()
    dc_val = sign_extend(0x1000, 18)  # Small positive DC
    out_count = 0
-    for i in range(100):
-        out, valid = cic.step(dc_val, True)
+    for _ in range(100):
+        _, valid = cic.step(dc_val, True)
        if valid:
            out_count += 1
-    print(f"  CIC: {out_count} outputs from 100 inputs (expect ~25 with 4x decimation + pipeline)")
-    print("  CIC: OK")

    # --- FIR test ---
-    print("\n--- FIR Test ---")
    fir = FIRFilter()
    out_count = 0
-    for i in range(50):
-        out, valid = fir.step(1000, True)
+    for _ in range(50):
+        _out, valid = fir.step(1000, True)
        if valid:
            out_count += 1
-    print(f"  FIR: {out_count} outputs from 50 inputs (expect ~43 with 7-cycle latency)")
-    print("  FIR: OK")

    # --- FFT test ---
-    print("\n--- FFT Test (1024-pt) ---")
    try:
        fft = FFTEngine(n=1024)
        # Single tone at bin 10
@@ -1415,43 +1390,28 @@ def _self_test():
        out_re, out_im = fft.compute(in_re, in_im, inverse=False)
        # Find peak bin
        max_mag = 0
-        peak_bin = 0
        for i in range(512):
            mag = abs(out_re[i]) + abs(out_im[i])
            if mag > max_mag:
                max_mag = mag
-                peak_bin = i
-        print(f"  FFT peak at bin {peak_bin} (expected 10), magnitude={max_mag}")
        # IFFT roundtrip
-        rt_re, rt_im = fft.compute(out_re, out_im, inverse=True)
-        max_err = max(abs(rt_re[i] - in_re[i]) for i in range(1024))
-        print(f"  FFT->IFFT roundtrip max error: {max_err} LSBs")
-        print("  FFT: OK")
+        rt_re, _rt_im = fft.compute(out_re, out_im, inverse=True)
+        max(abs(rt_re[i] - in_re[i]) for i in range(1024))
    except FileNotFoundError:
-        print("  FFT: SKIPPED (twiddle file not found)")
+        pass

    # --- Conjugate multiply test ---
-    print("\n--- Conjugate Multiply Test ---")
    # (1+j0) * conj(1+j0) = 1+j0
    # In Q15: 32767 * 32767 -> should get close to 32767
-    r, m = FreqMatchedFilter.conjugate_multiply_sample(0x7FFF, 0, 0x7FFF, 0)
-    print(f"  (32767+j0) * conj(32767+j0) = {r}+j{m} (expect ~32767+j0)")
+    _r, _m = FreqMatchedFilter.conjugate_multiply_sample(0x7FFF, 0, 0x7FFF, 0)
    # (0+j32767) * conj(0+j32767) = (0+j32767)(0-j32767) = 32767^2 -> ~32767
-    r2, m2 = FreqMatchedFilter.conjugate_multiply_sample(0, 0x7FFF, 0, 0x7FFF)
-    print(f"  (0+j32767) * conj(0+j32767) = {r2}+j{m2} (expect ~32767+j0)")
-    print("  Conjugate Multiply: OK")
+    _r2, _m2 = FreqMatchedFilter.conjugate_multiply_sample(0, 0x7FFF, 0, 0x7FFF)

    # --- Range decimator test ---
-    print("\n--- Range Bin Decimator Test ---")
    test_re = list(range(1024))
    test_im = [0] * 1024
    out_re, out_im = RangeBinDecimator.decimate(test_re, test_im, mode=0)
-    print(f"  Mode 0 (center): first 5 bins = {out_re[:5]} (expect [8, 24, 40, 56, 72])")
-    print("  Range Decimator: OK")

-    print("\n" + "=" * 60)
-    print("ALL SELF-TESTS PASSED")
-    print("=" * 60)


 if __name__ == '__main__':
@@ -82,8 +82,8 @@ def generate_full_long_chirp():
    for n in range(LONG_CHIRP_SAMPLES):
        t = n / FS_SYS
        phase = math.pi * chirp_rate * t * t
-        re_val = int(round(Q15_MAX * SCALE * math.cos(phase)))
-        im_val = int(round(Q15_MAX * SCALE * math.sin(phase)))
+        re_val = round(Q15_MAX * SCALE * math.cos(phase))
+        im_val = round(Q15_MAX * SCALE * math.sin(phase))
        chirp_i.append(max(-32768, min(32767, re_val)))
        chirp_q.append(max(-32768, min(32767, im_val)))

@@ -105,8 +105,8 @@ def generate_short_chirp():
    for n in range(SHORT_CHIRP_SAMPLES):
        t = n / FS_SYS
        phase = math.pi * chirp_rate * t * t
-        re_val = int(round(Q15_MAX * SCALE * math.cos(phase)))
-        im_val = int(round(Q15_MAX * SCALE * math.sin(phase)))
+        re_val = round(Q15_MAX * SCALE * math.cos(phase))
+        im_val = round(Q15_MAX * SCALE * math.sin(phase))
        chirp_i.append(max(-32768, min(32767, re_val)))
        chirp_q.append(max(-32768, min(32767, im_val)))

@@ -126,40 +126,17 @@ def write_mem_file(filename, values):
    with open(path, 'w') as f:
        for v in values:
            f.write(to_hex16(v) + '\n')
-    print(f"  Wrote {filename}: {len(values)} entries")


 def main():
-    print("=" * 60)
-    print("AERIS-10 Chirp .mem File Generator")
-    print("=" * 60)
-    print()
-    print(f"Parameters:")
-    print(f"  CHIRP_BW         = {CHIRP_BW/1e6:.1f} MHz")
-    print(f"  FS_SYS           = {FS_SYS/1e6:.1f} MHz")
-    print(f"  T_LONG_CHIRP     = {T_LONG_CHIRP*1e6:.1f} us")
-    print(f"  T_SHORT_CHIRP    = {T_SHORT_CHIRP*1e6:.1f} us")
-    print(f"  LONG_CHIRP_SAMPLES = {LONG_CHIRP_SAMPLES}")
-    print(f"  SHORT_CHIRP_SAMPLES = {SHORT_CHIRP_SAMPLES}")
-    print(f"  FFT_SIZE         = {FFT_SIZE}")
-    print(f"  Chirp rate (long)  = {CHIRP_BW/T_LONG_CHIRP:.3e} Hz/s")
-    print(f"  Chirp rate (short) = {CHIRP_BW/T_SHORT_CHIRP:.3e} Hz/s")
-    print(f"  Q15 scale        = {SCALE}")
-    print()

    # ---- Long chirp ----
-    print("Generating full long chirp (3000 samples)...")
    long_i, long_q = generate_full_long_chirp()

    # Verify first sample matches generate_reference_chirp_q15() from radar_scene.py
    # (which only generates the first 1024 samples)
-    print(f"  Sample[0]:    I={long_i[0]:6d}  Q={long_q[0]:6d}")
-    print(f"  Sample[1023]: I={long_i[1023]:6d}  Q={long_q[1023]:6d}")
-    print(f"  Sample[2999]: I={long_i[2999]:6d}  Q={long_q[2999]:6d}")

    # Segment into 4 x 1024 blocks
-    print()
-    print("Segmenting into 4 x 1024 blocks...")
    for seg in range(LONG_SEGMENTS):
        start = seg * FFT_SIZE
        end = start + FFT_SIZE
@@ -177,27 +154,18 @@ def main():
                seg_i.append(0)
                seg_q.append(0)

-        zero_count = FFT_SIZE - valid_count
-        print(f"  Seg {seg}: indices [{start}:{end-1}], "
-              f"valid={valid_count}, zeros={zero_count}")
+        FFT_SIZE - valid_count

        write_mem_file(f"long_chirp_seg{seg}_i.mem", seg_i)
        write_mem_file(f"long_chirp_seg{seg}_q.mem", seg_q)

    # ---- Short chirp ----
-    print()
-    print("Generating short chirp (50 samples)...")
    short_i, short_q = generate_short_chirp()
-    print(f"  Sample[0]:  I={short_i[0]:6d}  Q={short_q[0]:6d}")
-    print(f"  Sample[49]: I={short_i[49]:6d}  Q={short_q[49]:6d}")

    write_mem_file("short_chirp_i.mem", short_i)
    write_mem_file("short_chirp_q.mem", short_q)

    # ---- Verification summary ----
-    print()
-    print("=" * 60)
-    print("Verification:")

    # Cross-check seg0 against radar_scene.py generate_reference_chirp_q15()
    # That function generates exactly the first 1024 samples of the chirp
@@ -206,39 +174,30 @@ def main():
    for n in range(FFT_SIZE):
        t = n / FS_SYS
        phase = math.pi * chirp_rate * t * t
-        expected_i = max(-32768, min(32767, int(round(Q15_MAX * SCALE * math.cos(phase)))))
-        expected_q = max(-32768, min(32767, int(round(Q15_MAX * SCALE * math.sin(phase)))))
+        expected_i = max(-32768, min(32767, round(Q15_MAX * SCALE * math.cos(phase))))
+        expected_q = max(-32768, min(32767, round(Q15_MAX * SCALE * math.sin(phase))))
        if long_i[n] != expected_i or long_q[n] != expected_q:
            mismatches += 1

    if mismatches == 0:
-        print(f"  [PASS] Seg0 matches radar_scene.py generate_reference_chirp_q15()")
+        pass
    else:
-        print(f"  [FAIL] Seg0 has {mismatches} mismatches vs generate_reference_chirp_q15()")
        return 1

    # Check magnitude envelope
-    max_mag = max(math.sqrt(i*i + q*q) for i, q in zip(long_i, long_q))
-    print(f"  Max magnitude: {max_mag:.1f} (expected ~{Q15_MAX * SCALE:.1f})")
-    print(f"  Magnitude ratio: {max_mag / (Q15_MAX * SCALE):.6f}")
+    max(math.sqrt(i*i + q*q) for i, q in zip(long_i, long_q, strict=False))

    # Check seg3 zero padding
    seg3_i_path = os.path.join(MEM_DIR, 'long_chirp_seg3_i.mem')
-    with open(seg3_i_path, 'r') as f:
-        seg3_lines = [l.strip() for l in f if l.strip()]
-    nonzero_seg3 = sum(1 for l in seg3_lines if l != '0000')
-    print(f"  Seg3 non-zero entries: {nonzero_seg3}/{len(seg3_lines)} "
-          f"(expected 0 since chirp ends at sample 2999)")
+    with open(seg3_i_path) as f:
+        seg3_lines = [line.strip() for line in f if line.strip()]
+    nonzero_seg3 = sum(1 for line in seg3_lines if line != '0000')

    if nonzero_seg3 == 0:
-        print(f"  [PASS] Seg3 is all zeros (chirp 3000 samples < seg3 start 3072)")
+        pass
    else:
-        print(f"  [WARN] Seg3 has {nonzero_seg3} non-zero entries")
+        pass

-    print()
-    print(f"Generated 10 .mem files in {os.path.abspath(MEM_DIR)}")
-    print("Run validate_mem_files.py to do full validation.")
-    print("=" * 60)

    return 0

@@ -18,14 +18,13 @@ Usage:
 Author: Phase 0.5 Doppler co-simulation suite for PLFM_RADAR
 """

-import math
 import os
 import sys

 sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))

 from fpga_model import (
-    DopplerProcessor, sign_extend, HAMMING_WINDOW
+    DopplerProcessor
 )
 from radar_scene import Target, generate_doppler_frame

@@ -52,7 +51,6 @@ def write_hex_32bit(filepath, samples):
        for (i_val, q_val) in samples:
            packed = ((q_val & 0xFFFF) << 16) | (i_val & 0xFFFF)
            f.write(f"{packed:08X}\n")
-    print(f"  Wrote {len(samples)} packed samples to {filepath}")


 def write_csv(filepath, headers, *columns):
@@ -62,7 +60,6 @@ def write_csv(filepath, headers, *columns):
        for i in range(len(columns[0])):
            row = ','.join(str(col[i]) for col in columns)
            f.write(row + '\n')
-    print(f"  Wrote {len(columns[0])} rows to {filepath}")


 def write_hex_16bit(filepath, data):
@@ -119,22 +116,19 @@ SCENARIOS = {

 def generate_scenario(name, targets, description, base_dir):
    """Generate input hex + golden output for one scenario."""
-    print(f"\n{'='*60}")
-    print(f"Scenario: {name} — {description}")
-    print(f"Model: CLEAN (dual 16-pt FFT)")
-    print(f"{'='*60}")

    # Generate Doppler frame (32 chirps x 64 range bins)
    frame_i, frame_q = generate_doppler_frame(targets, seed=42)

-    print(f"  Generated frame: {len(frame_i)} chirps x {len(frame_i[0])} range bins")

    # ---- Write input hex file (packed 32-bit: {Q, I}) ----
    # RTL expects data streamed chirp-by-chirp: chirp0[rb0..rb63], chirp1[rb0..rb63], ...
    packed_samples = []
    for chirp in range(CHIRPS_PER_FRAME):
-        for rb in range(RANGE_BINS):
-            packed_samples.append((frame_i[chirp][rb], frame_q[chirp][rb]))
+        packed_samples.extend(
+            (frame_i[chirp][rb], frame_q[chirp][rb])
+            for rb in range(RANGE_BINS)
+        )

    input_hex = os.path.join(base_dir, f"doppler_input_{name}.hex")
    write_hex_32bit(input_hex, packed_samples)
@@ -143,8 +137,6 @@ def generate_scenario(name, targets, description, base_dir):
    dp = DopplerProcessor()
    doppler_i, doppler_q = dp.process_frame(frame_i, frame_q)

-    print(f"  Doppler output: {len(doppler_i)} range bins x "
-          f"{len(doppler_i[0])} doppler bins (2 sub-frames x {DOPPLER_FFT_SIZE})")

    # ---- Write golden output CSV ----
    # Format: range_bin, doppler_bin, out_i, out_q
@@ -169,10 +161,9 @@ def generate_scenario(name, targets, description, base_dir):

    # ---- Write golden hex (for optional RTL $readmemh comparison) ----
    golden_hex = os.path.join(base_dir, f"doppler_golden_py_{name}.hex")
-    write_hex_32bit(golden_hex, list(zip(flat_i, flat_q)))
+    write_hex_32bit(golden_hex, list(zip(flat_i, flat_q, strict=False)))

    # ---- Find peak per range bin ----
-    print(f"\n  Peak Doppler bins per range bin (top 5 by magnitude):")
    peak_info = []
    for rbin in range(RANGE_BINS):
        mags = [abs(doppler_i[rbin][d]) + abs(doppler_q[rbin][d])
@@ -183,13 +174,11 @@ def generate_scenario(name, targets, description, base_dir):

    # Sort by magnitude descending, show top 5
    peak_info.sort(key=lambda x: -x[2])
-    for rbin, dbin, mag in peak_info[:5]:
-        i_val = doppler_i[rbin][dbin]
-        q_val = doppler_q[rbin][dbin]
-        sf = dbin // DOPPLER_FFT_SIZE
-        bin_in_sf = dbin % DOPPLER_FFT_SIZE
-        print(f"    rbin={rbin:2d}, dbin={dbin:2d} (sf{sf}:{bin_in_sf:2d}), mag={mag:6d}, "
-              f"I={i_val:6d}, Q={q_val:6d}")
+    for rbin, dbin, _mag in peak_info[:5]:
+        doppler_i[rbin][dbin]
+        doppler_q[rbin][dbin]
+        dbin // DOPPLER_FFT_SIZE
+        dbin % DOPPLER_FFT_SIZE

    return {
        'name': name,
@@ -201,10 +190,6 @@ def generate_scenario(name, targets, description, base_dir):
 def main():
    base_dir = os.path.dirname(os.path.abspath(__file__))

-    print("=" * 60)
-    print("Doppler Processor Co-Sim Golden Reference Generator")
-    print(f"Architecture: dual {DOPPLER_FFT_SIZE}-pt FFT ({DOPPLER_TOTAL_BINS} total bins)")
-    print("=" * 60)

    scenarios_to_run = list(SCENARIOS.keys())

@@ -222,17 +207,9 @@ def main():
        r = generate_scenario(name, targets, description, base_dir)
        results.append(r)

-    print(f"\n{'='*60}")
-    print("Summary:")
-    print(f"{'='*60}")
-    for r in results:
-        print(f"  {r['name']:<15s} top peak: "
-              f"rbin={r['peak_info'][0][0]}, dbin={r['peak_info'][0][1]}, "
-              f"mag={r['peak_info'][0][2]}")
+    for _ in results:
+        pass

-    print(f"\nGenerated {len(results)} scenarios.")
-    print(f"Files written to: {base_dir}")
-    print("=" * 60)


 if __name__ == '__main__':
@@ -25,8 +25,8 @@ import sys
 sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))

 from fpga_model import (
-    FFTEngine, FreqMatchedFilter, MatchedFilterChain,
-    RangeBinDecimator, sign_extend, saturate
+    MatchedFilterChain,
+    sign_extend, saturate
 )


@@ -36,7 +36,7 @@ FFT_SIZE = 1024
 def load_hex_16bit(filepath):
    """Load 16-bit hex file (one value per line, with optional // comments)."""
    values = []
-    with open(filepath, 'r') as f:
+    with open(filepath) as f:
        for line in f:
            line = line.strip()
            if not line or line.startswith('//'):
@@ -75,7 +75,6 @@ def generate_case(case_name, sig_i, sig_q, ref_i, ref_q, description, outdir,

    Returns dict with case info and results.
    """
-    print(f"\n--- {case_name}: {description} ---")

    assert len(sig_i) == FFT_SIZE, f"sig_i length {len(sig_i)} != {FFT_SIZE}"
    assert len(sig_q) == FFT_SIZE
@@ -88,8 +87,6 @@ def generate_case(case_name, sig_i, sig_q, ref_i, ref_q, description, outdir,
        write_hex_16bit(os.path.join(outdir, f"mf_sig_{case_name}_q.hex"), sig_q)
        write_hex_16bit(os.path.join(outdir, f"mf_ref_{case_name}_i.hex"), ref_i)
        write_hex_16bit(os.path.join(outdir, f"mf_ref_{case_name}_q.hex"), ref_q)
-        print(f"  Wrote input hex: mf_sig_{case_name}_{{i,q}}.hex, "
-              f"mf_ref_{case_name}_{{i,q}}.hex")

    # Run through bit-accurate Python model
    mf = MatchedFilterChain(fft_size=FFT_SIZE)
@@ -104,9 +101,6 @@ def generate_case(case_name, sig_i, sig_q, ref_i, ref_q, description, outdir,
            peak_mag = mag
            peak_bin = k

-    print(f"  Output: {len(out_i)} samples")
-    print(f"  Peak bin: {peak_bin}, magnitude: {peak_mag}")
-    print(f"  Peak I={out_i[peak_bin]}, Q={out_q[peak_bin]}")

    # Save golden output hex
    write_hex_16bit(os.path.join(outdir, f"mf_golden_py_i_{case_name}.hex"), out_i)
@@ -135,10 +129,6 @@ def generate_case(case_name, sig_i, sig_q, ref_i, ref_q, description, outdir,
 def main():
    base_dir = os.path.dirname(os.path.abspath(__file__))

-    print("=" * 60)
-    print("Matched Filter Co-Sim Golden Reference Generator")
-    print("Using bit-accurate Python model (fpga_model.py)")
-    print("=" * 60)

    results = []

@@ -158,8 +148,7 @@ def main():
                          base_dir)
        results.append(r)
    else:
-        print("\nWARNING: bb_mf_test / ref_chirp hex files not found.")
-        print("Run radar_scene.py first.")
+        pass

    # ---- Case 2: DC autocorrelation ----
    dc_val = 0x1000  # 4096
@@ -191,8 +180,8 @@ def main():
    sig_q = []
    for n in range(FFT_SIZE):
        angle = 2.0 * math.pi * k * n / FFT_SIZE
-        sig_i.append(saturate(int(round(amp * math.cos(angle))), 16))
-        sig_q.append(saturate(int(round(amp * math.sin(angle))), 16))
+        sig_i.append(saturate(round(amp * math.cos(angle)), 16))
+        sig_q.append(saturate(round(amp * math.sin(angle)), 16))
    ref_i = list(sig_i)
    ref_q = list(sig_q)
    r = generate_case("tone5", sig_i, sig_q, ref_i, ref_q,
@@ -201,16 +190,9 @@ def main():
    results.append(r)

    # ---- Summary ----
-    print("\n" + "=" * 60)
-    print("Summary:")
-    print("=" * 60)
-    for r in results:
-        print(f"  {r['case_name']:10s}: peak at bin {r['peak_bin']}, "
-              f"mag={r['peak_mag']}, I={r['peak_i']}, Q={r['peak_q']}")
+    for _ in results:
+        pass

-    print(f"\nGenerated {len(results)} golden reference cases.")
-    print("Files written to:", base_dir)
-    print("=" * 60)


 if __name__ == '__main__':
@@ -5,7 +5,7 @@ gen_multiseg_golden.py
 Generate golden reference data for matched_filter_multi_segment co-simulation.

 Tests the overlap-save segmented convolution wrapper:
-  - Long chirp: 3072 samples (4 segments × 1024, with 128-sample overlap)
+  - Long chirp: 3072 samples (4 segments x 1024, with 128-sample overlap)
  - Short chirp: 50 samples zero-padded to 1024 (1 segment)

 The matched_filter_processing_chain is already verified bit-perfect.
@@ -208,7 +208,6 @@ def generate_long_chirp_test():
    input_buffer_i = [0] * BUFFER_SIZE
    input_buffer_q = [0] * BUFFER_SIZE
    buffer_write_ptr = 0
-    current_segment = 0
    input_idx = 0
    chirp_samples_collected = 0

@@ -219,7 +218,8 @@ def generate_long_chirp_test():
        if seg == 0:
            buffer_write_ptr = 0
        else:
-            # Overlap-save: copy buffer[SEGMENT_ADVANCE:SEGMENT_ADVANCE+OVERLAP] -> buffer[0:OVERLAP]
+            # Overlap-save: copy
+            # buffer[SEGMENT_ADVANCE:SEGMENT_ADVANCE+OVERLAP] -> buffer[0:OVERLAP]
            for i in range(OVERLAP_SAMPLES):
                input_buffer_i[i] = input_buffer_i[i + SEGMENT_ADVANCE]
                input_buffer_q[i] = input_buffer_q[i + SEGMENT_ADVANCE]
@@ -234,7 +234,6 @@ def generate_long_chirp_test():
                # In radar_receiver_final.v, the DDC output is sign-extended:
                #   .ddc_i({{2{adc_i_scaled[15]}}, adc_i_scaled})
                # So 16-bit -> 18-bit sign-extend -> then multi_segment does:
-                #   ddc_i[17:2] + ddc_i[1]
                # For sign-extended 18-bit from 16-bit:
                #   ddc_i[17:2] = original 16-bit value (since bits [17:16] = sign extension)
                #   ddc_i[1] = bit 1 of original value
@@ -277,9 +276,6 @@ def generate_long_chirp_test():
        out_re, out_im = mf_chain.process(seg_data_i, seg_data_q, ref_i, ref_q)
        segment_results.append((out_re, out_im))

-        print(f"  Segment {seg}: collected {buffer_write_ptr} buffer samples, "
-              f"total chirp samples = {chirp_samples_collected}, "
-              f"input_idx = {input_idx}")

    # Write hex files for the testbench
    out_dir = os.path.dirname(os.path.abspath(__file__))
@@ -317,7 +313,6 @@ def generate_long_chirp_test():
            for b in range(1024):
                f.write(f'{seg},{b},{out_re[b]},{out_im[b]}\n')

-    print(f"\n  Written {LONG_SEGMENTS * 1024} golden samples to {csv_path}")

    return TOTAL_SAMPLES, LONG_SEGMENTS, segment_results

@@ -342,8 +337,9 @@ def generate_short_chirp_test():
        input_q.append(saturate(val_q, 16))

    # Zero-pad to 1024 (as RTL does in ST_ZERO_PAD)
-    padded_i = list(input_i) + [0] * (BUFFER_SIZE - SHORT_SAMPLES)
-    padded_q = list(input_q) + [0] * (BUFFER_SIZE - SHORT_SAMPLES)
+    # Note: padding computed here for documentation; actual buffer uses buf_i/buf_q below
+    _padded_i = list(input_i) + [0] * (BUFFER_SIZE - SHORT_SAMPLES)
+    _padded_q = list(input_q) + [0] * (BUFFER_SIZE - SHORT_SAMPLES)

    # The buffer truncation: ddc_i[17:2] + ddc_i[1]
    # For data already 16-bit sign-extended to 18: result is (val >> 2) + bit1
@@ -380,7 +376,6 @@ def generate_short_chirp_test():
    # Write hex files
    out_dir = os.path.dirname(os.path.abspath(__file__))

-    # Input (18-bit)
    all_input_i_18 = []
    all_input_q_18 = []
    for n in range(SHORT_SAMPLES):
@@ -402,19 +397,12 @@ def generate_short_chirp_test():
        for b in range(1024):
            f.write(f'{b},{out_re[b]},{out_im[b]}\n')

-    print(f"  Written 1024 short chirp golden samples to {csv_path}")
    return out_re, out_im


 if __name__ == '__main__':
-    print("=" * 60)
-    print("Multi-Segment Matched Filter Golden Reference Generator")
-    print("=" * 60)

-    print("\n--- Long Chirp (4 segments, overlap-save) ---")
    total_samples, num_segs, seg_results = generate_long_chirp_test()
-    print(f"  Total input samples: {total_samples}")
-    print(f"  Segments: {num_segs}")

    for seg in range(num_segs):
        out_re, out_im = seg_results[seg]
@@ -426,9 +414,7 @@ if __name__ == '__main__':
            if mag > max_mag:
                max_mag = mag
                peak_bin = b
-        print(f"  Seg {seg}: peak at bin {peak_bin}, magnitude {max_mag}")

-    print("\n--- Short Chirp (1 segment, zero-padded) ---")
    short_re, short_im = generate_short_chirp_test()
    max_mag = 0
    peak_bin = 0
@@ -437,8 +423,3 @@ if __name__ == '__main__':
        if mag > max_mag:
            max_mag = mag
            peak_bin = b
-    print(f"  Short chirp: peak at bin {peak_bin}, magnitude {max_mag}")
-
-    print("\n" + "=" * 60)
-    print("ALL GOLDEN FILES GENERATED")
-    print("=" * 60)
@@ -21,7 +21,6 @@ Author: Phase 0.5 co-simulation suite for PLFM_RADAR

 import math
 import os
-import struct


 # =============================================================================
@@ -156,7 +155,7 @@ def generate_if_chirp(n_samples, chirp_bw=CHIRP_BW, f_if=F_IF, fs=FS_ADC):
        t = n / fs
        # Instantaneous frequency: f_if - chirp_bw/2 + chirp_rate * t
        # Phase: integral of 2*pi*f(t)*dt
-        f_inst = f_if - chirp_bw / 2 + chirp_rate * t
+        _f_inst = f_if - chirp_bw / 2 + chirp_rate * t
        phase = 2 * math.pi * (f_if - chirp_bw / 2) * t + math.pi * chirp_rate * t * t
        chirp_i.append(math.cos(phase))
        chirp_q.append(math.sin(phase))
@@ -164,7 +163,7 @@ def generate_if_chirp(n_samples, chirp_bw=CHIRP_BW, f_if=F_IF, fs=FS_ADC):
    return chirp_i, chirp_q


-def generate_reference_chirp_q15(n_fft=FFT_SIZE, chirp_bw=CHIRP_BW, f_if=F_IF, fs=FS_ADC):
+def generate_reference_chirp_q15(n_fft=FFT_SIZE, chirp_bw=CHIRP_BW, _f_if=F_IF, _fs=FS_ADC):
    """
    Generate a reference chirp in Q15 format for the matched filter.

@@ -191,8 +190,8 @@ def generate_reference_chirp_q15(n_fft=FFT_SIZE, chirp_bw=CHIRP_BW, f_if=F_IF, f
        # The beat frequency from a target at delay tau is: f_beat = chirp_rate * tau
        # Reference chirp is the TX chirp at baseband (zero delay)
        phase = math.pi * chirp_rate * t * t
-        re_val = int(round(32767 * 0.9 * math.cos(phase)))
-        im_val = int(round(32767 * 0.9 * math.sin(phase)))
+        re_val = round(32767 * 0.9 * math.cos(phase))
+        im_val = round(32767 * 0.9 * math.sin(phase))
        ref_re[n] = max(-32768, min(32767, re_val))
        ref_im[n] = max(-32768, min(32767, im_val))

@@ -285,7 +284,7 @@ def generate_adc_samples(targets, n_samples, noise_stddev=3.0,
    # Quantize to 8-bit unsigned (0-255), centered at 128
    adc_samples = []
    for val in adc_float:
-        quantized = int(round(val + 128))
+        quantized = round(val + 128)
        quantized = max(0, min(255, quantized))
        adc_samples.append(quantized)

@@ -347,8 +346,8 @@ def generate_baseband_samples(targets, n_samples_baseband, noise_stddev=0.5,
    bb_i = []
    bb_q = []
    for n in range(n_samples_baseband):
-        i_val = int(round(bb_i_float[n] + noise_stddev * rand_gaussian()))
-        q_val = int(round(bb_q_float[n] + noise_stddev * rand_gaussian()))
+        i_val = round(bb_i_float[n] + noise_stddev * rand_gaussian())
+        q_val = round(bb_q_float[n] + noise_stddev * rand_gaussian())
        bb_i.append(max(-32768, min(32767, i_val)))
        bb_q.append(max(-32768, min(32767, q_val)))

@@ -399,15 +398,13 @@ def generate_doppler_frame(targets, n_chirps=CHIRPS_PER_FRAME,
        for target in targets:
            # Which range bin does this target fall in?
            # After matched filter + range decimation:
-            # range_bin = target_delay_in_baseband_samples / decimation_factor
            delay_baseband_samples = target.delay_s * FS_SYS
            range_bin_float = delay_baseband_samples * n_range_bins / FFT_SIZE
-            range_bin = int(round(range_bin_float))
+            range_bin = round(range_bin_float)

            if range_bin < 0 or range_bin >= n_range_bins:
                continue

-            # Amplitude (simplified)
            amp = target.amplitude / 4.0

            # Doppler phase for this chirp.
@@ -427,10 +424,7 @@ def generate_doppler_frame(targets, n_chirps=CHIRPS_PER_FRAME,
                rb = range_bin + delta
                if 0 <= rb < n_range_bins:
                    # sinc-like weighting
-                    if delta == 0:
-                        weight = 1.0
-                    else:
-                        weight = 0.2 / abs(delta)
+                    weight = 1.0 if delta == 0 else 0.2 / abs(delta)
                    chirp_i[rb] += amp * weight * math.cos(total_phase)
                    chirp_q[rb] += amp * weight * math.sin(total_phase)

@@ -438,8 +432,8 @@ def generate_doppler_frame(targets, n_chirps=CHIRPS_PER_FRAME,
        row_i = []
        row_q = []
        for rb in range(n_range_bins):
-            i_val = int(round(chirp_i[rb] + noise_stddev * rand_gaussian()))
-            q_val = int(round(chirp_q[rb] + noise_stddev * rand_gaussian()))
+            i_val = round(chirp_i[rb] + noise_stddev * rand_gaussian())
+            q_val = round(chirp_q[rb] + noise_stddev * rand_gaussian())
            row_i.append(max(-32768, min(32767, i_val)))
            row_q.append(max(-32768, min(32767, q_val)))

@@ -467,7 +461,7 @@ def write_hex_file(filepath, samples, bits=8):

    with open(filepath, 'w') as f:
        f.write(f"// {len(samples)} samples, {bits}-bit, hex format for $readmemh\n")
-        for i, s in enumerate(samples):
+        for _i, s in enumerate(samples):
            if bits <= 8:
                val = s & 0xFF
            elif bits <= 16:
@@ -478,7 +472,6 @@ def write_hex_file(filepath, samples, bits=8):
                val = s & ((1 << bits) - 1)
            f.write(fmt.format(val) + "\n")

-    print(f"  Wrote {len(samples)} samples to {filepath}")


 def write_csv_file(filepath, columns, headers=None):
@@ -498,7 +491,6 @@ def write_csv_file(filepath, columns, headers=None):
            row = [str(col[i]) for col in columns]
            f.write(",".join(row) + "\n")

-    print(f"  Wrote {n_rows} rows to {filepath}")


 # =============================================================================
@@ -511,10 +503,6 @@ def scenario_single_target(range_m=500, velocity=0, rcs=0, n_adc_samples=16384):
    Good for validating matched filter range response.
    """
    target = Target(range_m=range_m, velocity_mps=velocity, rcs_dbsm=rcs)
-    print(f"Scenario: Single target at {range_m}m")
-    print(f"  {target}")
-    print(f"  Beat freq: {CHIRP_BW / T_LONG_CHIRP * target.delay_s:.0f} Hz")
-    print(f"  Delay: {target.delay_samples:.1f} ADC samples")

    adc = generate_adc_samples([target], n_adc_samples, noise_stddev=2.0)
    return adc, [target]
@@ -529,9 +517,8 @@ def scenario_two_targets(n_adc_samples=16384):
        Target(range_m=300, velocity_mps=0, rcs_dbsm=10, phase_deg=0),
        Target(range_m=315, velocity_mps=0, rcs_dbsm=10, phase_deg=45),
    ]
-    print("Scenario: Two targets (range resolution test)")
-    for t in targets:
-        print(f"  {t}")
+    for _t in targets:
+        pass

    adc = generate_adc_samples(targets, n_adc_samples, noise_stddev=2.0)
    return adc, targets
@@ -548,9 +535,8 @@ def scenario_multi_target(n_adc_samples=16384):
        Target(range_m=2000, velocity_mps=50, rcs_dbsm=0, phase_deg=45),
        Target(range_m=5000, velocity_mps=-5, rcs_dbsm=-5, phase_deg=270),
    ]
-    print("Scenario: Multi-target (5 targets)")
-    for t in targets:
-        print(f"  {t}")
+    for _t in targets:
+        pass

    adc = generate_adc_samples(targets, n_adc_samples, noise_stddev=3.0)
    return adc, targets
@@ -560,7 +546,6 @@ def scenario_noise_only(n_adc_samples=16384, noise_stddev=5.0):
    """
    Noise-only scene — baseline for false alarm characterization.
    """
-    print(f"Scenario: Noise only (stddev={noise_stddev})")
    adc = generate_adc_samples([], n_adc_samples, noise_stddev=noise_stddev)
    return adc, []

@@ -569,7 +554,6 @@ def scenario_dc_tone(n_adc_samples=16384, adc_value=128):
    """
    DC input — validates CIC decimation and DC response.
    """
-    print(f"Scenario: DC tone (ADC value={adc_value})")
    return [adc_value] * n_adc_samples, []


@@ -577,11 +561,10 @@ def scenario_sine_wave(n_adc_samples=16384, freq_hz=1e6, amplitude=50):
    """
    Pure sine wave at ADC input — validates NCO/mixer frequency response.
    """
-    print(f"Scenario: Sine wave at {freq_hz/1e6:.1f} MHz, amplitude={amplitude}")
    adc = []
    for n in range(n_adc_samples):
        t = n / FS_ADC
-        val = int(round(128 + amplitude * math.sin(2 * math.pi * freq_hz * t)))
+        val = round(128 + amplitude * math.sin(2 * math.pi * freq_hz * t))
        adc.append(max(0, min(255, val)))
    return adc, []

@@ -607,46 +590,35 @@ def generate_all_test_vectors(output_dir=None):
    if output_dir is None:
        output_dir = os.path.dirname(os.path.abspath(__file__))

-    print("=" * 60)
-    print("Generating AERIS-10 Test Vectors")
-    print(f"Output directory: {output_dir}")
-    print("=" * 60)

    n_adc = 16384  # ~41 us of ADC data

    # --- Scenario 1: Single target ---
-    print("\n--- Scenario 1: Single Target ---")
    adc1, targets1 = scenario_single_target(range_m=500, n_adc_samples=n_adc)
    write_hex_file(os.path.join(output_dir, "adc_single_target.hex"), adc1, bits=8)

    # --- Scenario 2: Multi-target ---
-    print("\n--- Scenario 2: Multi-Target ---")
    adc2, targets2 = scenario_multi_target(n_adc_samples=n_adc)
    write_hex_file(os.path.join(output_dir, "adc_multi_target.hex"), adc2, bits=8)

    # --- Scenario 3: Noise only ---
-    print("\n--- Scenario 3: Noise Only ---")
    adc3, _ = scenario_noise_only(n_adc_samples=n_adc)
    write_hex_file(os.path.join(output_dir, "adc_noise_only.hex"), adc3, bits=8)

    # --- Scenario 4: DC ---
-    print("\n--- Scenario 4: DC Input ---")
    adc4, _ = scenario_dc_tone(n_adc_samples=n_adc)
    write_hex_file(os.path.join(output_dir, "adc_dc.hex"), adc4, bits=8)

    # --- Scenario 5: Sine wave ---
-    print("\n--- Scenario 5: 1 MHz Sine ---")
    adc5, _ = scenario_sine_wave(n_adc_samples=n_adc, freq_hz=1e6, amplitude=50)
    write_hex_file(os.path.join(output_dir, "adc_sine_1mhz.hex"), adc5, bits=8)

    # --- Reference chirp for matched filter ---
-    print("\n--- Reference Chirp ---")
    ref_re, ref_im = generate_reference_chirp_q15()
    write_hex_file(os.path.join(output_dir, "ref_chirp_i.hex"), ref_re, bits=16)
    write_hex_file(os.path.join(output_dir, "ref_chirp_q.hex"), ref_im, bits=16)

    # --- Baseband samples for matched filter test (bypass DDC) ---
-    print("\n--- Baseband Samples (bypass DDC) ---")
    bb_targets = [
        Target(range_m=500, velocity_mps=0, rcs_dbsm=10),
        Target(range_m=1500, velocity_mps=20, rcs_dbsm=5),
@@ -656,7 +628,6 @@ def generate_all_test_vectors(output_dir=None):
    write_hex_file(os.path.join(output_dir, "bb_mf_test_q.hex"), bb_q, bits=16)

    # --- Scenario info CSV ---
-    print("\n--- Scenario Info ---")
    with open(os.path.join(output_dir, "scenario_info.txt"), 'w') as f:
        f.write("AERIS-10 Test Vector Scenarios\n")
        f.write("=" * 60 + "\n\n")
@@ -668,7 +639,7 @@ def generate_all_test_vectors(output_dir=None):
        f.write(f"  ADC: {FS_ADC/1e6:.0f} MSPS, {ADC_BITS}-bit\n")
        f.write(f"  Range resolution: {RANGE_RESOLUTION:.1f} m\n")
        f.write(f"  Wavelength: {WAVELENGTH*1000:.2f} mm\n")
-        f.write(f"\n")
+        f.write("\n")

        f.write("Scenario 1: Single target\n")
        for t in targets1:
@@ -686,11 +657,7 @@ def generate_all_test_vectors(output_dir=None):
        for t in bb_targets:
            f.write(f"  {t}\n")

-    print(f"\n  Wrote scenario info to {os.path.join(output_dir, 'scenario_info.txt')}")

-    print("\n" + "=" * 60)
-    print("ALL TEST VECTORS GENERATED")
-    print("=" * 60)

    return {
        'adc_single': adc1,
@@ -20,7 +20,6 @@ Usage:

 import numpy as np
 import os
-import sys
 import argparse

 # ===========================================================================
@@ -70,7 +69,6 @@ FIR_COEFFS_HEX = [
 # DDC output interface
 DDC_OUT_BITS = 16                # 18 → 16 bit with rounding + saturation

-# FFT (Range)
 FFT_SIZE = 1024
 FFT_DATA_W = 16
 FFT_INTERNAL_W = 32
@@ -149,21 +147,15 @@ def load_and_quantize_adi_data(data_path, config_path, frame_idx=0):
    4. Upconvert to 120 MHz IF (add I*cos - Q*sin) to create real signal
    5. Quantize to 8-bit unsigned (matching AD9484)
    """
-    print(f"[LOAD] Loading ADI dataset from {data_path}")
    data = np.load(data_path, allow_pickle=True)
    config = np.load(config_path, allow_pickle=True)
    
-    print(f"  Shape: {data.shape}, dtype: {data.dtype}")
-    print(f"  Config: sample_rate={config[0]:.0f}, IF={config[1]:.0f}, "
-          f"RF={config[2]:.0f}, chirps={config[3]:.0f}, BW={config[4]:.0f}, "
-          f"ramp={config[5]:.6f}s")
    
    # Extract one frame
    frame = data[frame_idx]  # (256, 1079) complex
    
    # Use first 32 chirps, first 1024 samples
    iq_block = frame[:DOPPLER_CHIRPS, :FFT_SIZE]  # (32, 1024) complex
-    print(f"  Using frame {frame_idx}: {DOPPLER_CHIRPS} chirps x {FFT_SIZE} samples")
    
    # The ADI data is baseband complex IQ at 4 MSPS.
    # AERIS-10 sees a real signal at 400 MSPS with 120 MHz IF.
@@ -198,9 +190,6 @@ def load_and_quantize_adi_data(data_path, config_path, frame_idx=0):
    iq_i = np.clip(iq_i, -32768, 32767)
    iq_q = np.clip(iq_q, -32768, 32767)
    
-    print(f"  Scaled to 16-bit (peak target {INPUT_PEAK_TARGET}): "
-          f"I range [{iq_i.min()}, {iq_i.max()}], "
-          f"Q range [{iq_q.min()}, {iq_q.max()}]")
    
    # Also create 8-bit ADC stimulus for DDC validation
    # Use just one chirp of real-valued data (I channel only, shifted to unsigned)
@@ -244,10 +233,7 @@ def nco_lookup(phase_accum, sin_lut):
    quadrant = (lut_address >> 6) & 0x3
    
    # Mirror index for odd quadrants
-    if (quadrant & 1) ^ ((quadrant >> 1) & 1):
-        lut_idx = (~lut_address) & 0x3F
-    else:
-        lut_idx = lut_address & 0x3F
+    lut_idx = ~lut_address & 63 if quadrant & 1 ^ quadrant >> 1 & 1 else lut_address & 63
    
    sin_abs = int(sin_lut[lut_idx])
    cos_abs = int(sin_lut[63 - lut_idx])
@@ -295,7 +281,6 @@ def run_ddc(adc_samples):
    # Build FIR coefficients as signed integers
    fir_coeffs = np.array([hex_to_signed(c, 18) for c in FIR_COEFFS_HEX], dtype=np.int64)
    
-    print(f"[DDC] Processing {n_samples} ADC samples at 400 MHz")
    
    # --- NCO + Mixer ---
    phase_accum = np.int64(0)
@@ -305,9 +290,9 @@ def run_ddc(adc_samples):
    for n in range(n_samples):
        # ADC sign conversion: RTL does offset binary → signed 18-bit
        # adc_signed_w = {1'b0, adc_data, 9'b0} - {1'b0, 8'hFF, 9'b0}/2
-        # Simplified: center around zero, scale to 18-bit
+        # Exact: (adc_val << 9) - 0xFF00, where 0xFF00 = {1'b0,8'hFF,9'b0}/2
        adc_val = int(adc_samples[n])
-        adc_signed = (adc_val - 128) << 9  # Approximate RTL sign conversion to 18-bit
+        adc_signed = (adc_val << 9) - 0xFF00  # Exact RTL: {1'b0,adc,9'b0} - {1'b0,8'hFF,9'b0}/2
        adc_signed = saturate(adc_signed, 18)
        
        # NCO lookup (ignoring dithering for golden reference)
@@ -328,7 +313,6 @@ def run_ddc(adc_samples):
        # Phase accumulator update (ignore dithering for bit-accuracy)
        phase_accum = (phase_accum + NCO_PHASE_INC) & 0xFFFFFFFF
    
-    print(f"  Mixer output: I range [{mixed_i.min()}, {mixed_i.max()}]")
    
    # --- CIC Decimator (5-stage, decimate-by-4) ---
    # Integrator section (at 400 MHz rate)
@@ -336,7 +320,9 @@ def run_ddc(adc_samples):
    for n in range(n_samples):
        integrators[0][n + 1] = (integrators[0][n] + mixed_i[n]) & ((1 << CIC_ACC_WIDTH) - 1)
        for s in range(1, CIC_STAGES):
-            integrators[s][n + 1] = (integrators[s][n] + integrators[s - 1][n + 1]) & ((1 << CIC_ACC_WIDTH) - 1)
+            integrators[s][n + 1] = (
+                integrators[s][n] + integrators[s - 1][n + 1]
+            ) & ((1 << CIC_ACC_WIDTH) - 1)
    
    # Downsample by 4
    n_decimated = n_samples // CIC_DECIMATION
@@ -370,7 +356,6 @@ def run_ddc(adc_samples):
        scaled = comb[CIC_STAGES - 1][k] >> CIC_GAIN_SHIFT
        cic_output[k] = saturate(scaled, CIC_OUT_BITS)
    
-    print(f"  CIC output: {n_decimated} samples, range [{cic_output.min()}, {cic_output.max()}]")
    
    # --- FIR Filter (32-tap) ---
    delay_line = np.zeros(FIR_TAPS, dtype=np.int64)
@@ -392,7 +377,6 @@ def run_ddc(adc_samples):
        if fir_output[k] >= (1 << 17):
            fir_output[k] -= (1 << 18)
    
-    print(f"  FIR output: range [{fir_output.min()}, {fir_output.max()}]")
    
    # --- DDC Interface (18 → 16 bit) ---
    ddc_output = np.zeros(n_decimated, dtype=np.int64)
@@ -409,7 +393,6 @@ def run_ddc(adc_samples):
        else:
            ddc_output[k] = saturate(trunc + round_bit, 16)
    
-    print(f"  DDC output (16-bit): range [{ddc_output.min()}, {ddc_output.max()}]")
    
    return ddc_output

@@ -420,7 +403,7 @@ def run_ddc(adc_samples):
 def load_twiddle_rom(twiddle_file):
    """Load the quarter-wave cosine ROM from .mem file."""
    rom = []
-    with open(twiddle_file, 'r') as f:
+    with open(twiddle_file) as f:
        for line in f:
            line = line.strip()
            if not line or line.startswith('//'):
@@ -482,7 +465,6 @@ def run_range_fft(iq_i, iq_q, twiddle_file=None):
        # Generate twiddle factors if file not available
        cos_rom = np.round(32767 * np.cos(2 * np.pi * np.arange(N // 4) / N)).astype(np.int64)
    
-    print(f"[FFT] Running {N}-point range FFT (bit-accurate)")
    
    # Bit-reverse and sign-extend to 32-bit internal width
    def bit_reverse(val, bits):
@@ -520,9 +502,6 @@ def run_range_fft(iq_i, iq_q, twiddle_file=None):
            b_re = mem_re[addr_odd]
            b_im = mem_im[addr_odd]
            
-            # Twiddle multiply: forward FFT
-            #   prod_re = b_re * tw_cos + b_im * tw_sin
-            #   prod_im = b_im * tw_cos - b_re * tw_sin
            prod_re = b_re * tw_cos + b_im * tw_sin
            prod_im = b_im * tw_cos - b_re * tw_sin
            
@@ -545,8 +524,6 @@ def run_range_fft(iq_i, iq_q, twiddle_file=None):
        out_re[n] = saturate(mem_re[n], FFT_DATA_W)
        out_im[n] = saturate(mem_im[n], FFT_DATA_W)
    
-    print(f"  FFT output: re range [{out_re.min()}, {out_re.max()}], "
-          f"im range [{out_im.min()}, {out_im.max()}]")
    
    return out_re, out_im

@@ -581,8 +558,6 @@ def run_range_bin_decimator(range_fft_i, range_fft_q,
    decimated_i = np.zeros((n_chirps, output_bins), dtype=np.int64)
    decimated_q = np.zeros((n_chirps, output_bins), dtype=np.int64)

-    print(f"[DECIM] Decimating {n_in}→{output_bins} bins, mode={'peak' if mode==1 else 'avg' if mode==2 else 'simple'}, "
-          f"start_bin={start_bin}, {n_chirps} chirps")

    for c in range(n_chirps):
        # Index into input, skip start_bin
@@ -631,7 +606,7 @@ def run_range_bin_decimator(range_fft_i, range_fft_q,
                # Averaging: sum group, then >> 4 (divide by 16)
                sum_i = np.int64(0)
                sum_q = np.int64(0)
-                for s in range(decimation_factor):
+                for _ in range(decimation_factor):
                    if in_idx >= input_bins:
                        break
                    sum_i += int(range_fft_i[c, in_idx])
@@ -641,9 +616,6 @@ def run_range_bin_decimator(range_fft_i, range_fft_q,
                decimated_i[c, obin] = int(sum_i) >> 4
                decimated_q[c, obin] = int(sum_q) >> 4

-    print(f"  Decimated output: shape ({n_chirps}, {output_bins}), "
-          f"I range [{decimated_i.min()}, {decimated_i.max()}], "
-          f"Q range [{decimated_q.min()}, {decimated_q.max()}]")

    return decimated_i, decimated_q

@@ -669,7 +641,6 @@ def run_doppler_fft(range_data_i, range_data_q, twiddle_file_16=None):
    n_total = DOPPLER_TOTAL_BINS
    n_sf = CHIRPS_PER_SUBFRAME

-    print(f"[DOPPLER] Processing {n_range} range bins x {n_chirps} chirps → dual {n_fft}-point FFT")

    # Build 16-point Hamming window as signed 16-bit
    hamming = np.array([int(v) for v in HAMMING_Q15], dtype=np.int64)
@@ -679,7 +650,9 @@ def run_doppler_fft(range_data_i, range_data_q, twiddle_file_16=None):
    if twiddle_file_16 and os.path.exists(twiddle_file_16):
        cos_rom_16 = load_twiddle_rom(twiddle_file_16)
    else:
-        cos_rom_16 = np.round(32767 * np.cos(2 * np.pi * np.arange(n_fft // 4) / n_fft)).astype(np.int64)
+        cos_rom_16 = np.round(
+            32767 * np.cos(2 * np.pi * np.arange(n_fft // 4) / n_fft)
+        ).astype(np.int64)

    LOG2N_16 = 4
    doppler_map_i = np.zeros((n_range, n_total), dtype=np.int64)
@@ -751,8 +724,6 @@ def run_doppler_fft(range_data_i, range_data_q, twiddle_file_16=None):
                doppler_map_i[rbin, bin_offset + n] = saturate(mem_re[n], 16)
                doppler_map_q[rbin, bin_offset + n] = saturate(mem_im[n], 16)

-    print(f"  Doppler map: shape ({n_range}, {n_total}), "
-          f"I range [{doppler_map_i.min()}, {doppler_map_i.max()}]")

    return doppler_map_i, doppler_map_q

@@ -782,12 +753,10 @@ def run_mti_canceller(decim_i, decim_q, enable=True):
    mti_i = np.zeros_like(decim_i)
    mti_q = np.zeros_like(decim_q)

-    print(f"[MTI] 2-pulse canceller, enable={enable}, {n_chirps} chirps x {n_bins} bins")

    if not enable:
        mti_i[:] = decim_i
        mti_q[:] = decim_q
-        print(f"  Pass-through mode (MTI disabled)")
        return mti_i, mti_q

    for c in range(n_chirps):
@@ -803,9 +772,6 @@ def run_mti_canceller(decim_i, decim_q, enable=True):
                mti_i[c, r] = saturate(diff_i, 16)
                mti_q[c, r] = saturate(diff_q, 16)

-    print(f"  Chirp 0: muted (zeros)")
-    print(f"  Chirps 1-{n_chirps-1}: I range [{mti_i[1:].min()}, {mti_i[1:].max()}], "
-          f"Q range [{mti_q[1:].min()}, {mti_q[1:].max()}]")
    return mti_i, mti_q


@@ -832,14 +798,12 @@ def run_dc_notch(doppler_i, doppler_q, width=2):
      dc_notch_active = (width != 0) &&
                        (bin_within_sf < width || bin_within_sf > (15 - width + 1))
    """
-    n_range, n_doppler = doppler_i.shape
+    _n_range, n_doppler = doppler_i.shape
    notched_i = doppler_i.copy()
    notched_q = doppler_q.copy()

-    print(f"[DC NOTCH] width={width}, {n_range} range bins x {n_doppler} Doppler bins (dual sub-frame)")

    if width == 0:
-        print(f"  Pass-through (width=0)")
        return notched_i, notched_q

    zeroed_count = 0
@@ -851,7 +815,6 @@ def run_dc_notch(doppler_i, doppler_q, width=2):
            notched_q[:, dbin] = 0
            zeroed_count += 1

-    print(f"  Zeroed {zeroed_count} Doppler bin columns")
    return notched_i, notched_q


@@ -859,7 +822,7 @@ def run_dc_notch(doppler_i, doppler_q, width=2):
 # Stage 3e: CA-CFAR Detector (bit-accurate)
 # ===========================================================================
 def run_cfar_ca(doppler_i, doppler_q, guard=2, train=8,
-                alpha_q44=0x30, mode='CA', simple_threshold=500):
+                alpha_q44=0x30, mode='CA', _simple_threshold=500):
    """
    Bit-accurate model of cfar_ca.v — Cell-Averaging CFAR detector.

@@ -897,9 +860,6 @@ def run_cfar_ca(doppler_i, doppler_q, guard=2, train=8,
    if train == 0:
        train = 1

-    print(f"[CFAR] mode={mode}, guard={guard}, train={train}, "
-          f"alpha=0x{alpha_q44:02X} (Q4.4={alpha_q44/16:.2f}), "
-          f"{n_range} range x {n_doppler} Doppler")

    # Compute magnitudes: |I| + |Q| (17-bit unsigned, matching RTL L1 norm)
    # RTL: abs_i = I[15] ? (~I + 1) : I; abs_q = Q[15] ? (~Q + 1) : Q
@@ -967,29 +927,19 @@ def run_cfar_ca(doppler_i, doppler_q, guard=2, train=8,
            else:
                noise_sum = leading_sum + lagging_sum  # Default to CA

-            # Threshold = (alpha * noise_sum) >> ALPHA_FRAC_BITS
-            # RTL: noise_product = r_alpha * noise_sum_reg (31-bit)
-            #      threshold = noise_product[ALPHA_FRAC_BITS +: MAG_WIDTH]
-            #      saturate if overflow
            noise_product = alpha_q44 * noise_sum
            threshold_raw = noise_product >> ALPHA_FRAC_BITS

            # Saturate to MAG_WIDTH=17 bits
            MAX_MAG = (1 << 17) - 1  # 131071
-            if threshold_raw > MAX_MAG:
-                threshold_val = MAX_MAG
-            else:
-                threshold_val = int(threshold_raw)
+            threshold_val = MAX_MAG if threshold_raw > MAX_MAG else int(threshold_raw)

-            # Detection: magnitude > threshold
            if int(col[cut_idx]) > threshold_val:
                detect_flags[cut_idx, dbin] = True
                total_detections += 1

            thresholds[cut_idx, dbin] = threshold_val

-    print(f"  Total detections: {total_detections}")
-    print(f"  Magnitude range: [{magnitudes.min()}, {magnitudes.max()}]")

    return detect_flags, magnitudes, thresholds

@@ -1003,19 +953,16 @@ def run_detection(doppler_i, doppler_q, threshold=10000):
    cfar_mag = |I| + |Q| (17-bit)
    detection if cfar_mag > threshold
    """
-    print(f"[DETECT] Running magnitude threshold detection (threshold={threshold})")
    
    mag = np.abs(doppler_i) + np.abs(doppler_q)  # L1 norm (|I| + |Q|)
    detections = np.argwhere(mag > threshold)
    
-    print(f"  {len(detections)} detections found")
    for d in detections[:20]:  # Print first 20
        rbin, dbin = d
-        m = mag[rbin, dbin]
-        print(f"    Range bin {rbin}, Doppler bin {dbin}: magnitude {m}")
+        mag[rbin, dbin]
    
    if len(detections) > 20:
-        print(f"    ... and {len(detections) - 20} more")
+        pass
    
    return mag, detections

@@ -1029,7 +976,6 @@ def run_float_reference(iq_i, iq_q):
    Uses the exact same RTL Hamming window coefficients (Q15) to isolate
    only the FFT fixed-point quantization error.
    """
-    print(f"\n[FLOAT REF] Running floating-point reference pipeline")
    
    n_chirps, n_samples = iq_i.shape[0], iq_i.shape[1] if iq_i.ndim == 2 else len(iq_i)
    
@@ -1077,8 +1023,6 @@ def write_hex_files(output_dir, iq_i, iq_q, prefix="stim"):
                fi.write(signed_to_hex(int(iq_i[n]), 16) + '\n')
                fq.write(signed_to_hex(int(iq_q[n]), 16) + '\n')
        
-        print(f"  Wrote {fn_i} ({n_samples} samples)")
-        print(f"  Wrote {fn_q} ({n_samples} samples)")
    
    elif iq_i.ndim == 2:
        n_rows, n_cols = iq_i.shape
@@ -1092,8 +1036,6 @@ def write_hex_files(output_dir, iq_i, iq_q, prefix="stim"):
                    fi.write(signed_to_hex(int(iq_i[r, c]), 16) + '\n')
                    fq.write(signed_to_hex(int(iq_q[r, c]), 16) + '\n')
        
-        print(f"  Wrote {fn_i} ({n_rows}x{n_cols} = {n_rows * n_cols} samples)")
-        print(f"  Wrote {fn_q} ({n_rows}x{n_cols} = {n_rows * n_cols} samples)")


 def write_adc_hex(output_dir, adc_data, prefix="adc_stim"):
@@ -1105,13 +1047,12 @@ def write_adc_hex(output_dir, adc_data, prefix="adc_stim"):
        for n in range(len(adc_data)):
            f.write(format(int(adc_data[n]) & 0xFF, '02X') + '\n')
    
-    print(f"  Wrote {fn} ({len(adc_data)} samples)")


 # ===========================================================================
 # Comparison metrics
 # ===========================================================================
-def compare_outputs(name, fixed_i, fixed_q, float_i, float_q):
+def compare_outputs(_name, fixed_i, fixed_q, float_i, float_q):
    """Compare fixed-point outputs against floating-point reference.
    
    Reports two metrics:
@@ -1127,7 +1068,7 @@ def compare_outputs(name, fixed_i, fixed_q, float_i, float_q):
    
    # Count saturated bins
    sat_mask = (np.abs(fi) >= 32767) | (np.abs(fq) >= 32767)
-    n_saturated = np.sum(sat_mask)
+    np.sum(sat_mask)
    
    # Complex error — overall
    fixed_complex = fi + 1j * fq
@@ -1136,8 +1077,8 @@ def compare_outputs(name, fixed_i, fixed_q, float_i, float_q):
    
    signal_power = np.mean(np.abs(ref_complex) ** 2) + 1e-30
    noise_power = np.mean(np.abs(error) ** 2) + 1e-30
-    snr_db = 10 * np.log10(signal_power / noise_power)
-    max_error = np.max(np.abs(error))
+    10 * np.log10(signal_power / noise_power)
+    np.max(np.abs(error))
    
    # Non-saturated comparison
    non_sat = ~sat_mask
@@ -1146,17 +1087,10 @@ def compare_outputs(name, fixed_i, fixed_q, float_i, float_q):
        sig_ns = np.mean(np.abs(ref_complex[non_sat]) ** 2) + 1e-30
        noise_ns = np.mean(np.abs(error_ns) ** 2) + 1e-30
        snr_ns = 10 * np.log10(sig_ns / noise_ns)
-        max_err_ns = np.max(np.abs(error_ns))
+        np.max(np.abs(error_ns))
    else:
        snr_ns = 0.0
-        max_err_ns = 0.0
    
-    print(f"\n  [{name}] Comparison ({n} points):")
-    print(f"    Saturated:           {n_saturated}/{n} ({100.0*n_saturated/n:.2f}%)")
-    print(f"    Overall SNR:         {snr_db:.1f} dB")
-    print(f"    Overall max error:   {max_error:.1f}")
-    print(f"    Non-sat SNR:         {snr_ns:.1f} dB")
-    print(f"    Non-sat max error:   {max_err_ns:.1f}")
    
    return snr_ns  # Return the meaningful metric

@@ -1168,7 +1102,12 @@ def main():
    parser = argparse.ArgumentParser(description="AERIS-10 FPGA golden reference model")
    parser.add_argument('--frame', type=int, default=0, help='Frame index to process')
    parser.add_argument('--plot', action='store_true', help='Show plots')
-    parser.add_argument('--threshold', type=int, default=10000, help='Detection threshold (L1 magnitude)')
+    parser.add_argument(
+        '--threshold',
+        type=int,
+        default=10000,
+        help='Detection threshold (L1 magnitude)'
+    )
    args = parser.parse_args()
    
    # Paths
@@ -1176,33 +1115,27 @@ def main():
    fpga_dir = os.path.abspath(os.path.join(script_dir, '..', '..', '..'))
    data_base = os.path.expanduser("~/Downloads/adi_radar_data")
    amp_data = os.path.join(data_base, "amp_radar", "phaser_amp_4MSPS_500M_300u_256_m3dB.npy")
-    amp_config = os.path.join(data_base, "amp_radar", "phaser_amp_4MSPS_500M_300u_256_m3dB_config.npy")
+    amp_config = os.path.join(
+        data_base,
+        "amp_radar",
+        "phaser_amp_4MSPS_500M_300u_256_m3dB_config.npy"
+    )
    twiddle_1024 = os.path.join(fpga_dir, "fft_twiddle_1024.mem")
    output_dir = os.path.join(script_dir, "hex")
    
-    print("=" * 72)
-    print("AERIS-10 FPGA Golden Reference Model")
-    print("Using ADI CN0566 Phaser Radar Data (10.525 GHz X-band FMCW)")
-    print("=" * 72)
    
    # -----------------------------------------------------------------------
    # Load and quantize ADI data
    # -----------------------------------------------------------------------
-    iq_i, iq_q, adc_8bit, config = load_and_quantize_adi_data(
+    iq_i, iq_q, adc_8bit, _config = load_and_quantize_adi_data(
        amp_data, amp_config, frame_idx=args.frame
    )
    
    # iq_i, iq_q: (32, 1024) int64, 16-bit range — post-DDC equivalent
-    print(f"\n{'=' * 72}")
-    print("Stage 0: Data loaded and quantized to 16-bit signed")
-    print(f"  IQ block shape: ({iq_i.shape[0]}, {iq_i.shape[1]})")
-    print(f"  ADC stimulus: {len(adc_8bit)} samples (8-bit unsigned)")
    
    # -----------------------------------------------------------------------
    # Write stimulus files
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Writing hex stimulus files for RTL testbenches")
    
    # Post-DDC IQ for each chirp (for FFT + Doppler validation)
    write_hex_files(output_dir, iq_i, iq_q, "post_ddc")
@@ -1216,8 +1149,6 @@ def main():
    # -----------------------------------------------------------------------
    # Run range FFT on first chirp (bit-accurate)
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Stage 2: Range FFT (1024-point, bit-accurate)")
    range_fft_i, range_fft_q = run_range_fft(iq_i[0], iq_q[0], twiddle_1024)
    write_hex_files(output_dir, range_fft_i, range_fft_q, "range_fft_chirp0")
    
@@ -1225,20 +1156,16 @@ def main():
    all_range_i = np.zeros((DOPPLER_CHIRPS, FFT_SIZE), dtype=np.int64)
    all_range_q = np.zeros((DOPPLER_CHIRPS, FFT_SIZE), dtype=np.int64)
    
-    print(f"\n  Running range FFT for all {DOPPLER_CHIRPS} chirps...")
    for c in range(DOPPLER_CHIRPS):
        ri, rq = run_range_fft(iq_i[c], iq_q[c], twiddle_1024)
        all_range_i[c] = ri
        all_range_q[c] = rq
        if (c + 1) % 8 == 0:
-            print(f"    Chirp {c + 1}/{DOPPLER_CHIRPS} done")
+            pass
    
    # -----------------------------------------------------------------------
    # Run Doppler FFT (bit-accurate) — "direct" path (first 64 bins)
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Stage 3: Doppler FFT (dual 16-point with Hamming window)")
-    print("  [direct path: first 64 range bins, no decimation]")
    twiddle_16 = os.path.join(fpga_dir, "fft_twiddle_16.mem")
    doppler_i, doppler_q = run_doppler_fft(all_range_i, all_range_q, twiddle_file_16=twiddle_16)
    write_hex_files(output_dir, doppler_i, doppler_q, "doppler_map")
@@ -1248,8 +1175,6 @@ def main():
    # This models the actual RTL data flow:
    #   range FFT → range_bin_decimator (peak detection) → Doppler
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Stage 2b: Range Bin Decimator (1024 → 64, peak detection)")
    
    decim_i, decim_q = run_range_bin_decimator(
        all_range_i, all_range_q,
@@ -1269,14 +1194,11 @@ def main():
                q_val = int(all_range_q[c, b]) & 0xFFFF
                packed = (q_val << 16) | i_val
                f.write(f"{packed:08X}\n")
-    print(f"  Wrote {fc_input_file} ({DOPPLER_CHIRPS * FFT_SIZE} packed IQ words)")
    
    # Write decimated output reference for standalone decimator test
    write_hex_files(output_dir, decim_i, decim_q, "decimated_range")
    
    # Now run Doppler on the decimated data — this is the full-chain reference
-    print(f"\n{'=' * 72}")
-    print("Stage 3b: Doppler FFT on decimated data (full-chain path)")
    fc_doppler_i, fc_doppler_q = run_doppler_fft(
        decim_i, decim_q, twiddle_file_16=twiddle_16
    )
@@ -1291,7 +1213,6 @@ def main():
                q_val = int(fc_doppler_q[rbin, dbin]) & 0xFFFF
                packed = (q_val << 16) | i_val
                f.write(f"{packed:08X}\n")
-    print(f"  Wrote {fc_doppler_packed_file} ({DOPPLER_RANGE_BINS * DOPPLER_TOTAL_BINS} packed IQ words)")
    
    # Save numpy arrays for the full-chain path
    np.save(os.path.join(output_dir, "decimated_range_i.npy"), decim_i)
@@ -1304,16 +1225,12 @@ def main():
    # This models the complete RTL data flow:
    #   range FFT → decimator → MTI canceller → Doppler → DC notch → CFAR
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Stage 3c: MTI Canceller (2-pulse, on decimated data)")
    mti_i, mti_q = run_mti_canceller(decim_i, decim_q, enable=True)
    write_hex_files(output_dir, mti_i, mti_q, "fullchain_mti_ref")
    np.save(os.path.join(output_dir, "fullchain_mti_i.npy"), mti_i)
    np.save(os.path.join(output_dir, "fullchain_mti_q.npy"), mti_q)
    
    # Doppler on MTI-filtered data
-    print(f"\n{'=' * 72}")
-    print("Stage 3b+c: Doppler FFT on MTI-filtered decimated data")
    mti_doppler_i, mti_doppler_q = run_doppler_fft(
        mti_i, mti_q, twiddle_file_16=twiddle_16
    )
@@ -1323,8 +1240,6 @@ def main():
    
    # DC notch on MTI-Doppler data
    DC_NOTCH_WIDTH = 2  # Default test value: zero bins {0, 1, 31}
-    print(f"\n{'=' * 72}")
-    print(f"Stage 3d: DC Notch Filter (width={DC_NOTCH_WIDTH})")
    notched_i, notched_q = run_dc_notch(mti_doppler_i, mti_doppler_q, width=DC_NOTCH_WIDTH)
    write_hex_files(output_dir, notched_i, notched_q, "fullchain_notched_ref")
    
@@ -1337,15 +1252,12 @@ def main():
                q_val = int(notched_q[rbin, dbin]) & 0xFFFF
                packed = (q_val << 16) | i_val
                f.write(f"{packed:08X}\n")
-    print(f"  Wrote {fc_notched_packed_file} ({DOPPLER_RANGE_BINS * DOPPLER_TOTAL_BINS} packed IQ words)")
    
    # CFAR on DC-notched data
    CFAR_GUARD = 2
    CFAR_TRAIN = 8
    CFAR_ALPHA = 0x30  # Q4.4 = 3.0
    CFAR_MODE = 'CA'
-    print(f"\n{'=' * 72}")
-    print(f"Stage 3e: CA-CFAR (guard={CFAR_GUARD}, train={CFAR_TRAIN}, alpha=0x{CFAR_ALPHA:02X})")
    cfar_flags, cfar_mag, cfar_thr = run_cfar_ca(
        notched_i, notched_q,
        guard=CFAR_GUARD, train=CFAR_TRAIN,
@@ -1360,7 +1272,6 @@ def main():
            for dbin in range(DOPPLER_TOTAL_BINS):
                m = int(cfar_mag[rbin, dbin]) & 0x1FFFF
                f.write(f"{m:05X}\n")
-    print(f"  Wrote {cfar_mag_file} ({DOPPLER_RANGE_BINS * DOPPLER_TOTAL_BINS} mag values)")
    
    # 2. Threshold map (17-bit unsigned)
    cfar_thr_file = os.path.join(output_dir, "fullchain_cfar_thr.hex")
@@ -1369,7 +1280,6 @@ def main():
            for dbin in range(DOPPLER_TOTAL_BINS):
                t = int(cfar_thr[rbin, dbin]) & 0x1FFFF
                f.write(f"{t:05X}\n")
-    print(f"  Wrote {cfar_thr_file} ({DOPPLER_RANGE_BINS * DOPPLER_TOTAL_BINS} threshold values)")
    
    # 3. Detection flags (1-bit per cell)
    cfar_det_file = os.path.join(output_dir, "fullchain_cfar_det.hex")
@@ -1378,20 +1288,21 @@ def main():
            for dbin in range(DOPPLER_TOTAL_BINS):
                d = 1 if cfar_flags[rbin, dbin] else 0
                f.write(f"{d:01X}\n")
-    print(f"  Wrote {cfar_det_file} ({DOPPLER_RANGE_BINS * DOPPLER_TOTAL_BINS} detection flags)")
    
    # 4. Detection list (text)
    cfar_detections = np.argwhere(cfar_flags)
    cfar_det_list_file = os.path.join(output_dir, "fullchain_cfar_detections.txt")
    with open(cfar_det_list_file, 'w') as f:
-        f.write(f"# AERIS-10 Full-Chain CFAR Detection List\n")
+        f.write("# AERIS-10 Full-Chain CFAR Detection List\n")
        f.write(f"# Chain: decim -> MTI -> Doppler -> DC notch(w={DC_NOTCH_WIDTH}) -> CA-CFAR\n")
-        f.write(f"# CFAR: guard={CFAR_GUARD}, train={CFAR_TRAIN}, alpha=0x{CFAR_ALPHA:02X}, mode={CFAR_MODE}\n")
-        f.write(f"# Format: range_bin doppler_bin magnitude threshold\n")
+        f.write(
+            f"# CFAR: guard={CFAR_GUARD}, train={CFAR_TRAIN}, "
+            f"alpha=0x{CFAR_ALPHA:02X}, mode={CFAR_MODE}\n"
+        )
+        f.write("# Format: range_bin doppler_bin magnitude threshold\n")
        for det in cfar_detections:
            r, d = det
            f.write(f"{r} {d} {cfar_mag[r, d]} {cfar_thr[r, d]}\n")
-    print(f"  Wrote {cfar_det_list_file} ({len(cfar_detections)} detections)")
    
    # Save numpy arrays
    np.save(os.path.join(output_dir, "fullchain_cfar_mag.npy"), cfar_mag)
@@ -1399,20 +1310,17 @@ def main():
    np.save(os.path.join(output_dir, "fullchain_cfar_flags.npy"), cfar_flags)
    
    # Run detection on full-chain Doppler map
-    print(f"\n{'=' * 72}")
-    print("Stage 4: Detection on full-chain Doppler map")
    fc_mag, fc_detections = run_detection(fc_doppler_i, fc_doppler_q, threshold=args.threshold)
    
    # Save full-chain detection reference
    fc_det_file = os.path.join(output_dir, "fullchain_detections.txt")
    with open(fc_det_file, 'w') as f:
-        f.write(f"# AERIS-10 Full-Chain Golden Reference Detections\n")
+        f.write("# AERIS-10 Full-Chain Golden Reference Detections\n")
        f.write(f"# Threshold: {args.threshold}\n")
-        f.write(f"# Format: range_bin doppler_bin magnitude\n")
+        f.write("# Format: range_bin doppler_bin magnitude\n")
        for d in fc_detections:
            rbin, dbin = d
            f.write(f"{rbin} {dbin} {fc_mag[rbin, dbin]}\n")
-    print(f"  Wrote {fc_det_file} ({len(fc_detections)} detections)")
    
    # Also write detection reference as hex for RTL comparison
    fc_det_mag_file = os.path.join(output_dir, "fullchain_detection_mag.hex")
@@ -1421,44 +1329,38 @@ def main():
            for dbin in range(DOPPLER_TOTAL_BINS):
                m = int(fc_mag[rbin, dbin]) & 0x1FFFF  # 17-bit unsigned
                f.write(f"{m:05X}\n")
-    print(f"  Wrote {fc_det_mag_file} ({DOPPLER_RANGE_BINS * DOPPLER_TOTAL_BINS} magnitude values)")
    
    # -----------------------------------------------------------------------
    # Run detection on direct-path Doppler map (for backward compatibility)
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Stage 4b: Detection on direct-path Doppler map")
    mag, detections = run_detection(doppler_i, doppler_q, threshold=args.threshold)
    
    # Save detection list
    det_file = os.path.join(output_dir, "detections.txt")
    with open(det_file, 'w') as f:
-        f.write(f"# AERIS-10 Golden Reference Detections\n")
+        f.write("# AERIS-10 Golden Reference Detections\n")
        f.write(f"# Threshold: {args.threshold}\n")
-        f.write(f"# Format: range_bin doppler_bin magnitude\n")
+        f.write("# Format: range_bin doppler_bin magnitude\n")
        for d in detections:
            rbin, dbin = d
            f.write(f"{rbin} {dbin} {mag[rbin, dbin]}\n")
-    print(f"  Wrote {det_file} ({len(detections)} detections)")
    
    # -----------------------------------------------------------------------
    # Float reference and comparison
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("Comparison: Fixed-point vs Float reference")
    
    range_fft_float, doppler_float = run_float_reference(iq_i, iq_q)
    
    # Compare range FFT (chirp 0)
    float_range_i = np.real(range_fft_float[0, :]).astype(np.float64)
    float_range_q = np.imag(range_fft_float[0, :]).astype(np.float64)
-    snr_range = compare_outputs("Range FFT", range_fft_i, range_fft_q,
+    compare_outputs("Range FFT", range_fft_i, range_fft_q,
                                float_range_i, float_range_q)
    
    # Compare Doppler map
    float_doppler_i = np.real(doppler_float).flatten().astype(np.float64)
    float_doppler_q = np.imag(doppler_float).flatten().astype(np.float64)
-    snr_doppler = compare_outputs("Doppler FFT", 
+    compare_outputs("Doppler FFT", 
                                   doppler_i.flatten(), doppler_q.flatten(),
                                   float_doppler_i, float_doppler_q)
    
@@ -1470,26 +1372,10 @@ def main():
    np.save(os.path.join(output_dir, "doppler_map_i.npy"), doppler_i)
    np.save(os.path.join(output_dir, "doppler_map_q.npy"), doppler_q)
    np.save(os.path.join(output_dir, "detection_mag.npy"), mag)
-    print(f"\n  Saved numpy reference files to {output_dir}/")
    
    # -----------------------------------------------------------------------
    # Summary
    # -----------------------------------------------------------------------
-    print(f"\n{'=' * 72}")
-    print("SUMMARY")
-    print(f"{'=' * 72}")
-    print(f"  ADI dataset: frame {args.frame} of amp_radar (CN0566, 10.525 GHz)")
-    print(f"  Chirps processed: {DOPPLER_CHIRPS}")
-    print(f"  Samples/chirp: {FFT_SIZE}")
-    print(f"  Range FFT: {FFT_SIZE}-point → {snr_range:.1f} dB vs float")
-    print(f"  Doppler FFT (direct): {DOPPLER_FFT_SIZE}-point Hamming → {snr_doppler:.1f} dB vs float")
-    print(f"  Detections (direct): {len(detections)} (threshold={args.threshold})")
-    print(f"  Full-chain decimator: 1024→64 peak detection")
-    print(f"  Full-chain detections: {len(fc_detections)} (threshold={args.threshold})")
-    print(f"  MTI+CFAR chain: decim → MTI → Doppler → DC notch(w={DC_NOTCH_WIDTH}) → CA-CFAR")
-    print(f"  CFAR detections: {len(cfar_detections)} (guard={CFAR_GUARD}, train={CFAR_TRAIN}, alpha=0x{CFAR_ALPHA:02X})")
-    print(f"  Hex stimulus files: {output_dir}/")
-    print(f"  Ready for RTL co-simulation with Icarus Verilog")
    
    # -----------------------------------------------------------------------
    # Optional plots
@@ -1498,7 +1384,7 @@ def main():
        try:
            import matplotlib.pyplot as plt
            
-            fig, axes = plt.subplots(2, 2, figsize=(14, 10))
+            _fig, axes = plt.subplots(2, 2, figsize=(14, 10))
            
            # Range FFT magnitude (chirp 0)
            range_mag = np.sqrt(range_fft_i.astype(float)**2 + range_fft_q.astype(float)**2)
@@ -1540,11 +1426,10 @@ def main():
            plt.tight_layout()
            plot_file = os.path.join(output_dir, "golden_reference_plots.png")
            plt.savefig(plot_file, dpi=150)
-            print(f"\n  Saved plots to {plot_file}")
            plt.show()
            
        except ImportError:
-            print("\n  [WARN] matplotlib not available, skipping plots")
+            pass


 if __name__ == "__main__":
@@ -0,0 +1,42 @@
+# Golden Reference Hex Files
+
+These hex files are **committed golden references** for strict bit-exact
+real-data regression tests (`tb_doppler_realdata.v`, `tb_fullchain_realdata.v`).
+
+## When to regenerate
+
+Regenerate whenever the Doppler processing pipeline changes:
+
+- `doppler_processor.v` (FFT size, window, sub-frame structure)
+- `xfft_16.v` / `fft_engine.v` (butterfly arithmetic, twiddle lookup)
+- `range_bin_decimator.v` (decimation mode, peak detection logic)
+- `fft_twiddle_16.mem` (twiddle factor ROM)
+
+## How to regenerate
+
+```bash
+cd 9_Firmware/9_2_FPGA
+python3 tb/cosim/real_data/golden_reference.py
+# Then copy the Doppler-specific files:
+python3 -c "
+import numpy as np, os, shutil
+h = 'tb/cosim/real_data/hex'
+# Regenerate packed stimulus from range FFT npy
+ri = np.load(f'{h}/range_fft_all_i.npy')
+rq = np.load(f'{h}/range_fft_all_q.npy')
+with open(f'{h}/doppler_input_realdata.hex','w') as f:
+    for c in range(32):
+        for r in range(64):
+            i=int(ri[c,r])&0xFFFF; q=int(rq[c,r])&0xFFFF
+            f.write(f'{(q<<16)|i:08X}\n')
+shutil.copy2(f'{h}/doppler_map_i.hex', f'{h}/doppler_ref_i.hex')
+shutil.copy2(f'{h}/doppler_map_q.hex', f'{h}/doppler_ref_q.hex')
+"
+```
+
+## Architecture
+
+Generated against the **dual 16-point FFT** Doppler architecture
+(2 staggered-PRI sub-frames x 16-point Hamming-windowed FFT).
+
+Source data: ADI CN0566 Phaser radar (10.525 GHz X-band FMCW, 4 MSPS).
@@ -1,291 +1,361 @@
 # AERIS-10 Golden Reference Detections
 # Threshold: 10000
 # Format: range_bin doppler_bin magnitude
-0 0 44371
-0 1 24165
-0 31 17748
-1 0 34391
-1 1 17923
-1 31 18610
-2 0 28512
-2 1 13818
-2 31 15787
-3 0 47402
-3 1 25214
-3 31 23504
-4 0 51870
-4 1 32733
-4 31 31545
-5 0 31752
-5 1 13486
-5 31 19300
-6 0 63406
-6 1 33383
-6 31 36672
-7 0 37576
-7 1 21215
-7 31 27773
-8 0 14823
-10 0 30062
-10 1 13616
-10 31 17149
+0 0 35364
+0 1 16147
+0 15 11821
+0 16 24536
+0 17 11208
+0 31 10122
+1 0 25697
+1 1 12174
+1 15 13421
+1 16 20002
+1 17 11568
+1 31 11299
+2 0 16788
+2 16 20207
+2 31 10711
+3 0 29174
+3 1 13965
+3 15 13305
+3 16 31517
+3 17 13478
+3 31 14101
+4 0 41986
+4 1 19241
+4 15 21030
+4 16 39714
+4 17 17538
+4 31 20394
+5 0 23766
+5 1 11599
+5 15 14843
+5 16 18211
+5 31 12009
+6 0 42015
+6 1 21423
+6 15 21018
+6 16 47402
+6 17 22815
+6 31 22736
+7 0 32152
+7 1 15393
+7 15 14318
+7 16 28911
+7 17 13876
+7 31 17156
+8 0 11067
+10 0 18848
+10 15 10020
+10 16 20027
+10 31 10048
 11 0 65534
-11 1 60963
-11 2 14848
-11 3 12082
-11 4 18060
-11 29 10045
-11 30 20661
-11 31 65536
-12 0 65536
-12 1 44569
-12 4 11189
-12 30 13936
-12 31 57036
-13 0 47038
-13 1 40212
-13 2 14655
-13 4 10242
-13 30 14945
-13 31 40237
-14 0 65534
-14 1 43568
-14 3 10974
-14 4 11491
-14 30 15272
-14 31 57983
-15 0 34501
-15 1 22496
-15 31 25197
-16 0 32784
-16 1 19309
-16 31 14005
-17 0 23063
-17 1 13730
-18 0 17087
-18 1 12092
-19 0 65535
-19 1 49084
-19 2 11399
-19 30 13119
-19 31 48411
-20 0 65509
-20 1 37881
-20 31 35014
-21 0 39614
-21 1 23389
-21 31 22417
-22 0 27174
-22 1 12577
-22 31 15278
-23 0 39885
-23 1 29247
-23 31 33561
-24 0 29644
-24 28 11071
-24 31 20937
+11 1 37617
+11 2 14940
+11 15 43078
+11 16 65534
+11 17 39344
+11 31 45926
+12 0 58975
+12 1 22078
+12 15 34440
+12 16 59096
+12 17 22512
+12 31 28677
+13 0 38442
+13 1 29490
+13 15 37679
+13 16 44951
+13 17 27726
+13 31 39144
+14 0 52660
+14 1 27797
+14 2 13534
+14 15 39671
+14 16 57929
+14 17 24160
+14 31 31478
+15 0 30021
+15 1 12219
+15 15 17232
+15 16 29524
+15 17 13424
+15 31 17850
+16 0 17593
+16 16 24710
+16 31 13046
+17 0 17606
+17 1 11119
+17 16 13182
+18 16 15914
+19 0 55785
+19 1 29069
+19 15 29418
+19 16 55308
+19 17 27886
+19 31 30649
+20 0 49230
+20 1 24486
+20 15 21233
+20 16 45472
+20 17 21749
+20 31 21614
+21 0 26167
+21 1 13823
+21 15 10487
+21 16 29034
+21 17 15861
+21 31 10454
+22 0 12791
+22 16 22520
+22 17 11384
+22 31 11790
+23 0 29337
+23 1 17065
+23 15 14174
+23 16 39414
+23 17 23310
+23 31 17173
+24 0 16889
+24 15 15710
+24 16 22395
+24 31 15003
 25 0 65535
-25 1 54580
-25 2 20278
-25 30 20041
-25 31 59445
-26 0 58162
-26 1 46544
-26 2 17230
-26 3 10127
-26 31 44711
+25 1 40375
+25 15 54011
+25 16 61127
+25 17 38944
+25 31 48889
+26 0 46367
+26 1 39852
+26 15 29630
+26 16 53587
+26 17 40655
+26 31 34936
 27 0 65535
 27 1 65535
-27 2 44599
-27 3 17124
-27 28 15139
-27 29 26067
-27 30 54631
-27 31 65535
+27 15 64456
+27 16 65535
+27 17 65535
+27 31 58334
 28 0 65535
-28 1 65535
-28 2 43056
-28 3 14647
-28 4 11808
-28 29 15256
-28 30 50518
+28 1 57641
+28 15 65535
+28 16 65535
+28 17 54928
 28 31 65535
 29 0 65535
-29 1 61621
-29 2 28859
-29 3 19523
-29 4 21765
-29 5 12687
-29 27 13175
-29 28 19619
-29 29 24365
-29 30 48682
-29 31 65535
-30 0 55399
-30 1 46683
-30 2 21192
-30 3 15905
-30 4 18003
-30 29 11105
-30 30 22360
-30 31 40830
-31 0 46504
-31 1 44346
-31 2 34200
-31 3 20677
-31 4 18570
-31 5 10430
-31 29 12684
-31 30 31778
-31 31 36195
-32 0 39540
-32 1 36657
-32 31 35394
-33 0 35482
-33 1 32886
-33 2 15041
-33 28 10103
-33 29 11617
-33 30 17465
-33 31 34603
-34 0 47950
-34 1 25855
-34 31 23198
+29 1 44117
+29 2 13478
+29 14 11179
+29 15 65535
+29 16 65535
+29 17 45898
+29 18 10817
+29 31 60442
+30 0 44530
+30 1 36909
+30 2 14573
+30 15 43430
+30 16 51839
+30 17 37271
+30 31 47866
+31 0 40957
+31 1 52081
+31 2 12755
+31 15 42794
+31 16 41071
+31 17 50472
+31 18 11556
+31 31 43866
+32 0 35747
+32 1 19597
+32 15 25173
+32 16 39213
+32 17 21782
+32 31 29106
+33 0 34216
+33 1 41661
+33 15 42368
+33 16 38638
+33 17 40522
+33 31 45908
+34 0 36589
+34 1 17165
+34 15 16488
+34 16 26972
+34 17 12089
+34 31 13576
 35 0 65536
-35 1 63059
-35 2 24416
-35 30 27412
-35 31 65534
-36 0 65535
-36 1 41914
-36 2 11341
-36 30 11276
-36 31 41419
-38 0 63253
-38 1 46689
-38 2 13576
-38 30 14208
-38 31 49979
-39 0 33480
-39 1 25439
-39 31 23094
-40 0 52003
-40 1 47059
-40 2 13164
-40 31 37992
+35 1 42536
+35 15 61612
+35 16 65536
+35 17 43084
+35 31 60807
+36 0 55831
+36 1 26499
+36 15 28393
+36 16 50059
+36 17 24420
+36 31 23905
+38 0 52721
+38 1 33692
+38 15 32463
+38 16 53145
+38 17 37178
+38 31 30632
+39 0 32288
+39 1 19461
+39 15 20183
+39 16 27198
+39 17 16723
+39 31 14041
+40 0 47793
+40 1 29861
+40 15 23082
+40 16 43109
+40 17 30298
+40 31 31219
 41 0 65536
-41 1 65534
-41 2 25844
-41 3 14580
-41 4 12743
-41 30 22231
-41 31 65534
-42 0 52097
-42 1 45022
-42 2 10317
-42 28 11984
-42 29 10182
-42 30 13078
-42 31 40477
-43 0 61723
-43 1 48104
-43 2 17623
-43 3 10105
-43 28 28331
-43 29 24102
-43 31 45085
+41 1 57642
+41 15 52984
+41 16 65536
+41 17 57420
+41 31 57035
+42 0 46393
+42 1 24862
+42 15 27123
+42 16 44734
+42 17 25836
+42 31 33316
+43 0 65535
+43 1 43056
+43 13 10481
+43 14 22074
+43 15 24792
+43 16 39506
+43 17 36481
+43 30 24870
+43 31 39062
 44 0 65535
 44 1 65535
-44 2 60795
-44 3 25438
-44 27 39330
-44 28 60025
-44 29 52445
-44 30 35091
+44 2 19166
+44 3 21321
+44 13 32864
+44 14 41461
+44 15 65535
+44 16 65535
+44 17 58493
+44 19 13967
+44 29 29756
+44 30 54069
 44 31 65535
 45 0 65535
-45 1 65535
-45 2 27652
-45 3 14416
-45 4 10622
-45 27 16323
-45 28 40935
-45 29 30694
-45 30 29375
-45 31 65535
-46 0 65536
-46 1 57696
-46 2 14924
-46 30 14433
-46 31 45164
-47 0 59141
-47 1 44129
-47 2 15305
-47 28 13092
-47 30 13754
-47 31 47415
-48 0 27722
-48 1 13381
-48 31 16907
-49 0 51936
-49 1 43775
-49 2 13004
-49 31 40023
-50 0 45430
-50 1 39187
-50 2 15881
-50 30 12925
-50 31 38207
-51 0 34026
-51 1 33081
-51 31 34429
-52 0 34415
-52 1 15408
-52 31 19344
-53 0 52351
-53 1 42915
-53 2 14442
-53 30 13099
-53 31 42143
-54 0 62356
-54 1 49279
-54 2 15596
-54 30 15478
-54 31 46574
-55 0 33829
-55 1 15941
-55 31 18110
-56 0 65535
-56 1 46926
-56 2 11443
-56 28 12373
-56 29 12101
-56 30 14660
-56 31 53058
+45 1 58886
+45 14 22013
+45 15 65116
+45 16 65535
+45 17 65535
+45 29 13068
+45 30 25759
+45 31 61393
+46 0 53411
+46 1 44267
+46 15 30631
+46 16 58196
+46 17 36338
+46 31 28840
+47 0 54574
+47 1 35574
+47 15 38960
+47 16 46623
+47 17 32070
+47 31 40091
+48 0 22302
+48 1 10865
+48 15 13917
+48 16 18042
+48 31 10930
+49 0 49013
+49 1 28270
+49 15 25242
+49 16 41969
+49 17 24924
+49 31 26704
+50 0 43858
+50 1 35227
+50 15 39737
+50 16 39085
+50 17 36353
+50 31 38658
+51 0 33868
+51 1 23364
+51 15 23348
+51 16 33246
+51 17 24398
+51 31 27415
+52 0 24500
+52 1 10467
+52 15 13661
+52 16 21073
+52 17 10681
+52 31 10164
+53 0 46806
+53 1 31121
+53 15 34423
+53 16 44568
+53 17 28497
+53 31 35229
+54 0 49713
+54 1 32292
+54 15 40878
+54 16 54060
+54 17 34252
+54 31 43616
+55 0 25597
+55 1 13662
+55 15 13184
+55 16 20525
+55 17 10363
+55 31 12295
+56 0 53620
+56 1 23575
+56 14 12578
+56 15 34783
+56 16 64499
+56 17 32442
+56 31 32139
 58 0 65535
-58 1 56769
-58 2 14110
-58 28 12576
-58 29 16059
-58 30 18858
-58 31 63517
-59 0 30703
-59 1 24206
-59 28 17534
-59 29 12652
-60 0 35136
-60 1 21277
-60 31 25048
-61 0 28692
-61 1 11267
-61 28 11881
-61 31 17628
-62 0 35795
-62 1 18879
-62 31 18083
-63 0 65535
-63 1 40428
-63 28 11884
-63 29 13271
-63 30 14869
-63 31 52574
+58 1 35008
+58 15 43324
+58 16 64959
+58 17 35348
+58 31 39154
+59 0 13238
+59 1 11374
+59 14 16623
+59 16 22346
+59 17 12583
+60 0 31259
+60 1 17900
+60 15 19638
+60 16 26331
+60 17 12543
+60 31 18056
+61 0 14596
+61 15 13600
+61 16 23597
+61 17 10681
+61 31 14915
+62 0 22096
+62 1 10515
+62 16 23642
+62 17 11146
+62 31 10180
+63 0 58324
+63 1 25269
+63 15 32920
+63 16 54165
+63 17 27625
+63 31 29816
@@ -76,22 +76,50 @@
 0
 0
 0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
 1
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
 1
 1
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
+0
 1
 0
 0
@@ -2018,31 +2046,3 @@
 0
 0
 0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
-0
@@ -2,7 +2,7 @@
 # Chain: decim -> MTI -> Doppler -> DC notch(w=2) -> CA-CFAR
 # CFAR: guard=2, train=8, alpha=0x30, mode=CA
 # Format: range_bin doppler_bin magnitude threshold
-2 27 40172 38280
-2 28 65534 40749
-2 29 58080 31302
-2 30 16565 13386
+2 14 57128 48153
+2 29 20281 15318
+2 30 44783 22389
+3 26 19423 19422
--- a/Show More
+++ b/Show More